Adaptation/GUID-C2114C7B-705C-4527-836A-C6E72227111A.dita
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     1 <?xml version="1.0" encoding="utf-8"?>
       
     2 <!-- Copyright (c) 2007-2010 Nokia Corporation and/or its subsidiary(-ies) All rights reserved. -->
       
     3 <!-- This component and the accompanying materials are made available under the terms of the License 
       
     4 "Eclipse Public License v1.0" which accompanies this distribution, 
       
     5 and is available at the URL "http://www.eclipse.org/legal/epl-v10.html". -->
       
     6 <!-- Initial Contributors:
       
     7     Nokia Corporation - initial contribution.
       
     8 Contributors: 
       
     9 -->
       
    10 <!DOCTYPE concept
       
    11   PUBLIC "-//OASIS//DTD DITA Concept//EN" "concept.dtd">
       
    12 <concept id="GUID-C2114C7B-705C-4527-836A-C6E72227111A" xml:lang="en"><title>DMA Testing Guide</title><shortdesc>Describes the required and optional testing for the DMA
       
    13 framework.</shortdesc><prolog><metadata><keywords/></metadata></prolog><conbody>
       
    14 <p>You can use the same set of source code to build the following
       
    15 DMA test harnesses: </p>
       
    16 <ol>
       
    17 <li id="GUID-95B78247-5B32-479A-B013-A3FD4D04477E"><p><b>Simulation
       
    18 PSL</b>: T_DMASIM.EXE, D_DMASIM.LDD, and DMASIM.DLL. This is a software-simulated
       
    19 implementation of DMA that is used mainly for debugging and validating
       
    20 the PIL (platform-independent layer), as it simulates all types of
       
    21 DMA controller. </p></li>
       
    22 <li id="GUID-4090D5D9-7D03-4E68-9870-FA035058F50B"><p><b>User-side
       
    23 harness</b>: T_DMA.EXE. </p></li>
       
    24 </ol>
       
    25 <section id="GUID-34FD4B72-0481-46A3-9EB7-50CA55D01FF9">       <title>DMA test source files</title>       <p>The following test code are
       
    26 available to test a DMA port.</p><table id="GUID-999C6533-DEEA-42DA-AAAD-5F9F2E3DB794">
       
    27 <tgroup cols="4"><colspec colname="col1"/><colspec colname="col2"/>
       
    28 <colspec colname="col3"/><colspec colname="COLSPEC0" colwidth="1.00*"/>
       
    29 <thead>
       
    30 <row>
       
    31 <entry valign="top">File</entry>
       
    32 <entry valign="top">Description</entry>
       
    33 <entry valign="top">Location</entry>
       
    34 <entry valign="top">Usage</entry>
       
    35 </row>
       
    36 </thead>
       
    37 <tbody>
       
    38 <row>
       
    39 <entry>t_dma.exe</entry>
       
    40 <entry>User-side test harness to test the DMA framework</entry>
       
    41 <entry><filepath>/e32test/dma/t_dma.cpp</filepath></entry>
       
    42 <entry>Mandatory</entry>
       
    43 </row>
       
    44 <row>
       
    45 <entry>d_dma.ldd</entry>
       
    46 <entry>Simulation PSL to test the DMA framework</entry>
       
    47 <entry><filepath>/e32test/dma/d_dma.cpp</filepath></entry>
       
    48 <entry>Mandatory</entry>
       
    49 </row>
       
    50 <row>
       
    51 <entry>dmasim.dll</entry>
       
    52 <entry>Software simulation of DMA controller and the SHAI implemetation</entry>
       
    53 <entry><filepath>e32test/dma/dmasim.cpp</filepath></entry>
       
    54 <entry>Optional, only used to test software simulated DMA controller.</entry>
       
    55 </row>
       
    56 <row>
       
    57 <entry>t_dmasim.exe</entry>
       
    58 <entry>User-side test harness to test the simulated DMA controller</entry>
       
    59 <entry><filepath>/e32test/dma/t_dma.cpp</filepath></entry>
       
    60 <entry>Optional, only used to test software simulated DMA controller.</entry>
       
    61 </row>
       
    62 <row>
       
    63 <entry>d_dmasim.ldd</entry>
       
    64 <entry>Kernel-side test harness to test the simulated DMA controller</entry>
       
    65 <entry><filepath>/e32test/dma/d_dma.cpp</filepath></entry>
       
    66 <entry>Optional, only used to test software simulated DMA controller.</entry>
       
    67 </row>
       
    68 </tbody>
       
    69 </tgroup>
       
    70 </table>     <p><filepath>T_DMA.EXE</filepath> is a user-side harness,
       
    71 and is an automatic test included in the <codeph>E32TEST</codeph> suite.
       
    72 It assumes that the underlying DMA controller supports memory to memory
       
    73 transfers. This executable delegates most of the work to <filepath>D_DMA.LDD</filepath> , a logical device driver that acts as a client
       
    74 for the DMA Framework. <filepath>D_DMA.LDD</filepath> links statically
       
    75 against <filepath>DMA.DLL</filepath>, the DMA Framework kernel extension
       
    76 must be built from the variant.</p><p><filepath>T_DMA.EXE</filepath> delegates most of the work to <filepath>D_DMA.LDD</filepath>, which
       
    77 is a logical device driver that acts as a client for the DMA Framework.
       
    78 D_DMA.LDD links statically against DMA.DLL, the DMA Framework kernel
       
    79 extension must be built from the variant. In practice, this means
       
    80 that D_DMA.LDD must be specified in the test <codeph>bld.inf</codeph> for the variant being ported. For an example of this, see <filepath>...\template_variant\test\bld.inf</filepath>. </p><p><filepath>D_DMA.LDD</filepath> calls the <xref href="GUID-3D0A9A03-E210-30EE-A1A1-7DA06E668CAA.dita"><apiname>DmaTestInfo()</apiname></xref> function in the PSL to
       
    81 obtain the information on which channels are available to be used
       
    82 by T_DMA to allow it to run multiple DMA channels simultaneously.
       
    83 This is the template implementation: </p><codeblock xml:space="preserve">struct TDmaTestInfo
       
    84      {
       
    85      /** Maximum transfer size in bytes for all channels (ie. the minimum of all channels' maximum size)*/
       
    86      TInt iMaxTransferSize;
       
    87      /** 3-&gt;Memory buffers must be 4-byte aligned, 7-&gt;8-byte aligned, ... */
       
    88      TUint iMemAlignMask;
       
    89      /** Cookie to pass to DDmaRequest::Fragment for memory-memory transfer*/
       
    90      TUint32 iMemMemPslInfo;
       
    91      /** Number of test single-buffer channels */
       
    92      TInt iMaxSbChannels;
       
    93      /** Pointer to array containing single-buffer test channel ids */
       
    94      TUint32* iSbChannels;
       
    95      /** Number of test double-buffer channels */
       
    96      TInt iMaxDbChannels;
       
    97      /** Pointer to array containing double-buffer test channel ids */
       
    98      TUint32* iDbChannels;
       
    99      /** Number of test scatter-gather channels */
       
   100      TInt iMaxSgChannels;
       
   101      /** Pointer to array containing scatter-gather test channel ids */
       
   102      TUint32* iSgChannels;
       
   103      };
       
   104 
       
   105 TDmaTestInfo TestInfo = {0, 0, 0, 0, NULL, 0, NULL, 0, NULL};
       
   106 
       
   107 
       
   108 EXPORT_C const TDmaTestInfo&amp; DmaTestInfo()
       
   109 //...
       
   110     {
       
   111     return TestInfo;
       
   112     }
       
   113 
       
   114 </codeblock></section>
       
   115 <section id="GUID-A4207DD8-1DE4-4F4C-8EAB-BDEBF2D2A7F0"><title>Test
       
   116 application use cases</title><p>The DMA test application is used to
       
   117 test:</p><ul>
       
   118 <li><p>one shot single buffer transfer</p></li>
       
   119 <li><p>one shot double buffer transfer</p></li>
       
   120 <li><p>one shot scatter/gather transfer</p></li>
       
   121 <li><p>streaming single buffer transfer</p></li>
       
   122 <li><p>streaming double buffer transfer</p></li>
       
   123 <li><p>streaming scatter/gather transfer</p></li>
       
   124 </ul><p>The DMA test application can be used on both reference hardware
       
   125 platform and software simulated DMA.</p></section>
       
   126 <section id="GUID-DA97B733-2449-4A74-B4A9-0682C8A4DCE0"><title>Limitations</title><p>The DMA test application has the following known limitations:</p><ul>
       
   127 <li><p> only supports one shot and streaming data transfer</p></li>
       
   128 <li><p>many parameters such as the number of buffers, the transfer
       
   129 size and the number of fragments are fixed</p></li>
       
   130 <li><p>does not support performance measurements like CPU usage, setup
       
   131 time and transfer time</p></li>
       
   132 <li><p>does not support memory to peripheral data transfer</p></li>
       
   133 <li><p>does not support SMP related testing like allocating DFC on
       
   134 same core or different core.</p></li>
       
   135 </ul></section>
       
   136 </conbody><related-links>
       
   137 <link href="GUID-95A33491-17AC-4F12-948E-A1352ADDA483.dita"><linktext>DMA
       
   138 Implementation Guide</linktext></link>
       
   139 </related-links></concept>