--- /dev/null	Thu Jan 01 00:00:00 1970 +0000
+++ b/Adaptation/GUID-2E4F8732-F253-5E0D-9A37-9476541E6004.dita	Fri Oct 15 14:32:18 2010 +0100
@@ -0,0 +1,83 @@
+<?xml version="1.0" encoding="utf-8"?>
+<!-- Copyright (c) 2007-2010 Nokia Corporation and/or its subsidiary(-ies) All rights reserved. -->
+<!-- This component and the accompanying materials are made available under the terms of the License 
+"Eclipse Public License v1.0" which accompanies this distribution, 
+and is available at the URL "http://www.eclipse.org/legal/epl-v10.html". -->
+<!-- Initial Contributors:
+    Nokia Corporation - initial contribution.
+Contributors: 
+-->
+<!DOCTYPE concept
+  PUBLIC "-//OASIS//DTD DITA Concept//EN" "concept.dtd">
+<concept id="GUID-2E4F8732-F253-5E0D-9A37-9476541E6004" xml:lang="en"><title>Platform-Specific
+Configuration Header</title><shortdesc>Describes how to write the file providing build-time configuration
+options.</shortdesc><prolog><metadata><keywords/></metadata></prolog><conbody>
+<p>The platform-specific configuration header is a file that provides the
+configuration options that must be known at build time. </p>
+<p>The configuration header is an include file written in assembler, and is
+named <filepath>config.inc</filepath>. </p>
+<p>Use the configuration header file in the Template port in <filepath>os/kernelhwsrv/bsptemplate/asspandvariant/template_variant/config.inc</filepath> as the basis of your own configuration header file. </p>
+<p>The file consists of a number of global logical symbol definitions (<codeph>GBLL</codeph> statements),
+including the following: </p>
+<ul>
+<li id="GUID-79707935-D1DD-5221-B77E-7F26AE27ADD0"><p>symbols that define
+the CPU, listed below </p> </li>
+<li id="GUID-AAD39A6F-256C-5904-8869-B90005A550E7"><p>a number of less commonly
+used macros and symbols, which are documented in the template configuration
+header file </p> </li>
+<li id="GUID-DC757D0B-5F4A-5C3C-AF23-D8F1893DEBF3"><p>a set of general bootstrap
+macros described in the <xref href="GUID-20F8DA2A-9157-54C5-97D0-4CCA50AB0631.dita">Reference</xref> section,
+including the macros that define the presence of Level 2 cache (L210 cache
+and L220 cache). </p> </li>
+</ul>
+<section id="GUID-2B3B9AA4-317C-5D83-8635-B64CBFD9B180"><title>CPU
+symbols</title><p>The CPU that the bootstrap runs on is indicated by defining <i>one</i> of
+the following symbols: </p><ul>
+<li id="GUID-23065718-F6B8-5882-A51A-8E6BE234B1CE"><p> <codeph>CFG_CPU_ARM710T</codeph></p></li>
+<li id="GUID-004CBA53-105B-52B9-92FD-C96076853126"><p> <codeph>CFG_CPU_ARM720T</codeph></p> </li>
+<li id="GUID-43DC423C-1FFB-59A9-9DEA-37BFEEBD102E"><p> <codeph>CFG_CPU_SA1</codeph></p></li>
+<li id="GUID-4B3C55D3-5D61-52F7-A6E1-007BD9AF4F2A"><p> <codeph>CFG_CPU_ARM920T</codeph></p> </li>
+<li id="GUID-16EC89F4-93A0-5838-B287-E275644F454F"><p> <codeph>CFG_CPU_ARM925T</codeph></p></li>
+<li id="GUID-B74887BE-55E8-5B15-B4F0-456174B76E4A"><p> <codeph>CFG_CPU_ARM926J</codeph></p></li>
+<li id="GUID-AD501BE6-E722-593C-8B37-BDD7187CB023"><p> <codeph>CFG_CPU_XSCALE</codeph></p></li>
+<li id="GUID-36BBE46F-0D2E-54B8-B306-88FDEAD029F6"><p> <codeph>CFG_CPU_ARM1136</codeph></p></li>
+<li id="GUID-6FDF00B0-4685-57D0-9619-E8663C7F3CAC"><p> <codeph>CFG_CPU_GENERIC_ARM4</codeph></p></li>
+</ul> <p>Note that <codeph>CFG_CPU_GENERIC_ARM4</codeph> refers to an ARM
+architecture 4, or later device, with no MMU. </p> <p>The template file contains
+all these symbol definitions; just move the comment symbol (<codeph>;</codeph>)
+as appropriate for your platform. </p> </section>
+<section id="GUID-CA93F9E2-B48F-4A25-9A72-60F994579E26"><title>Other symbols</title><table id="GUID-65CE2BC3-A0EB-5D10-A5FA-5DDF7FC16C86">
+<tgroup cols="2"><colspec colname="col0"/><colspec colname="col1"/>
+<tbody>
+<row>
+<entry><p> <codeph>CFG_DebugBootRom</codeph>  </p> </entry>
+<entry><p>Define this symbol to enable debug tracing in the bootstrap. </p> </entry>
+</row>
+<row>
+<entry><p> <codeph>CFG_BootLoader</codeph>  </p> </entry>
+<entry><p>Define this symbol if the bootstrap is a bootloader. </p> </entry>
+</row>
+</tbody>
+</tgroup>
+</table> </section>
+<section id="GUID-C1E1FB5B-C3AB-4B0A-BBED-B51C3DD12F7E"><title>Derived
+symbols</title> <p>A number of commonly used symbols are derived from the
+supplied configuration options, and may be used in your code. </p> <p>Precisely <i>one</i> of
+the following three logical symbols is true, indicating the memory model in
+use: </p> <ul>
+<li id="GUID-87BF8EC3-CCBE-5BB8-85AB-074F246FF59A"><p> <codeph>CFG_MMDirect</codeph>  </p> </li>
+<li id="GUID-3B5EF71B-1938-5DB7-AE23-E485CDC15BA7"><p> <codeph>CFG_MMMoving</codeph>  </p> </li>
+<li id="GUID-C09F2227-966E-5324-9A56-0D2996D60B83"><p> <codeph>CFG_MMMultiple</codeph>  </p> </li>
+</ul> <p>The following logical symbols are true or false depending on whether
+the CPU in use has the corresponding property. The property represented by
+the symbol is given by the symbol name. </p> <ul>
+<li id="GUID-5502D0E2-E2CF-57D4-8B08-C56E1B75ECE2"><p> <codeph>CFG_ARMV6</codeph>  </p> </li>
+<li id="GUID-AFAAF34C-BAF0-56D2-90FD-463DEA31C1C8"><p> <codeph>CFG_MMUPresent</codeph>  </p> </li>
+<li id="GUID-5B162135-6F71-52DF-AC5E-14419A960916"><p> <codeph>CFG_CachePresent</codeph>  </p> </li>
+<li id="GUID-399918E2-D9C9-5860-B765-92890BC025C0"><p> <codeph>CFG_WriteBufferPresent</codeph>  </p> </li>
+<li id="GUID-2520D9C2-2FDF-5D8A-8CCC-C8226F3B4CA6"><p> <codeph>CFG_SplitCache</codeph>  </p> </li>
+<li id="GUID-042ED020-22D0-5BC1-8C6C-94B484348110"><p> <codeph>CFG_SplitTLB</codeph>  </p> </li>
+<li id="GUID-B77CC0D9-02AA-59A7-BAD9-9AA57BEC81FB"><p> <codeph>CFG_AltDCachePresent</codeph>  </p> </li>
+<li id="GUID-CD2E1CDC-0503-548E-BC3A-637354581BFB"><p> <codeph>CFG_WriteBackCache</codeph>  </p> </li>
+</ul> </section>
+</conbody></concept>
\ No newline at end of file