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<!DOCTYPE concept
  PUBLIC "-//OASIS//DTD DITA Concept//EN" "concept.dtd">
<concept id="GUID-B498EDA0-677E-5521-9E4F-24D7C2048F2E" xml:lang="en"><title>Implementing
ASSP Register</title><shortdesc>A hardware register is a physical interface to an item of hardware
which contains bit fields for controlling ASSP features. </shortdesc><prolog><metadata><keywords/></metadata></prolog><conbody>
<p id="GUID-27127D46-0B33-5433-8633-302675C52C24"> An ASSP (Application Specific
Standard Product) is a class of integrated circuit. Different ASSPs have different
architectures and instructions sets. The <xref href="GUID-66BB033A-3386-3913-9A25-EF3867D42C2C.dita"><apiname>AsspRegister</apiname></xref> class
provides device driver writers with a simple interface to access ASSPs generically.
Device driver writers can use the functions provided by the class without
concerning themselves with implementation on the device. Hardware implementers
must provide the specified functionality on a given platform and ASSP by writing
the appropriate machine instructions. </p>
<p>Generic access to an ASSP is provided in the form of three operations on
a hardware register: read, write and modify. </p>
<p>All these functions can be called in any context. </p>
<section id="GUID-32341618-DA27-5C1C-B160-386825E82321"><title>Implementation</title> <p>To
provide ASSP access, hardware implementers need to implement the <xref href="GUID-66BB033A-3386-3913-9A25-EF3867D42C2C.dita"><apiname>AsspRegister</apiname></xref> class. </p> <p>Symbian platform
provides the class header and inline implementations of the 8, 16 and 32-bit
wide functions. You must implement all the register modify functions and all
functions to access 64-bit wide registers. You may also need to replace the
inline 8, 16 and 32-bit wide register read and write functions if the ASSP
contains write-only registers. </p> <p>You must implement these functions
atomically so that there is no possibility of another thread or interrupt
service routine accessing the contents of the register before the function
returns. Where you cannot implement the function with a single machine instruction
this means that you must disable interrupts during the register operation
(if you are working with a single core architecture) or wrap a spinlock around
the register operation (if you are working with a multicore architecture). </p> <p>There
are three cases in which you must enforce atomicity with interrupt disables
or spinlocks. </p> <ul>
<li id="GUID-3D835089-4626-584F-9FB1-EBD9CBF7A8D0"><p>The modify operations
involve reading the register, taking a local copy, changing the local copy
and writing it back to the register and cannot be performed with a single
machine instruction. </p> </li>
<li id="GUID-939FFD27-60EB-5465-95B7-A3654FBB5941"><p>Operations on write-only
registers involve maintaining a copy of the current contents of the register
within the <xref href="GUID-66BB033A-3386-3913-9A25-EF3867D42C2C.dita"><apiname>AsspRegister</apiname></xref> class. All
write and modify operations therefore cannot be performed with a single machine
instruction. </p> </li>
<li id="GUID-26D38D30-DFF3-5DCD-8163-157A228C50D6"><p>Some architectures contain
64-bit registers. In this case, 64-bit operations involve at least two machine
instructions. </p> </li>
</ul> </section>
</conbody><related-links>
<link href="GUID-5194A7B6-471B-5BCF-8569-16A3BA59000A.dita#GUID-5194A7B6-471B-5BCF-8569-16A3BA59000A/GUID-E1D195A0-715F-5961-A67C-A2536D68DAE3">
<linktext>Using the ASSP Register</linktext></link>
</related-links></concept>