diff -r ebc84c812384 -r 46218c8b8afa Symbian3/PDK/Source/GUID-96F07979-3863-5198-AF8B-4ACC1193CF3E.dita --- a/Symbian3/PDK/Source/GUID-96F07979-3863-5198-AF8B-4ACC1193CF3E.dita Thu Mar 11 15:24:26 2010 +0000 +++ b/Symbian3/PDK/Source/GUID-96F07979-3863-5198-AF8B-4ACC1193CF3E.dita Thu Mar 11 18:02:22 2010 +0000 @@ -1,30 +1,30 @@ - - - - - -Level -2 Cache TutorialThis topic describes how to configure the base port to use the -ARM L210 cache or L220 cache controllers in ARM processors. -

Cache is a fast buffer that keeps copies of recently accessed memory.

-
L210 Cache

In the variant.mmh file, -set the macro:

__ARM_L210_CACHE__

You -must also set a L210 Cache macro and initialise Level 2 cache in the Bootstrap. -See Level 2 Cache Macros and HardwareInitialise().

The -L210 cache is switched on by generic Symbian OS code before jumping into the -kernel code. The cache is switched on after the MMU and L1 cache are enabled.

-
L220 Cache

In the variant.mmh file, -set the macro:

__ARM_L220_CACHE__

You -must also set a L220 Cache macro and initialise Level 2 cache in the Bootstrap. -See Level 2 Cache Macros and HardwareInitialise().

Code -to switch on the L220 cache on must be provided by the base port. You can -do this in the HardwareInitialise() function -or the BTF_Final() function -in the Bootstrap.

+ + + + + +Level +2 Cache TutorialThis topic describes how to configure the base port to use the +ARM L210 cache or L220 cache controllers in ARM processors. +

Cache is a fast buffer that keeps copies of recently accessed memory.

+
L210 Cache

In the variant.mmh file, +set the macro:

__ARM_L210_CACHE__

You +must also set a L210 Cache macro and initialise Level 2 cache in the Bootstrap. +See Level 2 Cache Macros and HardwareInitialise().

The +L210 cache is switched on by generic Symbian OS code before jumping into the +kernel code. The cache is switched on after the MMU and L1 cache are enabled.

+
L220 Cache

In the variant.mmh file, +set the macro:

__ARM_L220_CACHE__

You +must also set a L220 Cache macro and initialise Level 2 cache in the Bootstrap. +See Level 2 Cache Macros and HardwareInitialise().

Code +to switch on the L220 cache on must be provided by the base port. You can +do this in the HardwareInitialise() function +or the BTF_Final() function +in the Bootstrap.

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