diff -r 48780e181b38 -r 578be2adaf3e Symbian3/PDK/Source/GUID-387E98B0-568D-4DBB-9A9E-616E41E96B58.dita
--- a/Symbian3/PDK/Source/GUID-387E98B0-568D-4DBB-9A9E-616E41E96B58.dita Tue Jul 20 12:00:49 2010 +0100
+++ b/Symbian3/PDK/Source/GUID-387E98B0-568D-4DBB-9A9E-616E41E96B58.dita Fri Aug 13 16:47:46 2010 +0100
@@ -35,7 +35,7 @@
CPU cores.
The figure shows a simplified block diagram of an SMP system, where 4 CPUs are connected through their own cache to shared RAM and peripherals. The Cache Coherency Control block is responsible for ensuring that each CPU