common/tools/ats/bctest/pim/clock/clock.xml
changeset 552 8018a074606b
parent 444 edfd4034265b
child 822 1a356be50bf9
--- a/common/tools/ats/bctest/pim/clock/clock.xml	Tue Sep 29 17:34:45 2009 +0100
+++ b/common/tools/ats/bctest/pim/clock/clock.xml	Thu Oct 01 13:19:42 2009 +0100
@@ -8,7 +8,6 @@
 	<target>
         <device rank="master" alias="emulator_udeb">
             <property name="HARNESS" value="ATSINTERFACE" />
-            <property name="NAME" value="emulator_udeb" />
         </device>
 	</target>
 	<plan id="" name="PIM Clock BC WINSCW UDEB" harness="ATSINTERFACE" enabled="true" passrate="100">