RAM Zone Tutorial

Specifying RAM zones

RAM zones are specified only once during the boot process by the base port. This takes place within the overridden pure virtual method Asic::Init1() by Epoc::SetRamZoneConfig(). Epoc::SetRamZoneConfig() takes an array of SRamZone objects and an optional pointer to the base port implementation of the TRamZoneCallback function. This is described in detail in RAM zone call back function.

Each SRamZone object contains the physical base address, size in bytes, unique ID, preference value and a set of flags for each RAM zone.

Restrictions on RAM zone properties

There are some restrictions on how the base port can specify the RAM zones:

• each RAM zone's address space must be distinct and not overlap with any other RAM zone's address space

• the value of SRamZone.iBase must be aligned to the ASIC's MMU small page size

• the value of SRamZone.iSize must be a multiple of the ASIC's MMU small page size, usually 4KB on an ARM MMU

• when added together all of the RAM zones must cover the whole of the physical RAM address space as specified by the bootstrap in the SuperPage member SSuperPageBase::iTotalRamSize

• the value of each RAM zone’s SRamZone.iId must be unique for that RAM zone

• there can be no more RAM zones than specified by KMaxRamZones.

Restriction on RAM zone preference ordering

The bootstrap always allocates the RAM it requires from the lowest RAM address upwards. This is during the system boot process and before the variant has specified the RAM zone properties. This means that the RAM zone(s) located at the lowest RAM addresses, used by the bootstrap, are never empty. Therefore, these RAM zone(s) should always be assigned to be the most preferable. A low preference value maps to a high logical preference, therefore the most preferable RAM zones have a preference value that is lower than the preference value of all the other RAM zones in the device.

Designing RAM zones to reduce power consumption

Partitioning RAM into zones

For power saving purposes, each RAM zone should represent the lowest division of the device’s RAM IC(s) that can be either powered down or refreshed independently of other divisions of the RAM IC(s). For example, it should not be possible for less than an entire RAM zone to be powered or refreshed. This allows the system to achieve lower power consumption when the level of RAM usage is reduced.

For example, if a device contains two RAM ICs and each IC is further divided into 4 banks that can be refreshed independently, then the device’s RAM should be divided into 8 RAM zones with each zone being mapped to one of the 8 individually refreshable RAM IC banks.

Assigning preferences to zones

To save power, the RAM zone preferences should be implemented in such a way that the minimum number of RAM ICs or RAM IC refresh banks are used.

For example, suppose a device has 2 RAM ICs, the RAM zones in the lowest addressed RAM IC (IC0) should be more preferable than the RAM zones located in the second RAM IC (IC1). For all RAM zones in IC0 the preference should be less than the preference of the RAM zones in IC1. A zone with a lower preference being the preferred RAM zone. This results in RAM IC1 only being powered on once RAM IC0 is too full. This is determined by the RAM zone thresholds.

RAM zone power state on system boot

When the system boots, all the RAM specified by the bootstrap must be enabled and ready to use. Devices that wish to reduce power consumption must only adjust the power modes(s) of the RAM IC(s) after the RAM zone call back function has been invoked with aOp=ERamZoneOp_Init.

Designing RAM zones for physically contiguous allocation

Some devices have particular applications or hardware peripherals that require a block of physically contiguous RAM. In such cases, a RAM zone should be defined that is the size of the physically contiguous block required, aligned to the nearest ASIC’s MMU small page size. The device then attempts to use this RAM zone whenever the particular application or hardware peripheral is activated.

For example, a device may contain a camera that requires a buffer of 4MB of physically contiguous memory to operate. A RAM zone with a size of 4MB must be defined and this RAM zone should have a greater preference value than other RAM zones in the device. This results in the camera RAM zone:

• only being used for non-camera purposes once all of the other RAM zones in the device become too full.

• having a greater chance of being emptied of any pages allocated for non-camera purposes when required by the camera.

KRamZoneDiscardOnly

On devices that use demand paging, an additional way to increase the chances of a RAM zone being available is to set the KRamZoneDiscardOnly bit of SRamZone s' iFlags member. This stops the system allocating pages that are not discardable in that zone. However, setting KRamZoneDiscardOnly also has the effect of reducing the amount of RAM available to the device for general purpose (non-demand paging) use.

KRamZoneFlagDiscardOnly only increases the chances of a RAM zone’s availability if the minimum buffer size used by demand paging and/or file caching, is small enough that the RAM zone may be cleared without reducing the paging or caching buffer beyond their specified minimum size.

RAM zone call back function

If TRamZoneCallback has been initialised by Epoc::SetRamZoneConfig(), then it is invoked each time the system requires the base port to perform an operation on a RAM zone. When the call back function is invoked the calling thread is:

• in a critical section

• holding the Symbian platform RAM allocator mutex

• not holding any fast mutex

• interrupt enabled and the kernel is unlocked.

This means that the base port’s implementation of the call back function is:

• not able to be suspended or killed by another thread

• not able to acquire a Symbian platform mutex of an order greater than or equal to the RAM allocator mutex this is all other Symbian platform mutexes. This is a deadlock prevention mechanism.

• able to acquire a fast mutex. The call back must release it before returning.

• able to be pre-empted by other threads/processes.

Parameters

A choice of three RAM zone operations can be requested with TRamZoneCallback, as defined by TRamZoneOp:

• ERamZoneOp_PowerUp is used each time a RAM zone transitions from being empty to having pages allocated into it. When this operation is invoked, all RAM zones that have their bit position set in the mask pointed to by aParam2 MUST be fully enabled and ready for use before returning from the call back function. Failure to fully enable any of these RAM zones results in the device becoming unstable and its behaviour unpredictable.

  For example, a device could have two RAM ICs, where IC1 is mapped to RAM zones 1 - 4 and IC2 is mapped to RAM zones 5 - 8.

  If while the second RAM IC is powered down, RAM zone 5 is required, a ERamZoneOp_PowerUp operation is requested. The IC2 must be fully enabled before returning from the call back function. On return from the call back function, the memory in IC2 is used by the system.

• ERamZoneOp_PowerDown is used each time a RAM zone transitions from having pages allocated in it to being empty. Devices that wish to reduce power consumption can adjust a RAM IC’s partial array self refresh mode or power down a RAM IC if all of the other RAM zones in that RAM IC are also empty.

  For example, an ERamZoneOp_PowerDown operation is requested when all the RAM zones mapped to the top half of the RAM IC Partial Array Self Refresh (PASR) regions are empty. The RAM IC can be set to use half array PASR when it next enters PASR mode, assuming the RAM IC has the option of using half array PASR mode.

• ERAMZoneOp_Init is used only once during the initial stages of the system boot process. When this operation is invoked all the RAM zones that have their bit positions cleared in the mask pointed to by aParam2 are not currently in use. The system assumes that during boot all of RAM is enabled and ready to use. Devices that wish to reduce power consumption can then adjust each of the RAM IC's partial array self refresh modes or power down modes, appropriately.

  For example, if a device has two RAM IC's, IC1 is mapped to zones1-4 and IC2 is mapped to RAM zones 5-8. Then if the ERAMZoneOp_Init operation is requested and all of the RAM zones in RAM IC2 are currently not in use, then IC2 could be placed into power down mode by the base port at the next appropriate moment.

The two parameters, aParam1 =TAny* and aParam2 =const TAny* allows the call back function to perform multiple operations with the same interface. When TRamZoneCallback is called with TRamZoneOp defined as either ERamZoneOp_PowerDown or ERamZoneOp_PowerUp, the last two parameters are defined as:

• aParam1 is the ID of the RAM zone that changed state

• aParam2 points to an array of bit masks that represent the new power state of the RAM zones. The bit mask is organised in ascending RAM zone address order with the LSB of the bit mask representing the power state of the lowest addressed zone. A zone’s bit is set if the RAM zone is in use and cleared if the RAM zone is not in use. The value of the bit mask MUST not be modified by the call back function.

See also:

When to reduce power consumption of the RAM

Depending on the RAM IC configuration for the device, entering and exiting Partial Array Self Refresh (PASR) or power down modes may introduce a decrease in a device’s overall performance. The overhead incurred when transitioning a RAM IC from power off to power on mode may have significant latency due to the amount of initialisation required. It is recommended that a delay is used between a ERamZoneOp_PowerDown operation being invoked and a RAM IC either entering PASR mode or being powered down. One approach to achieving this is to only enter PASR mode or power down a RAM IC in the device’s implementation of the DPowerController::CpuIdle() and DPowerController::PowerDown() methods. This way while the device is active its performance is not affected by the RAM zone operations.