navienginebsp/naviengine_assp/naviengine_priv.h
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     1 /*
       
     2 * Copyright (c) 2008-2009 Nokia Corporation and/or its subsidiary(-ies).
       
     3 * All rights reserved.
       
     4 * This component and the accompanying materials are made available
       
     5 * under the terms of "Eclipse Public License v1.0"
       
     6 * which accompanies this distribution, and is available
       
     7 * at the URL "http://www.eclipse.org/legal/epl-v10.html".
       
     8 *
       
     9 * Initial Contributors:
       
    10 * Nokia Corporation - initial contribution.
       
    11 *
       
    12 * Contributors:
       
    13 *
       
    14 * Description:  
       
    15 * naviengine_assp\naviengine_priv.h
       
    16 * NE1_TBVariant ASSP architecture private header file
       
    17 *
       
    18 */
       
    19 
       
    20 
       
    21 
       
    22 #ifndef __NAVIENGINE_PRIV_H__
       
    23 #define __NAVIENGINE_PRIV_H__
       
    24 #include <e32const.h>
       
    25 #include <arm.h>
       
    26 #include <assp.h>
       
    27 #include <assp/naviengine/naviengine.h>
       
    28 
       
    29 
       
    30 //----------------------------------------------------------------------------
       
    31 // NaviEngine class
       
    32 //----------------------------------------------------------------------------
       
    33 class TNaviEngine
       
    34 	{
       
    35 	/**
       
    36 	 * Accessor functions to hardware resources managed by ASSP (ASIC). Auxiliary and information functions which
       
    37 	 * are commonly used by Device Drivers or ASSP/Variant code.
       
    38 	 * Some examples below. These examples assume that the hardware blocks they access (e.g. Interrupt controller
       
    39 	 * RTC, Clock Control Module, UART, etc) are part of the ASSP.
       
    40 	 */
       
    41 public:
       
    42 	/**
       
    43 	 * Phase 1 initialisation
       
    44 	 */
       
    45 	static void Init1();
       
    46 	/**
       
    47 	 * Phase 3 initialisation
       
    48 	 */
       
    49 	static void Init3();
       
    50 	/**
       
    51 	 * Active waiting loop (not to be used after System Tick timer has been set up - Init3()
       
    52 	 * @param aDuration A wait time in milliseconds
       
    53 	 */	
       
    54 	IMPORT_C static void BootWaitMilliSeconds(TInt aDuration);
       
    55 	/**
       
    56 	 * Read and return the Startup reason of the Hardware
       
    57 	 * @return A TMachineStartupType enumerated value
       
    58 	 */	
       
    59 	IMPORT_C static TMachineStartupType StartupReason();
       
    60 	/**
       
    61 	 * Read and return the the CPU ID
       
    62 	 * @return An integer containing the CPU ID string read off the hardware
       
    63 	 */	
       
    64 	IMPORT_C static TInt CpuVersionId();
       
    65 	/**
       
    66 	 * Read Linear base address of debug UART (as selected in obey file or with eshell debugport command).
       
    67 	 * @return An integer containing the Linear address of debug Serial Port
       
    68 	 */	
       
    69 	IMPORT_C static TUint DebugPortAddr();
       
    70 	/**
       
    71 	 * Read CPU clock period in picoseconds
       
    72 	 * @return An integer containing the CPU clock period in picoseconds
       
    73 	 */	
       
    74 	IMPORT_C static TUint ProcessorPeriodInPs();
       
    75 	/**
       
    76 	 * Read the current time of the RTC
       
    77 	 * @return A value that is the real time as given by a RTC
       
    78 	 */	
       
    79 	IMPORT_C static TUint RtcData();
       
    80 	/**
       
    81 	 * Set the RTC time 
       
    82 	 * @param aValue The real time to set the RTC
       
    83 	 */	
       
    84 	IMPORT_C static void SetRtcData(TUint aValue);
       
    85 	/**
       
    86 	 * Obtain the physical start address of Video Buffer
       
    87 	 * @return the physical start address of Video Buffer
       
    88 	 */	
       
    89 	IMPORT_C static TPhysAddr VideoRamPhys();
       
    90 	static void InitDebugOutput();
       
    91 	static void DoDebugOutput(TUint aLetter);
       
    92 	
       
    93 private:
       
    94 	/** Assp-specific implementation for Kern::NanoWait function  */
       
    95 	static void NanoWait(TUint32 aInterval);
       
    96 	};
       
    97 
       
    98 /** All ASSP interrupt souces. */
       
    99 enum TNaviEngineAsspInterruptId
       
   100 	{
       
   101 	// The list of core interrupts.
       
   102 	KIntIdDigitiser,            // Not a valid value.                                     ///< Internal, clients get value from HCR
       
   103 	KIntIdSound,                // Not a valid value.                                     ///< Internal, clients get value from HCR
       
   104 	KIntIdTimer1,               // Not a valid value. (Used in template media driver)     ///< Internal, clients get value from HCR
       
   105 	KIntIdExpansion,            // Not a valid value. (Second level interrupt controller) ///< Internal, clients get value from HCR
       
   106 	EAsspIntIdUsb=11,           // Not a valid value.                                     ///< Internal, clients get value from HCR
       
   107 
       
   108 	KIntCsi0 = 34,                                                                        ///< Internal, clients get value from HCR 
       
   109 	KIntCsi1 = 35,                                                                        ///< Internal, clients get value from HCR 
       
   110 	
       
   111 	KIntIdOstMatchMsTimer = 36, // SoC Timer0 interrupt                                   ///< Internal, clients get value from HCR
       
   112 	KIntId1stMatchMsTimer = 37, // SoC Timer1 interrupt                                   ///< Internal, clients get value from HCR
       
   113 	KIntId2stMatchMsTimer = 38, // SoC Timer2 interrupt                                   ///< Internal, clients get value from HCR
       
   114 	KIntId3stMatchMsTimer = 39, // SoC Timer3 interrupt                                   ///< Internal, clients get value from HCR
       
   115 	KIntId4stMatchMsTimer = 41, // SoC Timer4 interrupt                                   ///< Internal, clients get value from HCR
       
   116 	KIntId5stMatchMsTimer = 42, // SoC Timer5 interrupt                                   ///< Internal, clients get value from HCR
       
   117 	
       
   118 	EIntSd0 = 43,               // SD #0 : OXMNIRQ                                        ///< Internal, clients get value from HCR
       
   119 	EIntSd1 = 44,               // SD #1 : OXASIOIRQ //SDIO                               ///< Internal, clients get value from HCR
       
   120 	
       
   121 	EIntNandCtrl = 46,          // Nand Controller                                        ///< Internal, clients get value from HCR
       
   122 
       
   123 	EIntDisp0 = 50,             // DISP 0                                                 ///< Internal, clients get value from HCR
       
   124 
       
   125 	KIntI2S0 = 56,              // I2S 0 Interrupts                                       ///< Internal, clients get value from HCR
       
   126 
       
   127 	EIntPciInt = 65,            // PCI Int                                                ///< Internal, clients get value from HCR
       
   128 	EIntPciSErrB = 66,          // PCI Systerm Error                                      ///< Internal, clients get value from HCR
       
   129 	EIntPciPErrB = 67,          // PCI Parity Error                                       ///< Internal, clients get value from HCR
       
   130 	EIntUsbHIntA = 71,          // USB Host Int A                                         ///< Internal, clients get value from HCR
       
   131 	EIntUsbHIntB = 72,          // USB Host Int B                                         ///< Internal, clients get value from HCR
       
   132 	EIntUsbHSmi = 73,           // USB Host System Management Interrupt                   ///< Internal, clients get value from HCR
       
   133 	EIntUsbHPme = 74,           // USB Host Power Management Event                        ///< Internal, clients get value from HCR
       
   134 	KIntDMAC32_0_End = 76,                                                                ///< Internal, clients get value from HCR
       
   135 	KIntDMAC32_0_Err = 77,                                                                ///< Internal, clients get value from HCR
       
   136 	KIntDMAC32_1_End = 78,                                                                ///< Internal, clients get value from HCR
       
   137 	KIntDMAC32_1_Err = 79,                                                                ///< Internal, clients get value from HCR
       
   138 	KIntDMAC32_2_End = 80,                                                                ///< Internal, clients get value from HCR
       
   139 	KIntDMAC32_2_Err = 81,                                                                ///< Internal, clients get value from HCR
       
   140 	KIntDMAC32_3_End = 82,                                                                ///< Internal, clients get value from HCR
       
   141 	KIntDMAC32_3_Err = 83,                                                                ///< Internal, clients get value from HCR
       
   142 	KIntDMAC32_4_End = 84,                                                                ///< Internal, clients get value from HCR
       
   143 	KIntDMAC32_4_Err = 85,                                                                ///< Internal, clients get value from HCR
       
   144 
       
   145 	KIntIdUart0 = 86,           // SoC Uart #0                                            ///< Internal, clients get value from HCR
       
   146 	KIntIdUart1 = 87,           // SoC Uart #1                                            ///< Internal, clients get value from HCR
       
   147 	KIntIdUart2 = 88,           // SoC Uart #2                                            ///< Internal, clients get value from HCR
       
   148 
       
   149 	KIntIdGpio       = 94,       // gpio                                                  ///< Internal, clients get value from HCR
       
   150 	KIntDMAC64_End   = 97,                                                                ///< Internal, clients get value from HCR
       
   151 	KIntDMAC64_Err   = 98,                                                                ///< Internal, clients get value from HCR
       
   152 	
       
   153 	KIntCpuProfilingDefaultInterruptBase   = 99, //Interrupt used by sampling profilers. 
       
   154                                                  //Each CPU_i is interrupted by interrupt number ECpuProfilingInterrupt + i.
       
   155                                                  //Therefore we need 1 interrupt per CPU, 99, 100, 101, 102.
       
   156 
       
   157 	KIntDMAExBus_End = 124,                                                               ///< Internal, clients get value from HCR 
       
   158 	KIntDMAExBus_Err = 125,                                                               ///< Internal, clients get value from HCR 
       
   159 
       
   160 	KNumNaviEngineInts    = 128, // Must be >= then the highest interrupt number in use
       
   161 	KNumNaviEngineMaxInts = 256  // The number of interrupt sources in processors.
       
   162 	};
       
   163 
       
   164 
       
   165 class NaviEngineInterrupt : public Interrupt
       
   166 	{
       
   167 public:
       
   168 	/**
       
   169 	 * These functions are required to initialise the Interrupt controller,or perform housekeeping
       
   170 	 * functions, or dispatch the incoming IRQ or FIQ interrupts.
       
   171 	 */
       
   172 
       
   173 	/**
       
   174 	 * initialisation
       
   175 	 */
       
   176 	static void Init1();
       
   177 	static void Init3();
       
   178 
       
   179 	/**
       
   180 	 * Housekeeping (disable and clear all hardware interrupt sources)
       
   181 	 */
       
   182 	static void DisableAndClearAll();
       
   183 
       
   184 #ifdef __SMP__
       
   185 	/**
       
   186 	 * IRQ/FIQ dispatchers
       
   187 	 */
       
   188 	static TUint32 IrqDispatch(TUint32 aVector);
       
   189 	static void FiqDispatch();
       
   190 #endif
       
   191 #ifndef __SMP__
       
   192 	/**
       
   193 	 * IRQ/FIQ dispatchers
       
   194 	 */
       
   195 	static void IrqDispatch();
       
   196 	static void FiqDispatch();
       
   197 	/**
       
   198 	 * Empty interrupt handler
       
   199 	 */
       
   200 	static void Spurious(TAny* anId);
       
   201 
       
   202 	static SInterruptHandler Handlers[KNumNaviEngineInts];
       
   203 #endif
       
   204 	};
       
   205 
       
   206 class NaviEngineAssp : public Asic
       
   207 	{
       
   208 public:
       
   209 	IMPORT_C NaviEngineAssp();
       
   210 
       
   211 public:
       
   212 	/**
       
   213 	 * These are the mandatory Asic class functions which are implemented here rather than in the Variant.
       
   214 	 * It makes sense having an ASSP class when there is functionality at Variant/Core level which is common
       
   215 	 * to a group of devices and is provided by an IP block(s) which is likely to be used in future generations
       
   216 	 * of the same family of devices.
       
   217 	 * In general the common functionality includes first-level Interrupt controllers, Power and Reset controllers,
       
   218 	 * and timing functions
       
   219 	 */
       
   220 
       
   221 	/**
       
   222 	 * initialisation
       
   223 	 */
       
   224 	IMPORT_C virtual void Init1();
       
   225 	IMPORT_C virtual void Init3();
       
   226 	/**
       
   227 	 * Read and return the Startup reason of the Super Page (set up by Bootstrap)
       
   228 	 * @return A TMachineStartupType enumerated value
       
   229 	 * @see TMachineStartupType
       
   230 	 */
       
   231 	IMPORT_C virtual TMachineStartupType StartupReason();
       
   232 
       
   233 	/**
       
   234 	 * timing functions
       
   235 	 */
       
   236 
       
   237 	/**
       
   238 	 * Obtain the period of System Tick timer in microseconds
       
   239 	 * @return Period of System Tick timer in microseconds
       
   240 	 */
       
   241 	IMPORT_C virtual TInt MsTickPeriod();
       
   242 	/**
       
   243 	 * Obtain System Time from the RTC
       
   244 	 * @return System Time in seconds from 00:00 hours of 1/1/2000
       
   245 	 */
       
   246 	IMPORT_C virtual TInt SystemTimeInSecondsFrom2000(TInt& aTime);
       
   247 	/**
       
   248 	 * Obtain Adjust the RTC with new System Time (from 00:00 hours of 1/1/2000)
       
   249 	 * @return System wide error code
       
   250 	 */
       
   251 	IMPORT_C virtual TInt SetSystemTimeInSecondsFrom2000(TInt aTime);
       
   252 	/**
       
   253 	 * Obtain the time it takes to execute two processor instructions
       
   254 	 * @return Time in nanoseconds it takes two execute 2 instructions at the processor clock speed
       
   255 	 */
       
   256 	IMPORT_C virtual TUint32 NanoWaitCalibration();
       
   257 	/**
       
   258 	 * @param aChar Character to be output by debug serial port
       
   259 	 */
       
   260 	IMPORT_C virtual void DebugOutput(TUint aChar);
       
   261 
       
   262 public:
       
   263 	/**
       
   264 	 * for derivation by Variant
       
   265 	 */
       
   266 
       
   267 	/**
       
   268 	 * external interrupt handling
       
   269 	 * used by second-level interrupt controllers at Variant level
       
   270 	 */
       
   271 	virtual TInt InterruptBind(TInt anId, TIsr anIsr, TAny* aPtr)=0;
       
   272 	virtual TInt InterruptUnbind(TInt anId)=0;
       
   273 	virtual TInt InterruptEnable(TInt anId)=0;
       
   274 	virtual TInt InterruptDisable(TInt anId)=0;
       
   275 	virtual TInt InterruptClear(TInt anId)=0;
       
   276 
       
   277 	/**
       
   278 	 * USB client controller - Some example functions for the case that USB cable detection and
       
   279 	 * UDC connect/disconnect functionality are part of the Variant.
       
   280 	 * Pure virtual functions called by the USB PSL, to be implemented by the Variant (derived class).
       
   281 	 * If this functionality is part of the ASSP then these functions can be removed and calls to them
       
   282 	 * in the PSL (./pa_usbc.cpp) replaced by the appropriate internal operations.
       
   283 	 */
       
   284 	virtual TBool UsbClientConnectorDetectable()=0;
       
   285 	virtual TBool UsbClientConnectorInserted()=0;
       
   286 	virtual TInt RegisterUsbClientConnectorCallback(TInt (*aCallback)(TAny*), TAny* aPtr)=0;
       
   287 	virtual void UnregisterUsbClientConnectorCallback()=0;
       
   288 	virtual TBool UsbSoftwareConnectable()=0;
       
   289 	virtual TInt UsbConnect()=0;
       
   290 	virtual TInt UsbDisconnect()=0;
       
   291 
       
   292 	/**
       
   293 	 * miscellaneous
       
   294 	 */
       
   295 	virtual TInt VideoRamSize()=0;
       
   296  	
       
   297 public:
       
   298 	static NaviEngineAssp* Variant;
       
   299 	static TPhysAddr VideoRamPhys;
       
   300 	NTimerQ* iTimerQ;
       
   301 	TBool iDebugInitialised;
       
   302 	};
       
   303 
       
   304 #endif