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1 /* |
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2 * Copyright (c) 2008-2009 Nokia Corporation and/or its subsidiary(-ies). |
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3 * All rights reserved. |
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4 * This component and the accompanying materials are made available |
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5 * under the terms of "Eclipse Public License v1.0" |
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6 * which accompanies this distribution, and is available |
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7 * at the URL "http://www.eclipse.org/legal/epl-v10.html". |
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8 * |
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9 * Initial Contributors: |
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10 * Nokia Corporation - initial contribution. |
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11 * |
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12 * Contributors: |
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13 * |
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14 * Description: |
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15 * naviengine_assp\naviengine_priv.h |
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16 * NE1_TBVariant ASSP architecture private header file |
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17 * |
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18 */ |
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19 |
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20 |
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21 |
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22 #ifndef __NAVIENGINE_PRIV_H__ |
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23 #define __NAVIENGINE_PRIV_H__ |
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24 #include <e32const.h> |
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25 #include <arm.h> |
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26 #include <assp.h> |
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27 #include <assp/naviengine/naviengine.h> |
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28 |
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29 |
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30 //---------------------------------------------------------------------------- |
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31 // NaviEngine class |
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32 //---------------------------------------------------------------------------- |
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33 class TNaviEngine |
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34 { |
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35 /** |
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36 * Accessor functions to hardware resources managed by ASSP (ASIC). Auxiliary and information functions which |
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37 * are commonly used by Device Drivers or ASSP/Variant code. |
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38 * Some examples below. These examples assume that the hardware blocks they access (e.g. Interrupt controller |
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39 * RTC, Clock Control Module, UART, etc) are part of the ASSP. |
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40 */ |
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41 public: |
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42 /** |
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43 * Phase 1 initialisation |
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44 */ |
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45 static void Init1(); |
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46 /** |
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47 * Phase 3 initialisation |
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48 */ |
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49 static void Init3(); |
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50 /** |
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51 * Active waiting loop (not to be used after System Tick timer has been set up - Init3() |
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52 * @param aDuration A wait time in milliseconds |
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53 */ |
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54 IMPORT_C static void BootWaitMilliSeconds(TInt aDuration); |
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55 /** |
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56 * Read and return the Startup reason of the Hardware |
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57 * @return A TMachineStartupType enumerated value |
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58 */ |
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59 IMPORT_C static TMachineStartupType StartupReason(); |
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60 /** |
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61 * Read and return the the CPU ID |
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62 * @return An integer containing the CPU ID string read off the hardware |
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63 */ |
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64 IMPORT_C static TInt CpuVersionId(); |
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65 /** |
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66 * Read Linear base address of debug UART (as selected in obey file or with eshell debugport command). |
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67 * @return An integer containing the Linear address of debug Serial Port |
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68 */ |
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69 IMPORT_C static TUint DebugPortAddr(); |
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70 /** |
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71 * Read CPU clock period in picoseconds |
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72 * @return An integer containing the CPU clock period in picoseconds |
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73 */ |
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74 IMPORT_C static TUint ProcessorPeriodInPs(); |
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75 /** |
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76 * Read the current time of the RTC |
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77 * @return A value that is the real time as given by a RTC |
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78 */ |
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79 IMPORT_C static TUint RtcData(); |
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80 /** |
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81 * Set the RTC time |
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82 * @param aValue The real time to set the RTC |
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83 */ |
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84 IMPORT_C static void SetRtcData(TUint aValue); |
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85 /** |
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86 * Obtain the physical start address of Video Buffer |
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87 * @return the physical start address of Video Buffer |
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88 */ |
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89 IMPORT_C static TPhysAddr VideoRamPhys(); |
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90 static void InitDebugOutput(); |
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91 static void DoDebugOutput(TUint aLetter); |
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92 |
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93 private: |
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94 /** Assp-specific implementation for Kern::NanoWait function */ |
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95 static void NanoWait(TUint32 aInterval); |
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96 }; |
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97 |
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98 /** All ASSP interrupt souces. */ |
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99 enum TNaviEngineAsspInterruptId |
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100 { |
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101 // The list of core interrupts. |
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102 KIntIdDigitiser, // Not a valid value. ///< Internal, clients get value from HCR |
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103 KIntIdSound, // Not a valid value. ///< Internal, clients get value from HCR |
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104 KIntIdTimer1, // Not a valid value. (Used in template media driver) ///< Internal, clients get value from HCR |
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105 KIntIdExpansion, // Not a valid value. (Second level interrupt controller) ///< Internal, clients get value from HCR |
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106 EAsspIntIdUsb=11, // Not a valid value. ///< Internal, clients get value from HCR |
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107 |
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108 KIntCsi0 = 34, ///< Internal, clients get value from HCR |
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109 KIntCsi1 = 35, ///< Internal, clients get value from HCR |
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110 |
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111 KIntIdOstMatchMsTimer = 36, // SoC Timer0 interrupt ///< Internal, clients get value from HCR |
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112 KIntId1stMatchMsTimer = 37, // SoC Timer1 interrupt ///< Internal, clients get value from HCR |
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113 KIntId2stMatchMsTimer = 38, // SoC Timer2 interrupt ///< Internal, clients get value from HCR |
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114 KIntId3stMatchMsTimer = 39, // SoC Timer3 interrupt ///< Internal, clients get value from HCR |
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115 KIntId4stMatchMsTimer = 41, // SoC Timer4 interrupt ///< Internal, clients get value from HCR |
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116 KIntId5stMatchMsTimer = 42, // SoC Timer5 interrupt ///< Internal, clients get value from HCR |
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117 |
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118 EIntSd0 = 43, // SD #0 : OXMNIRQ ///< Internal, clients get value from HCR |
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119 EIntSd1 = 44, // SD #1 : OXASIOIRQ //SDIO ///< Internal, clients get value from HCR |
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120 |
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121 EIntNandCtrl = 46, // Nand Controller ///< Internal, clients get value from HCR |
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122 |
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123 EIntDisp0 = 50, // DISP 0 ///< Internal, clients get value from HCR |
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124 |
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125 KIntI2S0 = 56, // I2S 0 Interrupts ///< Internal, clients get value from HCR |
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126 |
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127 EIntPciInt = 65, // PCI Int ///< Internal, clients get value from HCR |
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128 EIntPciSErrB = 66, // PCI Systerm Error ///< Internal, clients get value from HCR |
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129 EIntPciPErrB = 67, // PCI Parity Error ///< Internal, clients get value from HCR |
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130 EIntUsbHIntA = 71, // USB Host Int A ///< Internal, clients get value from HCR |
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131 EIntUsbHIntB = 72, // USB Host Int B ///< Internal, clients get value from HCR |
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132 EIntUsbHSmi = 73, // USB Host System Management Interrupt ///< Internal, clients get value from HCR |
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133 EIntUsbHPme = 74, // USB Host Power Management Event ///< Internal, clients get value from HCR |
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134 KIntDMAC32_0_End = 76, ///< Internal, clients get value from HCR |
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135 KIntDMAC32_0_Err = 77, ///< Internal, clients get value from HCR |
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136 KIntDMAC32_1_End = 78, ///< Internal, clients get value from HCR |
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137 KIntDMAC32_1_Err = 79, ///< Internal, clients get value from HCR |
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138 KIntDMAC32_2_End = 80, ///< Internal, clients get value from HCR |
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139 KIntDMAC32_2_Err = 81, ///< Internal, clients get value from HCR |
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140 KIntDMAC32_3_End = 82, ///< Internal, clients get value from HCR |
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141 KIntDMAC32_3_Err = 83, ///< Internal, clients get value from HCR |
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142 KIntDMAC32_4_End = 84, ///< Internal, clients get value from HCR |
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143 KIntDMAC32_4_Err = 85, ///< Internal, clients get value from HCR |
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144 |
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145 KIntIdUart0 = 86, // SoC Uart #0 ///< Internal, clients get value from HCR |
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146 KIntIdUart1 = 87, // SoC Uart #1 ///< Internal, clients get value from HCR |
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147 KIntIdUart2 = 88, // SoC Uart #2 ///< Internal, clients get value from HCR |
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148 |
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149 KIntIdGpio = 94, // gpio ///< Internal, clients get value from HCR |
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150 KIntDMAC64_End = 97, ///< Internal, clients get value from HCR |
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151 KIntDMAC64_Err = 98, ///< Internal, clients get value from HCR |
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152 |
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153 KIntCpuProfilingDefaultInterruptBase = 99, //Interrupt used by sampling profilers. |
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154 //Each CPU_i is interrupted by interrupt number ECpuProfilingInterrupt + i. |
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155 //Therefore we need 1 interrupt per CPU, 99, 100, 101, 102. |
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156 |
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157 KIntDMAExBus_End = 124, ///< Internal, clients get value from HCR |
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158 KIntDMAExBus_Err = 125, ///< Internal, clients get value from HCR |
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159 |
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160 KNumNaviEngineInts = 128, // Must be >= then the highest interrupt number in use |
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161 KNumNaviEngineMaxInts = 256 // The number of interrupt sources in processors. |
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162 }; |
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163 |
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164 |
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165 class NaviEngineInterrupt : public Interrupt |
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166 { |
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167 public: |
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168 /** |
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169 * These functions are required to initialise the Interrupt controller,or perform housekeeping |
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170 * functions, or dispatch the incoming IRQ or FIQ interrupts. |
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171 */ |
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172 |
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173 /** |
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174 * initialisation |
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175 */ |
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176 static void Init1(); |
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177 static void Init3(); |
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178 |
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179 /** |
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180 * Housekeeping (disable and clear all hardware interrupt sources) |
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181 */ |
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182 static void DisableAndClearAll(); |
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183 |
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184 #ifdef __SMP__ |
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185 /** |
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186 * IRQ/FIQ dispatchers |
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187 */ |
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188 static TUint32 IrqDispatch(TUint32 aVector); |
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189 static void FiqDispatch(); |
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190 #endif |
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191 #ifndef __SMP__ |
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192 /** |
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193 * IRQ/FIQ dispatchers |
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194 */ |
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195 static void IrqDispatch(); |
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196 static void FiqDispatch(); |
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197 /** |
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198 * Empty interrupt handler |
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199 */ |
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200 static void Spurious(TAny* anId); |
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201 |
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202 static SInterruptHandler Handlers[KNumNaviEngineInts]; |
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203 #endif |
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204 }; |
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205 |
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206 class NaviEngineAssp : public Asic |
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207 { |
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208 public: |
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209 IMPORT_C NaviEngineAssp(); |
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210 |
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211 public: |
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212 /** |
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213 * These are the mandatory Asic class functions which are implemented here rather than in the Variant. |
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214 * It makes sense having an ASSP class when there is functionality at Variant/Core level which is common |
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215 * to a group of devices and is provided by an IP block(s) which is likely to be used in future generations |
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216 * of the same family of devices. |
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217 * In general the common functionality includes first-level Interrupt controllers, Power and Reset controllers, |
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218 * and timing functions |
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219 */ |
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220 |
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221 /** |
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222 * initialisation |
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223 */ |
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224 IMPORT_C virtual void Init1(); |
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225 IMPORT_C virtual void Init3(); |
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226 /** |
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227 * Read and return the Startup reason of the Super Page (set up by Bootstrap) |
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228 * @return A TMachineStartupType enumerated value |
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229 * @see TMachineStartupType |
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230 */ |
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231 IMPORT_C virtual TMachineStartupType StartupReason(); |
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232 |
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233 /** |
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234 * timing functions |
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235 */ |
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236 |
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237 /** |
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238 * Obtain the period of System Tick timer in microseconds |
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239 * @return Period of System Tick timer in microseconds |
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240 */ |
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241 IMPORT_C virtual TInt MsTickPeriod(); |
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242 /** |
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243 * Obtain System Time from the RTC |
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244 * @return System Time in seconds from 00:00 hours of 1/1/2000 |
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245 */ |
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246 IMPORT_C virtual TInt SystemTimeInSecondsFrom2000(TInt& aTime); |
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247 /** |
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248 * Obtain Adjust the RTC with new System Time (from 00:00 hours of 1/1/2000) |
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249 * @return System wide error code |
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250 */ |
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251 IMPORT_C virtual TInt SetSystemTimeInSecondsFrom2000(TInt aTime); |
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252 /** |
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253 * Obtain the time it takes to execute two processor instructions |
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254 * @return Time in nanoseconds it takes two execute 2 instructions at the processor clock speed |
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255 */ |
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256 IMPORT_C virtual TUint32 NanoWaitCalibration(); |
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257 /** |
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258 * @param aChar Character to be output by debug serial port |
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259 */ |
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260 IMPORT_C virtual void DebugOutput(TUint aChar); |
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261 |
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262 public: |
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263 /** |
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264 * for derivation by Variant |
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265 */ |
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266 |
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267 /** |
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268 * external interrupt handling |
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269 * used by second-level interrupt controllers at Variant level |
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270 */ |
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271 virtual TInt InterruptBind(TInt anId, TIsr anIsr, TAny* aPtr)=0; |
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272 virtual TInt InterruptUnbind(TInt anId)=0; |
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273 virtual TInt InterruptEnable(TInt anId)=0; |
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274 virtual TInt InterruptDisable(TInt anId)=0; |
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275 virtual TInt InterruptClear(TInt anId)=0; |
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276 |
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277 /** |
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278 * USB client controller - Some example functions for the case that USB cable detection and |
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279 * UDC connect/disconnect functionality are part of the Variant. |
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280 * Pure virtual functions called by the USB PSL, to be implemented by the Variant (derived class). |
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281 * If this functionality is part of the ASSP then these functions can be removed and calls to them |
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282 * in the PSL (./pa_usbc.cpp) replaced by the appropriate internal operations. |
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283 */ |
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284 virtual TBool UsbClientConnectorDetectable()=0; |
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285 virtual TBool UsbClientConnectorInserted()=0; |
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286 virtual TInt RegisterUsbClientConnectorCallback(TInt (*aCallback)(TAny*), TAny* aPtr)=0; |
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287 virtual void UnregisterUsbClientConnectorCallback()=0; |
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288 virtual TBool UsbSoftwareConnectable()=0; |
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289 virtual TInt UsbConnect()=0; |
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290 virtual TInt UsbDisconnect()=0; |
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291 |
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292 /** |
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293 * miscellaneous |
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294 */ |
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295 virtual TInt VideoRamSize()=0; |
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296 |
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297 public: |
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298 static NaviEngineAssp* Variant; |
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299 static TPhysAddr VideoRamPhys; |
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300 NTimerQ* iTimerQ; |
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301 TBool iDebugInitialised; |
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302 }; |
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303 |
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304 #endif |