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/*
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* BusDrv.h
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*
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* Copyright(c) 1998 - 2010 Texas Instruments. All rights reserved.
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* All rights reserved.
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*
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* This program and the accompanying materials are made available under the
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* terms of the Eclipse Public License v1.0 or BSD License which accompanies
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* this distribution. The Eclipse Public License is available at
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* http://www.eclipse.org/legal/epl-v10.html and the BSD License is as below.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* * Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* * Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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* * Neither the name Texas Instruments nor the names of its
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* contributors may be used to endorse or promote products derived
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* from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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/** \file BusDrv.h
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* \brief Bus-Driver module API definition
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*
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* \see SdioBusDrv.c, WspiBusDrv.c
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*/
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#ifndef __BUS_DRV_API_H__
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#define __BUS_DRV_API_H__
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#include "TxnDefs.h"
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#include "queue.h"
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/************************************************************************
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* Defines
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************************************************************************/
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/* In SDIO block-mode: BlkSize = 1 << BlkSizeShift (current block size is: 1<<9 = 512 bytes) */
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#define SDIO_BLK_SIZE_SHIFT_MIN 0
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#define SDIO_BLK_SIZE_SHIFT_MAX 16
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#define SDIO_BLK_SIZE_SHIFT_DEF 9
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#define WSPI_PAD_LEN_WRITE 4
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#define WSPI_PAD_LEN_READ 8
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#define MAX_XFER_BUFS 4
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#define TXN_PARAM_STATUS_OK 0
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#define TXN_PARAM_STATUS_ERROR 1
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#define TXN_PARAM_STATUS_RECOVERY 2
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#define TXN_DIRECTION_WRITE 0
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#define TXN_DIRECTION_READ 1
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#define TXN_FUNC_ID_CTRL 0
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#define TXN_FUNC_ID_BT 1
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#define TXN_FUNC_ID_WLAN 2
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#define TXN_HIGH_PRIORITY 0
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#define TXN_LOW_PRIORITY 1
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#define TXN_NUM_PRIORITYS 2
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#define TXN_INC_ADDR 0
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#define TXN_FIXED_ADDR 1
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#define TXN_NON_SLEEP_ELP 1
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#define TXN_SLEEP_ELP 0
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#define TXN_AGGREGATE_OFF 0
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#define TXN_AGGREGATE_ON 1
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#define NUM_OF_PARTITION 4
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/************************************************************************
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* Macros
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************************************************************************/
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/* Get field from TTxnStruct->uTxnParams */
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#define TXN_PARAM_GET_PRIORITY(pTxn) ( (pTxn->uTxnParams & 0x00000003) >> 0 )
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#define TXN_PARAM_GET_FUNC_ID(pTxn) ( (pTxn->uTxnParams & 0x0000000C) >> 2 )
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#define TXN_PARAM_GET_DIRECTION(pTxn) ( (pTxn->uTxnParams & 0x00000010) >> 4 )
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#define TXN_PARAM_GET_FIXED_ADDR(pTxn) ( (pTxn->uTxnParams & 0x00000020) >> 5 )
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#define TXN_PARAM_GET_MORE(pTxn) ( (pTxn->uTxnParams & 0x00000040) >> 6 )
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#define TXN_PARAM_GET_SINGLE_STEP(pTxn) ( (pTxn->uTxnParams & 0x00000080) >> 7 )
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#define TXN_PARAM_GET_STATUS(pTxn) ( (pTxn->uTxnParams & 0x00000F00) >> 8 )
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#define TXN_PARAM_GET_AGGREGATE(pTxn) ( (pTxn->uTxnParams & 0x00001000) >> 12 )
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/* Set field in TTxnStruct->uTxnParams */
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#define TXN_PARAM_SET_PRIORITY(pTxn, uValue) ( pTxn->uTxnParams = (pTxn->uTxnParams & ~0x00000003) | (uValue << 0 ) )
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#define TXN_PARAM_SET_FUNC_ID(pTxn, uValue) ( pTxn->uTxnParams = (pTxn->uTxnParams & ~0x0000000C) | (uValue << 2 ) )
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#define TXN_PARAM_SET_DIRECTION(pTxn, uValue) ( pTxn->uTxnParams = (pTxn->uTxnParams & ~0x00000010) | (uValue << 4 ) )
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#define TXN_PARAM_SET_FIXED_ADDR(pTxn, uValue) ( pTxn->uTxnParams = (pTxn->uTxnParams & ~0x00000020) | (uValue << 5 ) )
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#define TXN_PARAM_SET_MORE(pTxn, uValue) ( pTxn->uTxnParams = (pTxn->uTxnParams & ~0x00000040) | (uValue << 6 ) )
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#define TXN_PARAM_SET_SINGLE_STEP(pTxn, uValue) ( pTxn->uTxnParams = (pTxn->uTxnParams & ~0x00000080) | (uValue << 7 ) )
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#define TXN_PARAM_SET_STATUS(pTxn, uValue) ( pTxn->uTxnParams = (pTxn->uTxnParams & ~0x00000F00) | (uValue << 8 ) )
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#define TXN_PARAM_SET_AGGREGATE(pTxn, uValue) ( pTxn->uTxnParams = (pTxn->uTxnParams & ~0x00001000) | (uValue << 12 ) )
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#define TXN_PARAM_SET(pTxn, uPriority, uId, uDirection, uAddr) \
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TXN_PARAM_SET_PRIORITY(pTxn, uPriority); \
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TXN_PARAM_SET_FUNC_ID(pTxn, uId); \
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TXN_PARAM_SET_DIRECTION(pTxn, uDirection); \
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TXN_PARAM_SET_FIXED_ADDR(pTxn, uAddr);
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#define BUILD_TTxnStruct(pTxn, uAddr, pBuf, uLen, fCB, hCB) \
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pTxn->aBuf[0] = (TI_UINT8*)(pBuf); \
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pTxn->aLen[0] = (TI_UINT16)(uLen); \
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pTxn->aLen[1] = 0; \
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pTxn->uHwAddr = uAddr; \
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pTxn->hCbHandle = (void*)hCB; \
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pTxn->fTxnDoneCb = fCB;
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/************************************************************************
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* Types
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************************************************************************/
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/* The TxnDone CB called by the bus driver upon Async Txn completion */
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typedef void (*TBusDrvTxnDoneCb)(TI_HANDLE hCbHandle, void *pTxn);
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/* The TxnDone CB called by the TxnQueue upon Async Txn completion */
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typedef void (*TTxnQueueDoneCb)(TI_HANDLE hCbHandle, void *pTxn);
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/* The TxnDone CB of the specific Txn originator (Xfer layer) called upon Async Txn completion */
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typedef void (*TTxnDoneCb)(TI_HANDLE hCbHandle, void *pTxn);
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/* The transactions structure */
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typedef struct
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{
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TQueNodeHdr tTxnQNode; /* Header for queueing */
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TI_UINT32 uTxnParams; /* Txn attributes (bit fields) - see macros above */
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TI_UINT32 uHwAddr; /* Physical (32 bits) HW Address */
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TTxnDoneCb fTxnDoneCb; /* CB called by TwIf upon Async Txn completion (may be NULL) */
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TI_HANDLE hCbHandle; /* The handle to use when calling fTxnDoneCb */
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TI_UINT16 aLen[MAX_XFER_BUFS]; /* Lengths of the following aBuf data buffers respectively.
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Zero length marks last used buffer, or MAX_XFER_BUFS of all are used. */
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TI_UINT8* aBuf[MAX_XFER_BUFS]; /* Host data buffers to be written to or read from the device */
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} TTxnStruct;
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/* Parameters for all bus types configuration in ConnectBus process */
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typedef struct
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{
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TI_UINT32 uBlkSizeShift;
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} TSdioCfg;
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typedef struct
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{
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TI_UINT32 uDummy;
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} TWspiCfg;
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typedef struct
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{
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TI_UINT32 uBaudRate;
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} TUartCfg;
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typedef union
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{
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TSdioCfg tSdioCfg;
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TWspiCfg tWspiCfg;
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TUartCfg tUartCfg;
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} TBusDrvCfg;
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typedef struct
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{
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TI_UINT32 uMemAdrr;
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TI_UINT32 uMemSize;
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} TPartition;
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/************************************************************************
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* Functions
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************************************************************************/
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TI_HANDLE busDrv_Create (TI_HANDLE hOs);
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TI_STATUS busDrv_Destroy (TI_HANDLE hBusDrv);
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void busDrv_Init (TI_HANDLE hBusDrv, TI_HANDLE hReport);
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TI_STATUS busDrv_ConnectBus (TI_HANDLE hBusDrv,
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TBusDrvCfg *pBusDrvCfg,
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TBusDrvTxnDoneCb fCbFunc,
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TI_HANDLE hCbArg,
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TBusDrvTxnDoneCb fConnectCbFunc);
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TI_STATUS busDrv_DisconnectBus (TI_HANDLE hBusDrv);
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ETxnStatus busDrv_Transact (TI_HANDLE hBusDrv, TTxnStruct *pTxn);
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TI_HANDLE busDrv_Cfg (TI_HANDLE hOs);
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#endif /*__BUS_DRV_API_H__*/
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