JavaScriptCore/assembler/ARMAssembler.cpp
author Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
Fri, 17 Sep 2010 09:02:29 +0300
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/*
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 * Copyright (C) 2009 University of Szeged
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 * All rights reserved.
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 *
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 * Redistribution and use in source and binary forms, with or without
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 * modification, are permitted provided that the following conditions
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 * are met:
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 * 1. Redistributions of source code must retain the above copyright
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 *    notice, this list of conditions and the following disclaimer.
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 * 2. Redistributions in binary form must reproduce the above copyright
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 *    notice, this list of conditions and the following disclaimer in the
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 *    documentation and/or other materials provided with the distribution.
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 *
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 * THIS SOFTWARE IS PROVIDED BY UNIVERSITY OF SZEGED ``AS IS'' AND ANY
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 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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 * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL UNIVERSITY OF SZEGED OR
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 * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
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 * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
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 * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
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 * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
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 * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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 */
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#include "config.h"
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#if ENABLE(ASSEMBLER) && CPU(ARM_TRADITIONAL)
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#include "ARMAssembler.h"
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namespace JSC {
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// Patching helpers
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void ARMAssembler::patchConstantPoolLoad(void* loadAddr, void* constPoolAddr)
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{
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    ARMWord *ldr = reinterpret_cast<ARMWord*>(loadAddr);
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    ARMWord diff = reinterpret_cast<ARMWord*>(constPoolAddr) - ldr;
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    ARMWord index = (*ldr & 0xfff) >> 1;
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    ASSERT(diff >= 1);
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    if (diff >= 2 || index > 0) {
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        diff = (diff + index - 2) * sizeof(ARMWord);
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        ASSERT(diff <= 0xfff);
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        *ldr = (*ldr & ~0xfff) | diff;
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    } else
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        *ldr = (*ldr & ~(0xfff | ARMAssembler::DT_UP)) | sizeof(ARMWord);
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}
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// Handle immediates
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ARMWord ARMAssembler::getOp2(ARMWord imm)
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{
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    int rol;
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    if (imm <= 0xff)
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        return OP2_IMM | imm;
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    if ((imm & 0xff000000) == 0) {
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        imm <<= 8;
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        rol = 8;
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    }
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    else {
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        imm = (imm << 24) | (imm >> 8);
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        rol = 0;
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    }
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    if ((imm & 0xff000000) == 0) {
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        imm <<= 8;
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        rol += 4;
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    }
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    if ((imm & 0xf0000000) == 0) {
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        imm <<= 4;
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        rol += 2;
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    }
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    if ((imm & 0xc0000000) == 0) {
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        imm <<= 2;
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        rol += 1;
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    }
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    if ((imm & 0x00ffffff) == 0)
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        return OP2_IMM | (imm >> 24) | (rol << 8);
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    return INVALID_IMM;
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}
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int ARMAssembler::genInt(int reg, ARMWord imm, bool positive)
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{
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    // Step1: Search a non-immediate part
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    ARMWord mask;
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    ARMWord imm1;
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    ARMWord imm2;
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    int rol;
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    mask = 0xff000000;
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    rol = 8;
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    while(1) {
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        if ((imm & mask) == 0) {
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            imm = (imm << rol) | (imm >> (32 - rol));
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            rol = 4 + (rol >> 1);
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            break;
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        }
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        rol += 2;
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        mask >>= 2;
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        if (mask & 0x3) {
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            // rol 8
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            imm = (imm << 8) | (imm >> 24);
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            mask = 0xff00;
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parents:
diff changeset
   113
            rol = 24;
4f2f89ce4247 Revision: 201037
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
diff changeset
   114
            while (1) {
4f2f89ce4247 Revision: 201037
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
diff changeset
   115
                if ((imm & mask) == 0) {
4f2f89ce4247 Revision: 201037
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
diff changeset
   116
                    imm = (imm << rol) | (imm >> (32 - rol));
4f2f89ce4247 Revision: 201037
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
diff changeset
   117
                    rol = (rol >> 1) - 8;
4f2f89ce4247 Revision: 201037
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
diff changeset
   118
                    break;
4f2f89ce4247 Revision: 201037
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
diff changeset
   119
                }
4f2f89ce4247 Revision: 201037
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
diff changeset
   120
                rol += 2;
4f2f89ce4247 Revision: 201037
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
diff changeset
   121
                mask >>= 2;
4f2f89ce4247 Revision: 201037
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
diff changeset
   122
                if (mask & 0x3)
4f2f89ce4247 Revision: 201037
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
diff changeset
   123
                    return 0;
4f2f89ce4247 Revision: 201037
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
diff changeset
   124
            }
4f2f89ce4247 Revision: 201037
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
diff changeset
   125
            break;
4f2f89ce4247 Revision: 201037
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
diff changeset
   126
        }
4f2f89ce4247 Revision: 201037
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
diff changeset
   127
    }
4f2f89ce4247 Revision: 201037
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
diff changeset
   128
4f2f89ce4247 Revision: 201037
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
diff changeset
   129
    ASSERT((imm & 0xff) == 0);
4f2f89ce4247 Revision: 201037
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
diff changeset
   130
4f2f89ce4247 Revision: 201037
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
diff changeset
   131
    if ((imm & 0xff000000) == 0) {
4f2f89ce4247 Revision: 201037
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
diff changeset
   132
        imm1 = OP2_IMM | ((imm >> 16) & 0xff) | (((rol + 4) & 0xf) << 8);
4f2f89ce4247 Revision: 201037
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
diff changeset
   133
        imm2 = OP2_IMM | ((imm >> 8) & 0xff) | (((rol + 8) & 0xf) << 8);
4f2f89ce4247 Revision: 201037
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
diff changeset
   134
    } else if (imm & 0xc0000000) {
4f2f89ce4247 Revision: 201037
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
diff changeset
   135
        imm1 = OP2_IMM | ((imm >> 24) & 0xff) | ((rol & 0xf) << 8);
4f2f89ce4247 Revision: 201037
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
diff changeset
   136
        imm <<= 8;
4f2f89ce4247 Revision: 201037
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
diff changeset
   137
        rol += 4;
4f2f89ce4247 Revision: 201037
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
diff changeset
   138
4f2f89ce4247 Revision: 201037
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
diff changeset
   139
        if ((imm & 0xff000000) == 0) {
4f2f89ce4247 Revision: 201037
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
diff changeset
   140
            imm <<= 8;
4f2f89ce4247 Revision: 201037
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
diff changeset
   141
            rol += 4;
4f2f89ce4247 Revision: 201037
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
diff changeset
   142
        }
4f2f89ce4247 Revision: 201037
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
diff changeset
   143
4f2f89ce4247 Revision: 201037
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
diff changeset
   144
        if ((imm & 0xf0000000) == 0) {
4f2f89ce4247 Revision: 201037
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
diff changeset
   145
            imm <<= 4;
4f2f89ce4247 Revision: 201037
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
diff changeset
   146
            rol += 2;
4f2f89ce4247 Revision: 201037
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
diff changeset
   147
        }
4f2f89ce4247 Revision: 201037
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
diff changeset
   148
4f2f89ce4247 Revision: 201037
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
diff changeset
   149
        if ((imm & 0xc0000000) == 0) {
4f2f89ce4247 Revision: 201037
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
diff changeset
   150
            imm <<= 2;
4f2f89ce4247 Revision: 201037
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
diff changeset
   151
            rol += 1;
4f2f89ce4247 Revision: 201037
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
diff changeset
   152
        }
4f2f89ce4247 Revision: 201037
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
diff changeset
   153
4f2f89ce4247 Revision: 201037
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
diff changeset
   154
        if ((imm & 0x00ffffff) == 0)
4f2f89ce4247 Revision: 201037
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
diff changeset
   155
            imm2 = OP2_IMM | (imm >> 24) | ((rol & 0xf) << 8);
4f2f89ce4247 Revision: 201037
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
diff changeset
   156
        else
4f2f89ce4247 Revision: 201037
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
diff changeset
   157
            return 0;
4f2f89ce4247 Revision: 201037
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
diff changeset
   158
    } else {
4f2f89ce4247 Revision: 201037
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
diff changeset
   159
        if ((imm & 0xf0000000) == 0) {
4f2f89ce4247 Revision: 201037
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
diff changeset
   160
            imm <<= 4;
4f2f89ce4247 Revision: 201037
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
diff changeset
   161
            rol += 2;
4f2f89ce4247 Revision: 201037
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
diff changeset
   162
        }
4f2f89ce4247 Revision: 201037
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
diff changeset
   163
4f2f89ce4247 Revision: 201037
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
diff changeset
   164
        if ((imm & 0xc0000000) == 0) {
4f2f89ce4247 Revision: 201037
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
diff changeset
   165
            imm <<= 2;
4f2f89ce4247 Revision: 201037
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
diff changeset
   166
            rol += 1;
4f2f89ce4247 Revision: 201037
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
diff changeset
   167
        }
4f2f89ce4247 Revision: 201037
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
diff changeset
   168
4f2f89ce4247 Revision: 201037
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
diff changeset
   169
        imm1 = OP2_IMM | ((imm >> 24) & 0xff) | ((rol & 0xf) << 8);
4f2f89ce4247 Revision: 201037
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
diff changeset
   170
        imm <<= 8;
4f2f89ce4247 Revision: 201037
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
diff changeset
   171
        rol += 4;
4f2f89ce4247 Revision: 201037
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
diff changeset
   172
4f2f89ce4247 Revision: 201037
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
diff changeset
   173
        if ((imm & 0xf0000000) == 0) {
4f2f89ce4247 Revision: 201037
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
diff changeset
   174
            imm <<= 4;
4f2f89ce4247 Revision: 201037
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
diff changeset
   175
            rol += 2;
4f2f89ce4247 Revision: 201037
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
diff changeset
   176
        }
4f2f89ce4247 Revision: 201037
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
diff changeset
   177
4f2f89ce4247 Revision: 201037
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
diff changeset
   178
        if ((imm & 0xc0000000) == 0) {
4f2f89ce4247 Revision: 201037
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
diff changeset
   179
            imm <<= 2;
4f2f89ce4247 Revision: 201037
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
diff changeset
   180
            rol += 1;
4f2f89ce4247 Revision: 201037
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
diff changeset
   181
        }
4f2f89ce4247 Revision: 201037
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
diff changeset
   182
4f2f89ce4247 Revision: 201037
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
diff changeset
   183
        if ((imm & 0x00ffffff) == 0)
4f2f89ce4247 Revision: 201037
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
diff changeset
   184
            imm2 = OP2_IMM | (imm >> 24) | ((rol & 0xf) << 8);
4f2f89ce4247 Revision: 201037
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
diff changeset
   185
        else
4f2f89ce4247 Revision: 201037
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
diff changeset
   186
            return 0;
4f2f89ce4247 Revision: 201037
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
diff changeset
   187
    }
4f2f89ce4247 Revision: 201037
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
diff changeset
   188
4f2f89ce4247 Revision: 201037
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
diff changeset
   189
    if (positive) {
4f2f89ce4247 Revision: 201037
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
diff changeset
   190
        mov_r(reg, imm1);
4f2f89ce4247 Revision: 201037
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
diff changeset
   191
        orr_r(reg, reg, imm2);
4f2f89ce4247 Revision: 201037
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
diff changeset
   192
    } else {
4f2f89ce4247 Revision: 201037
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
diff changeset
   193
        mvn_r(reg, imm1);
4f2f89ce4247 Revision: 201037
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
diff changeset
   194
        bic_r(reg, reg, imm2);
4f2f89ce4247 Revision: 201037
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
diff changeset
   195
    }
4f2f89ce4247 Revision: 201037
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
diff changeset
   196
4f2f89ce4247 Revision: 201037
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
diff changeset
   197
    return 1;
4f2f89ce4247 Revision: 201037
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
diff changeset
   198
}
4f2f89ce4247 Revision: 201037
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
diff changeset
   199
4f2f89ce4247 Revision: 201037
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
diff changeset
   200
ARMWord ARMAssembler::getImm(ARMWord imm, int tmpReg, bool invert)
4f2f89ce4247 Revision: 201037
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
diff changeset
   201
{
4f2f89ce4247 Revision: 201037
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
diff changeset
   202
    ARMWord tmp;
4f2f89ce4247 Revision: 201037
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
diff changeset
   203
4f2f89ce4247 Revision: 201037
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
diff changeset
   204
    // Do it by 1 instruction
4f2f89ce4247 Revision: 201037
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
diff changeset
   205
    tmp = getOp2(imm);
4f2f89ce4247 Revision: 201037
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
diff changeset
   206
    if (tmp != INVALID_IMM)
4f2f89ce4247 Revision: 201037
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
diff changeset
   207
        return tmp;
4f2f89ce4247 Revision: 201037
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
diff changeset
   208
4f2f89ce4247 Revision: 201037
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
diff changeset
   209
    tmp = getOp2(~imm);
4f2f89ce4247 Revision: 201037
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
diff changeset
   210
    if (tmp != INVALID_IMM) {
4f2f89ce4247 Revision: 201037
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
diff changeset
   211
        if (invert)
4f2f89ce4247 Revision: 201037
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
diff changeset
   212
            return tmp | OP2_INV_IMM;
4f2f89ce4247 Revision: 201037
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
diff changeset
   213
        mvn_r(tmpReg, tmp);
4f2f89ce4247 Revision: 201037
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
diff changeset
   214
        return tmpReg;
4f2f89ce4247 Revision: 201037
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
diff changeset
   215
    }
4f2f89ce4247 Revision: 201037
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
diff changeset
   216
4f2f89ce4247 Revision: 201037
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
diff changeset
   217
    return encodeComplexImm(imm, tmpReg);
4f2f89ce4247 Revision: 201037
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
diff changeset
   218
}
4f2f89ce4247 Revision: 201037
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
diff changeset
   219
4f2f89ce4247 Revision: 201037
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
diff changeset
   220
void ARMAssembler::moveImm(ARMWord imm, int dest)
4f2f89ce4247 Revision: 201037
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
diff changeset
   221
{
4f2f89ce4247 Revision: 201037
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
diff changeset
   222
    ARMWord tmp;
4f2f89ce4247 Revision: 201037
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
diff changeset
   223
4f2f89ce4247 Revision: 201037
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
diff changeset
   224
    // Do it by 1 instruction
4f2f89ce4247 Revision: 201037
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
diff changeset
   225
    tmp = getOp2(imm);
4f2f89ce4247 Revision: 201037
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
diff changeset
   226
    if (tmp != INVALID_IMM) {
4f2f89ce4247 Revision: 201037
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
diff changeset
   227
        mov_r(dest, tmp);
4f2f89ce4247 Revision: 201037
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
diff changeset
   228
        return;
4f2f89ce4247 Revision: 201037
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    }
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   230
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    tmp = getOp2(~imm);
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   232
    if (tmp != INVALID_IMM) {
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   233
        mvn_r(dest, tmp);
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   234
        return;
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   235
    }
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   236
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   237
    encodeComplexImm(imm, dest);
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   238
}
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   239
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ARMWord ARMAssembler::encodeComplexImm(ARMWord imm, int dest)
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   241
{
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   242
#if WTF_ARM_ARCH_AT_LEAST(7)
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   243
    ARMWord tmp = getImm16Op2(imm);
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   244
    if (tmp != INVALID_IMM) {
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   245
        movw_r(dest, tmp);
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   246
        return dest;
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   247
    }
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    movw_r(dest, getImm16Op2(imm & 0xffff));
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   249
    movt_r(dest, getImm16Op2(imm >> 16));
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    return dest;
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   251
#else
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   252
    // Do it by 2 instruction
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   253
    if (genInt(dest, imm, true))
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   254
        return dest;
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   255
    if (genInt(dest, ~imm, false))
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   256
        return dest;
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   257
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   258
    ldr_imm(dest, imm);
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   259
    return dest;
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   260
#endif
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   261
}
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   262
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   263
// Memory load/store helpers
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   264
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   265
void ARMAssembler::dataTransfer32(bool isLoad, RegisterID srcDst, RegisterID base, int32_t offset, bool bytes)
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   266
{
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   267
    ARMWord transferFlag = bytes ? DT_BYTE : 0;
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   268
    if (offset >= 0) {
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   269
        if (offset <= 0xfff)
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            dtr_u(isLoad, srcDst, base, offset | transferFlag);
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   271
        else if (offset <= 0xfffff) {
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   272
            add_r(ARMRegisters::S0, base, OP2_IMM | (offset >> 12) | (10 << 8));
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   273
            dtr_u(isLoad, srcDst, ARMRegisters::S0, (offset & 0xfff) | transferFlag);
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   274
        } else {
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   275
            moveImm(offset, ARMRegisters::S0);
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   276
            dtr_ur(isLoad, srcDst, base, ARMRegisters::S0 | transferFlag);
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   277
        }
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diff changeset
   278
    } else {
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   279
        offset = -offset;
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   280
        if (offset <= 0xfff)
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   281
            dtr_d(isLoad, srcDst, base, offset | transferFlag);
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   282
        else if (offset <= 0xfffff) {
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diff changeset
   283
            sub_r(ARMRegisters::S0, base, OP2_IMM | (offset >> 12) | (10 << 8));
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diff changeset
   284
            dtr_d(isLoad, srcDst, ARMRegisters::S0, (offset & 0xfff) | transferFlag);
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diff changeset
   285
        } else {
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   286
            moveImm(offset, ARMRegisters::S0);
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diff changeset
   287
            dtr_dr(isLoad, srcDst, base, ARMRegisters::S0 | transferFlag);
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   288
        }
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diff changeset
   289
    }
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diff changeset
   290
}
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diff changeset
   291
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   292
void ARMAssembler::baseIndexTransfer32(bool isLoad, RegisterID srcDst, RegisterID base, RegisterID index, int scale, int32_t offset)
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diff changeset
   293
{
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   294
    ARMWord op2;
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diff changeset
   295
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   296
    ASSERT(scale >= 0 && scale <= 3);
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diff changeset
   297
    op2 = lsl(index, scale);
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parents:
diff changeset
   298
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diff changeset
   299
    if (offset >= 0 && offset <= 0xfff) {
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diff changeset
   300
        add_r(ARMRegisters::S0, base, op2);
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parents:
diff changeset
   301
        dtr_u(isLoad, srcDst, ARMRegisters::S0, offset);
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diff changeset
   302
        return;
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diff changeset
   303
    }
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parents:
diff changeset
   304
    if (offset <= 0 && offset >= -0xfff) {
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parents:
diff changeset
   305
        add_r(ARMRegisters::S0, base, op2);
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parents:
diff changeset
   306
        dtr_d(isLoad, srcDst, ARMRegisters::S0, -offset);
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parents:
diff changeset
   307
        return;
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parents:
diff changeset
   308
    }
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parents:
diff changeset
   309
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diff changeset
   310
    ldr_un_imm(ARMRegisters::S0, offset);
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parents:
diff changeset
   311
    add_r(ARMRegisters::S0, ARMRegisters::S0, op2);
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parents:
diff changeset
   312
    dtr_ur(isLoad, srcDst, base, ARMRegisters::S0);
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diff changeset
   313
}
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parents:
diff changeset
   314
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diff changeset
   315
void ARMAssembler::doubleTransfer(bool isLoad, FPRegisterID srcDst, RegisterID base, int32_t offset)
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diff changeset
   316
{
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diff changeset
   317
    if (offset & 0x3) {
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parents:
diff changeset
   318
        if (offset <= 0x3ff && offset >= 0) {
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parents:
diff changeset
   319
            fdtr_u(isLoad, srcDst, base, offset >> 2);
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parents:
diff changeset
   320
            return;
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parents:
diff changeset
   321
        }
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parents:
diff changeset
   322
        if (offset <= 0x3ffff && offset >= 0) {
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parents:
diff changeset
   323
            add_r(ARMRegisters::S0, base, OP2_IMM | (offset >> 10) | (11 << 8));
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parents:
diff changeset
   324
            fdtr_u(isLoad, srcDst, ARMRegisters::S0, (offset >> 2) & 0xff);
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parents:
diff changeset
   325
            return;
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parents:
diff changeset
   326
        }
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parents:
diff changeset
   327
        offset = -offset;
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parents:
diff changeset
   328
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parents:
diff changeset
   329
        if (offset <= 0x3ff && offset >= 0) {
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Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
diff changeset
   330
            fdtr_d(isLoad, srcDst, base, offset >> 2);
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parents:
diff changeset
   331
            return;
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parents:
diff changeset
   332
        }
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Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
diff changeset
   333
        if (offset <= 0x3ffff && offset >= 0) {
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Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
diff changeset
   334
            sub_r(ARMRegisters::S0, base, OP2_IMM | (offset >> 10) | (11 << 8));
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parents:
diff changeset
   335
            fdtr_d(isLoad, srcDst, ARMRegisters::S0, (offset >> 2) & 0xff);
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parents:
diff changeset
   336
            return;
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parents:
diff changeset
   337
        }
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parents:
diff changeset
   338
        offset = -offset;
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    }
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    ldr_un_imm(ARMRegisters::S0, offset);
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    add_r(ARMRegisters::S0, ARMRegisters::S0, base);
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    fdtr_u(isLoad, srcDst, ARMRegisters::S0, 0);
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}
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void* ARMAssembler::executableCopy(ExecutablePool* allocator)
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{
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    // 64-bit alignment is required for next constant pool and JIT code as well
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    m_buffer.flushWithoutBarrier(true);
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    if (m_buffer.uncheckedSize() & 0x7)
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        bkpt(0);
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    char* data = reinterpret_cast<char*>(m_buffer.executableCopy(allocator));
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    for (Jumps::Iterator iter = m_jumps.begin(); iter != m_jumps.end(); ++iter) {
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        // The last bit is set if the constant must be placed on constant pool.
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        int pos = (*iter) & (~0x1);
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        ARMWord* ldrAddr = reinterpret_cast<ARMWord*>(data + pos);
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        ARMWord* addr = getLdrImmAddress(ldrAddr);
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        if (*addr != InvalidBranchTarget) {
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            if (!(*iter & 1)) {
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                int diff = reinterpret_cast<ARMWord*>(data + *addr) - (ldrAddr + DefaultPrefetching);
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                if ((diff <= BOFFSET_MAX && diff >= BOFFSET_MIN)) {
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                    *ldrAddr = B | getConditionalField(*ldrAddr) | (diff & BRANCH_MASK);
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                    continue;
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                }
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            }
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            *addr = reinterpret_cast<ARMWord>(data + *addr);
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        }
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    }
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    return data;
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}
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} // namespace JSC
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#endif // ENABLE(ASSEMBLER) && CPU(ARM_TRADITIONAL)