bsptemplate/asspandvariant/template_assp/dmapsl.cpp
author Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
Thu, 27 May 2010 14:17:14 +0300
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Revision: 201021 Kit: 2010121
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// Copyright (c) 2004-2010 Nokia Corporation and/or its subsidiary(-ies).
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// All rights reserved.
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// This component and the accompanying materials are made available
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// under the terms of the License "Eclipse Public License v1.0"
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// which accompanies this distribution, and is available
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// at the URL "http://www.eclipse.org/legal/epl-v10.html".
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//
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// Initial Contributors:
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// Nokia Corporation - initial contribution.
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//
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// Contributors:
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//
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// Description:
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// bsptemplate/asspvariant/template_assp/dmapsl.cpp
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// Template DMA Platform Specific Layer (PSL).
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//
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//
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#include <kernel/kern_priv.h>
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#include <template_assp.h>									// /assp/template_assp/
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#include <drivers/dma.h>
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// Debug support
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static const char KDmaPanicCat[] = "DMA PSL - " __FILE__;
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static const TInt KMaxTransferLen = 0x1FE0;					// max transfer length for this DMAC
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static const TInt KMemAlignMask = 7;				  // memory addresses passed to DMAC must be multiple of 8
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static const TInt KChannelCount = 16;						// we got 16 channels
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static const TInt KDesCount = 1024;							// DMA descriptor count
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class TDmaDesc
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//
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// Hardware DMA descriptor
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//
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	{
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public:
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	enum {KStopBitMask = 1};
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	TPhysAddr iDescAddr;
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	TPhysAddr iSrcAddr;
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	TPhysAddr iDestAddr;
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	TUint32 iCmd;
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	};
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//////////////////////////////////////////////////////////////////////////////
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// Test Support
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//////////////////////////////////////////////////////////////////////////////
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/**
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TO DO: Fill in to provide information to the V1 test harness (t_dma.exe)
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*/
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TDmaTestInfo TestInfo =
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	{
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	0,
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	0,
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	0,
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	0,
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	NULL,
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	0,
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	NULL,
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	0,
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	NULL
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	};
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EXPORT_C const TDmaTestInfo& DmaTestInfo()
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//
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//
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//
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	{
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	return TestInfo;
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	}
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//////////////////////////////////////////////////////////////////////////////
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// Helper Functions
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//////////////////////////////////////////////////////////////////////////////
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inline TBool IsHwDesAligned(TAny* aDes)
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//
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// Checks whether given hardware descriptor is 16-bytes aligned.
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//
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	{
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	return ((TLinAddr)aDes & 0xF) == 0;
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	}
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static TUint32 DcmdReg(TInt aCount, TUint aFlags, TUint32 aPslInfo)
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//
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// Returns value to set in DMA command register or in descriptor command field.
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//
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	{
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	// TO DO: Construct CMD word from input values.
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	// The return value should reflect the actual control word.
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	return (aCount | aFlags | aPslInfo);
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	}
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//////////////////////////////////////////////////////////////////////////////
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// Derived Channel (Scatter/Gather)
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//////////////////////////////////////////////////////////////////////////////
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class TTemplateSgChannel : public TDmaSgChannel
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	{
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public:
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	TDmaDesc* iTmpDes;
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	TPhysAddr iTmpDesPhysAddr;
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	};
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//////////////////////////////////////////////////////////////////////////////
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// Derived Controller Class
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//////////////////////////////////////////////////////////////////////////////
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class TTemplateDmac : public TDmac
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	{
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	TTemplateDmac();
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	TInt Create();
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	// from TDmac (PIL pure virtual)
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	virtual void Transfer(const TDmaChannel& aChannel, const SDmaDesHdr& aHdr);
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	virtual void StopTransfer(const TDmaChannel& aChannel);
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	virtual TBool IsIdle(const TDmaChannel& aChannel);
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	virtual TInt MaxTransferSize(TDmaChannel& aChannel, TUint aFlags, TUint32 aPslInfo);
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	virtual TUint MemAlignMask(TDmaChannel& aChannel, TUint aFlags, TUint32 aPslInfo);
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	// from TDmac (PIL virtual)
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	virtual void InitHwDes(const SDmaDesHdr& aHdr, TUint32 aSrc, TUint32 aDest, TInt aCount,
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 						   TUint aFlags, TUint32 aPslInfo, TUint32 aCookie);
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	virtual void ChainHwDes(const SDmaDesHdr& aHdr, const SDmaDesHdr& aNextHdr);
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	virtual void AppendHwDes(const TDmaChannel& aChannel, const SDmaDesHdr& aLastHdr,
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							 const SDmaDesHdr& aNewHdr);
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	virtual void UnlinkHwDes(const TDmaChannel& aChannel, SDmaDesHdr& aHdr);
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	// other
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	static void Isr(TAny* aThis);
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	inline TDmaDesc* HdrToHwDes(const SDmaDesHdr& aHdr);
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private:
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	static const SCreateInfo KInfo;
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	TTemplateSgChannel iChannels[KChannelCount];
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	};
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static TTemplateDmac Controller;
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const TDmac::SCreateInfo TTemplateDmac::KInfo =
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	{
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	KChannelCount,
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	KDesCount,
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	TDmac::KCapsBitHwDes,
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	sizeof(TDmaDesc),
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	EMapAttrSupRw | EMapAttrFullyBlocking
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	};
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TTemplateDmac::TTemplateDmac()
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//
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// Constructor.
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//
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	: TDmac(KInfo)
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	{}
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TInt TTemplateDmac::Create()
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//
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// Second phase construction.
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//
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	{
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	TInt r = TDmac::Create(KInfo);							// Base class Create()
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	if (r == KErrNone)
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		{
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		__DMA_ASSERTA(ReserveSetOfDes(KChannelCount) == KErrNone);
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		for (TInt i=0; i < KChannelCount; ++i)
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			{
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			TDmaDesc* pD = HdrToHwDes(*iFreeHdr);
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			iChannels[i].iTmpDes = pD;
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			iChannels[i].iTmpDesPhysAddr = DesLinToPhys(pD);
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			iFreeHdr = iFreeHdr->iNext;
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			}
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		r = Interrupt::Bind(EAsspIntIdDma, Isr, this);
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		if (r == KErrNone)
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			{
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			// TO DO: Map DMA clients (requests) to DMA channels here.
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			r = Interrupt::Enable(EAsspIntIdDma);
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			}
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		}
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	return r;
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	}
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void TTemplateDmac::Transfer(const TDmaChannel& aChannel, const SDmaDesHdr& aHdr)
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//
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// Initiates a (previously constructed) request on a specific channel.
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//
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	{
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	const TUint8 i = static_cast<TUint8>(aChannel.PslId());
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	TDmaDesc* pD = HdrToHwDes(aHdr);
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	__KTRACE_OPT(KDMA, Kern::Printf(">TTemplateDmac::Transfer channel=%d des=0x%08X", i, pD));
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	// TO DO (for instance): Load the first descriptor address into the DMAC and start it
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	// by setting the RUN bit.
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	(void) *pD, (void) i;
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	}
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void TTemplateDmac::StopTransfer(const TDmaChannel& aChannel)
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//
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// Stops a running channel.
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//
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	{
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	const TUint8 i = static_cast<TUint8>(aChannel.PslId());
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	__KTRACE_OPT(KDMA, Kern::Printf(">TTemplateDmac::StopTransfer channel=%d", i));
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	// TO DO (for instance): Clear the RUN bit of the channel.
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	(void) i;
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	}
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TBool TTemplateDmac::IsIdle(const TDmaChannel& aChannel)
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//
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// Returns the state of a given channel.
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//
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	{
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	const TUint8 i = static_cast<TUint8>(aChannel.PslId());
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	__KTRACE_OPT(KDMA, Kern::Printf(">TTemplateDmac::IsIdle channel=%d", i));
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	// TO DO (for instance): Return the state of the RUN bit of the channel.
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	// The return value should reflect the actual state.
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	(void) i;
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	return ETrue;
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	}
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TInt TTemplateDmac::MaxTransferSize(TDmaChannel& /*aChannel*/, TUint /*aFlags*/, TUint32 /*aPslInfo*/)
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//
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// Returns the maximum transfer size for a given transfer.
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//
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	{
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	// TO DO: Determine the proper return value, based on the arguments.
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	// For instance:
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	return KMaxTransferLen;
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	}
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TUint TTemplateDmac::MemAlignMask(TDmaChannel& /*aChannel*/, TUint /*aFlags*/, TUint32 /*aPslInfo*/)
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//
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// Returns the memory buffer alignment restrictions mask for a given transfer.
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//
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	{
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	// TO DO: Determine the proper return value, based on the arguments.
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	// For instance:
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	return KMemAlignMask;
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	}
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void TTemplateDmac::InitHwDes(const SDmaDesHdr& aHdr, TUint32 aSrc, TUint32 aDest, TInt aCount,
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							  TUint aFlags, TUint32 aPslInfo, TUint32 /*aCookie*/)
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//
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// Sets up (from a passed in request) the descriptor with that fragment's
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// source and destination address, the fragment size, and the (driver/DMA
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// controller) specific transfer parameters (mem/peripheral, burst size,
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// transfer width).
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//
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	{
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	TDmaDesc* pD = HdrToHwDes(aHdr);
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	__KTRACE_OPT(KDMA, Kern::Printf("TTemplateDmac::InitHwDes 0x%08X", pD));
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	// Unaligned descriptor? Bug in generic layer!
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	__DMA_ASSERTD(IsHwDesAligned(pD));
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	pD->iSrcAddr = (aFlags & KDmaPhysAddrSrc) ? aSrc : Epoc::LinearToPhysical(aSrc);
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	__DMA_ASSERTD(pD->iSrcAddr != KPhysAddrInvalid);
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	pD->iDestAddr = (aFlags & KDmaPhysAddrDest) ? aDest : Epoc::LinearToPhysical(aDest);
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	__DMA_ASSERTD(pD->iDestAddr != KPhysAddrInvalid);
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	pD->iCmd = DcmdReg(aCount, aFlags, aPslInfo);
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	pD->iDescAddr = TDmaDesc::KStopBitMask;
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	}
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void TTemplateDmac::ChainHwDes(const SDmaDesHdr& aHdr, const SDmaDesHdr& aNextHdr)
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//
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// Chains hardware descriptors together by setting the next pointer of the original descriptor
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// to the physical address of the descriptor to be chained.
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//
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	{
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	TDmaDesc* pD = HdrToHwDes(aHdr);
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	TDmaDesc* pN = HdrToHwDes(aNextHdr);
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	__KTRACE_OPT(KDMA, Kern::Printf("TTemplateDmac::ChainHwDes des=0x%08X next des=0x%08X", pD, pN));
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	// Unaligned descriptor? Bug in generic layer!
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	__DMA_ASSERTD(IsHwDesAligned(pD) && IsHwDesAligned(pN));
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	// TO DO: Modify pD->iCmd so that no end-of-transfer interrupt gets raised any longer.
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	pD->iDescAddr = DesLinToPhys(pN);
0
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	}
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   315
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void TTemplateDmac::AppendHwDes(const TDmaChannel& aChannel, const SDmaDesHdr& aLastHdr,
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								const SDmaDesHdr& aNewHdr)
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//
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// Appends a descriptor to the chain while the channel is running.
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//
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	{
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	const TUint8 i = static_cast<TUint8>(aChannel.PslId());
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   323
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	TDmaDesc* pL = HdrToHwDes(aLastHdr);
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	TDmaDesc* pN = HdrToHwDes(aNewHdr);
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   326
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	__KTRACE_OPT(KDMA, Kern::Printf(">TTemplateDmac::AppendHwDes channel=%d last des=0x%08X new des=0x%08X",
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									i, pL, pN));
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	// Unaligned descriptor? Bug in generic layer!
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	__DMA_ASSERTD(IsHwDesAligned(pL) && IsHwDesAligned(pN));
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	TPhysAddr newPhys = DesLinToPhys(pN);
0
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   333
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	const TInt irq = NKern::DisableAllInterrupts();
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	StopTransfer(aChannel);
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   336
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	pL->iDescAddr = newPhys;
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   338
	const TTemplateSgChannel& channel = static_cast<const TTemplateSgChannel&>(aChannel);
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	TDmaDesc* pD = channel.iTmpDes;
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   340
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	// TO DO: Implement the appropriate algorithm for appending a descriptor here.
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	(void) *pD, (void) i;
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   343
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	NKern::RestoreInterrupts(irq);
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   345
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	__KTRACE_OPT(KDMA, Kern::Printf("<TTemplateDmac::AppendHwDes"));
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	}
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   348
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   349
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   350
void TTemplateDmac::UnlinkHwDes(const TDmaChannel& /*aChannel*/, SDmaDesHdr& aHdr)
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//
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// Unlink the last item in the h/w descriptor chain from a subsequent chain that it was
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   353
// possibly linked to.
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   354
//
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   355
	{
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   356
 	__KTRACE_OPT(KDMA, Kern::Printf(">TTemplateDmac::UnlinkHwDes"));
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   357
  	TDmaDesc* pD = HdrToHwDes(aHdr);
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   358
  	pD->iDescAddr = TDmaDesc::KStopBitMask;
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   359
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   360
	// TO DO: Modify pD->iCmd so that an end-of-transfer interrupt will get raised.
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   361
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   362
	}
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   363
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   364
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   365
void TTemplateDmac::Isr(TAny* aThis)
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   366
//
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// This ISR reads the interrupt identification and calls back into the base class
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   368
// interrupt service handler with the channel identifier and an indication whether the
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   369
// transfer completed correctly or with an error.
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   370
//
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   371
	{
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	TTemplateDmac& me = *static_cast<TTemplateDmac*>(aThis);
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   373
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   374
	// TO DO: Implement the behaviour described above, call HandleIsr().
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   375
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   376
	HandleIsr(me.iChannels[5], 0);							// Example
0
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   377
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   378
	}
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   379
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   380
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   381
inline TDmaDesc* TTemplateDmac::HdrToHwDes(const SDmaDesHdr& aHdr)
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   382
//
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   383
// Changes return type of base class call.
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   384
//
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   385
	{
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   386
	return static_cast<TDmaDesc*>(TDmac::HdrToHwDes(aHdr));
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   387
	}
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   388
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   389
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   390
//////////////////////////////////////////////////////////////////////////////
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   391
// Channel Opening/Closing (Channel Allocator)
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   392
//////////////////////////////////////////////////////////////////////////////
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diff changeset
   393
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   394
TDmaChannel* DmaChannelMgr::Open(TUint32 aOpenId)
0
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diff changeset
   395
//
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diff changeset
   396
//
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diff changeset
   397
//
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diff changeset
   398
	{
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   399
	__KTRACE_OPT(KDMA, Kern::Printf(">DmaChannelMgr::Open aOpenId=%d", aOpenId));
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   400
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   401
	__DMA_ASSERTA(aOpenId < static_cast<TUint32>(KChannelCount));
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diff changeset
   402
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   403
	TDmaChannel* pC = Controller.iChannels + aOpenId;
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   404
	if (pC->IsOpened())
36
538db54a451d Revision: 201003
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diff changeset
   405
		{
0
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   406
		pC = NULL;
36
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diff changeset
   407
		}
0
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   408
	else
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diff changeset
   409
		{
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diff changeset
   410
		pC->iController = &Controller;
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diff changeset
   411
		pC->iPslId = aOpenId;
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diff changeset
   412
		}
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diff changeset
   413
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   414
	return pC;
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diff changeset
   415
	}
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diff changeset
   416
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diff changeset
   417
36
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Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
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diff changeset
   418
void DmaChannelMgr::Close(TDmaChannel* /*aChannel*/)
0
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diff changeset
   419
//
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diff changeset
   420
//
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diff changeset
   421
//
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diff changeset
   422
	{
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diff changeset
   423
	// NOP
a41df078684a Convert Kernelhwsrv package from SFL to EPL
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diff changeset
   424
	}
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diff changeset
   425
a41df078684a Convert Kernelhwsrv package from SFL to EPL
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diff changeset
   426
36
538db54a451d Revision: 201003
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents: 0
diff changeset
   427
TInt DmaChannelMgr::StaticExtension(TInt /*aCmd*/, TAny* /*aArg*/)
0
a41df078684a Convert Kernelhwsrv package from SFL to EPL
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diff changeset
   428
//
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diff changeset
   429
//
a41df078684a Convert Kernelhwsrv package from SFL to EPL
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diff changeset
   430
//
a41df078684a Convert Kernelhwsrv package from SFL to EPL
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diff changeset
   431
	{
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diff changeset
   432
	return KErrNotSupported;
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diff changeset
   433
	}
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diff changeset
   434
a41df078684a Convert Kernelhwsrv package from SFL to EPL
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diff changeset
   435
a41df078684a Convert Kernelhwsrv package from SFL to EPL
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diff changeset
   436
//////////////////////////////////////////////////////////////////////////////
a41df078684a Convert Kernelhwsrv package from SFL to EPL
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diff changeset
   437
// DLL Exported Function
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   438
//////////////////////////////////////////////////////////////////////////////
a41df078684a Convert Kernelhwsrv package from SFL to EPL
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diff changeset
   439
a41df078684a Convert Kernelhwsrv package from SFL to EPL
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diff changeset
   440
DECLARE_STANDARD_EXTENSION()
a41df078684a Convert Kernelhwsrv package from SFL to EPL
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diff changeset
   441
//
a41df078684a Convert Kernelhwsrv package from SFL to EPL
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diff changeset
   442
// Creates and initializes a new DMA controller object on the kernel heap.
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diff changeset
   443
//
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diff changeset
   444
	{
a41df078684a Convert Kernelhwsrv package from SFL to EPL
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diff changeset
   445
	__KTRACE_OPT2(KBOOT, KDMA, Kern::Printf("Starting DMA Extension"));
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diff changeset
   446
a41df078684a Convert Kernelhwsrv package from SFL to EPL
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diff changeset
   447
	return Controller.Create();
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diff changeset
   448
	}