author | Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com> |
Tue, 31 Aug 2010 16:34:26 +0300 | |
branch | RCL_3 |
changeset 256 | c1f20ce4abcf |
parent 0 | a41df078684a |
child 257 | 3e88ff8f41d5 |
permissions | -rw-r--r-- |
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// Copyright (c) 2008-2009 Nokia Corporation and/or its subsidiary(-ies). |
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// All rights reserved. |
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// This component and the accompanying materials are made available |
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// under the terms of the License "Eclipse Public License v1.0" |
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// which accompanies this distribution, and is available |
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// at the URL "http://www.eclipse.org/legal/epl-v10.html". |
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// |
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// Initial Contributors: |
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// Nokia Corporation - initial contribution. |
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// |
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// Contributors: |
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// |
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// Description: |
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// e32\nkernsmp\arm\ncmonitor.cpp |
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// Kernel crash debugger - NKERNSMP ARM specific portion |
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// |
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// |
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#define __INCLUDE_NTHREADBASE_DEFINES__ |
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#include <kernel/monitor.h> |
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#include "nk_priv.h" |
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#include <arm.h> |
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SFullArmRegSet& RegSet(TInt aCpu) |
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{ |
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TScheduler* pS = TScheduler::Ptr(); |
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TSubScheduler& ss = *pS->iSub[aCpu]; |
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return *ss.iSSX.iRegs; |
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} |
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void DisplayNThreadStackedRegs(Monitor& m, SThreadReschedStack& reg) |
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{ |
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m.Printf("TEEHBR %08x UROTID %08x URWTID %08x FPEXC %08x\r\n", reg.iTEEHBR, reg.iRWROTID, reg.iRWRWTID, reg.iFpExc); |
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m.Printf(" CAR %08x DACR %08x\r\n", reg.iCar, reg.iDacr); |
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m.Printf(" SPARE %08x SPSR %08x SPRSCH %08x R15 %08x\r\n", reg.iSpare, reg.iSpsrSvc, reg.iSPRschdFlg, reg.iR15); |
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} |
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void DisplaySubSchedulerExt(Monitor& m, TSubScheduler& ss) |
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{ |
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TSubSchedulerX& x = ss.iSSX; |
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m.Printf("Extras[ 0] %08x Extras[ 1] %08x Extras[ 2] %08x i_GblTmrA %08x\r\n", x.iSSXP[0], x.iSSXP[1], x.iSSXP[2], x.iGlobalTimerAddr); |
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m.Printf("i_ScuAddr %08x i_GicDist %08x i_GicCpuIf %08x i_LocTmrA %08x\r\n", x.iScuAddr, x.iGicDistAddr, x.iGicCpuIfcAddr, x.iLocalTimerAddr); |
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m.Printf("i_IrqCount %08x i_IrqNest %08x i_ExcInfo %08x i_CrashSt %08x\r\n", x.iIrqCount, x.iIrqNestCount, x.iExcInfo, x.iCrashState); |
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m.Printf("i_AbtStkTp %08x i_UndSktTp %08x i_FiqStkTp %08x i_IrqStkTp %08x\r\n", x.iAbtStackTop, x.iUndStackTop, x.iFiqStackTop, x.iIrqStackTop); |
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m.Printf("CpuFreqM %08x CpuFreqS %08x CpuPeriodM %08x CpuPeriodS %08x\r\n", x.iCpuFreqRI.iR.iM, x.iCpuFreqRI.iR.iX, x.iCpuFreqRI.iI.iM, x.iCpuFreqRI.iI.iX); |
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m.Printf("TmrFreqM %08x TmrFreqS %08x TmrPeriodM %08x TmrPeriodS %08x\r\n", x.iTimerFreqRI.iR.iM, x.iTimerFreqRI.iR.iX, x.iTimerFreqRI.iI.iM, x.iTimerFreqRI.iI.iX); |
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} |
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void DisplaySchedulerExt(Monitor& m, TScheduler& s) |
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{ |
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TSchedulerX& sx = s.iSX; |
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m.Printf("iTimerMax %08x %08x\r\n", I64HIGH(sx.iTimerMax), I64LOW(sx.iTimerMax)); |
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m.Printf("iGTmrA %08x iScuAddr %08x iGicDistA %08x iGicCpuIfcA %08x iLocTmrA %08x\r\n", |
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sx.iGlobalTimerAddr, sx.iScuAddr, sx.iGicDistAddr, sx.iGicCpuIfcAddr, sx.iLocalTimerAddr); |
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m.Printf("iGTFreqM %08x iGTFreqS %08x iGTPeriodM %08x iGTPeriodS %08x\r\n", |
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sx.iGTimerFreqRI.iR.iM, sx.iGTimerFreqRI.iR.iX, sx.iGTimerFreqRI.iI.iM, sx.iGTimerFreqRI.iI.iX); |
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m.Printf("iCount0 %08x %08x iTimestamp0 %08x %08x\r\n", |
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I64HIGH(sx.iCount0), I64LOW(sx.iCount0), I64HIGH(sx.iTimestamp0), I64LOW(sx.iTimestamp0)); |
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} |
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void DumpRegisters(Monitor& m, SFullArmRegSet& a) |
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{ |
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SNormalRegs& r = a.iN; |
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m.Printf("MODE_USR:\r\n"); |
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m.Printf(" R0=%08x R1=%08x R2=%08x R3=%08x\r\n", r.iR0, r.iR1, r.iR2, r.iR3); |
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m.Printf(" R4=%08x R5=%08x R6=%08x R7=%08x\r\n", r.iR4, r.iR5, r.iR6, r.iR7); |
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m.Printf(" R8=%08x R9=%08x R10=%08x R11=%08x\r\n", r.iR8, r.iR9, r.iR10, r.iR11); |
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m.Printf("R12=%08x R13=%08x R14=%08x R15=%08x\r\n", r.iR12, r.iR13, r.iR14, r.iR15); |
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m.Printf("CPSR=%08x\r\n", r.iFlags); |
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m.Printf("MODE_FIQ:\r\n"); |
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m.Printf(" R8=%08x R9=%08x R10=%08x R11=%08x\r\n", r.iR8Fiq, r.iR9Fiq, r.iR10Fiq, r.iR11Fiq); |
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m.Printf("R12=%08x R13=%08x R14=%08x SPSR=%08x\r\n", r.iR12Fiq, r.iR13Fiq, r.iR14Fiq, r.iSpsrFiq); |
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m.Printf("MODE_IRQ:\r\n"); |
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m.Printf("R13=%08x R14=%08x SPSR=%08x\r\n", r.iR13Irq, r.iR14Irq, r.iSpsrIrq); |
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m.Printf("MODE_SVC:\r\n"); |
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m.Printf("R13=%08x R14=%08x SPSR=%08x\r\n", r.iR13Svc, r.iR14Svc, r.iSpsrSvc); |
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m.Printf("MODE_ABT:\r\n"); |
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m.Printf("R13=%08x R14=%08x SPSR=%08x\r\n", r.iR13Abt, r.iR14Abt, r.iSpsrAbt); |
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m.Printf("MODE_UND:\r\n"); |
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m.Printf("R13=%08x R14=%08x SPSR=%08x\r\n", r.iR13Und, r.iR14Und, r.iSpsrUnd); |
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// m.Printf("MODE_MON:\r\n"); |
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// m.Printf("R13=%08x R14=%08x SPSR=%08x\r\n", r.iR13Mon, r.iR14Mon, r.iSpsrMon); |
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SAuxiliaryRegs& aux = a.iA; |
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m.Printf("TEEHBR=%08x CPACR=%08x\r\n", aux.iTEEHBR, aux.iCPACR); |
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SBankedRegs& b = a.iB[0]; |
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m.Printf(" SCTLR=%08x ACTLR=%08x PRRR=%08x NMRR=%08x\r\n", b.iSCTLR, b.iACTLR, b.iPRRR, b.iNMRR); |
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m.Printf(" DACR=%08x TTBR0=%08x TTBR1=%08x TTBCR=%08x\r\n", b.iDACR, b.iTTBR0, b.iTTBR1, b.iTTBCR); |
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m.Printf(" VBAR=%08x FCSEID=%08x CTXIDR=%08x\r\n", b.iVBAR, b.iFCSEIDR, b.iCTXIDR); |
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m.Printf("Thread ID RWRW=%08x RWRO=%08x RWNO=%08x\r\n", b.iRWRWTID, b.iRWROTID, b.iRWNOTID); |
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#ifdef __CPU_HAS_MMU |
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extern TUint32 GetMMUID(); |
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m.Printf(" MMUID %08x\r\n", GetMMUID()); |
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#endif |
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#ifdef __CPU_HAS_VFP |
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m.Printf("FPEXC %08x\r\n", a.iMore[0]); |
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#endif |
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#ifdef __CPU_HAS_CACHE_TYPE_REGISTER |
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extern TUint32 GetCacheType(); |
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m.Printf("CTYPE %08x\r\n", GetCacheType()); |
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#endif |
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m.NewLine(); |
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} |
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EXPORT_C void Monitor::DumpCpuRegisters() |
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{ |
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TInt i; |
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for (i=0; i<KMaxCpus; ++i) |
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{ |
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Printf("CPU %d\r\n--------------------------------------------------------------------------------\r\n", i); |
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SFullArmRegSet& r = RegSet(i); |
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DumpRegisters(*this, r); |
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NewLine(); |
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} |
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} |
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EXPORT_C void Monitor::DisplayCpuFaultInfo() |
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{ |
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TScheduler* pS=TScheduler::Ptr(); |
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TInt i; |
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for (i=0; i<KMaxCpus; ++i) |
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{ |
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Printf("CPU %d:\r\n", i); |
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TSubScheduler& ss = *pS->iSub[i]; |
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if (!ss.iSSX.iRegs) |
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continue; |
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SFullArmRegSet& r = *ss.iSSX.iRegs; |
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Printf("Exc %1d Cpsr=%08x FAR=%08x FSR=%08x\r\n", r.iExcCode, r.iN.iFlags, r.iB[0].iDFAR, r.iB[0].iDFSR); |
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Printf(" R0=%08x R1=%08x R2=%08x R3=%08x\r\n", r.iN.iR0, r.iN.iR1, r.iN.iR2, r.iN.iR3); |
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Printf(" R4=%08x R5=%08x R6=%08x R7=%08x\r\n", r.iN.iR4, r.iN.iR5, r.iN.iR6, r.iN.iR7); |
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Printf(" R8=%08x R9=%08x R10=%08x R11=%08x\r\n", r.iN.iR8, r.iN.iR9, r.iN.iR10, r.iN.iR11); |
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Printf("R12=%08x R13=%08x R14=%08x R15=%08x\r\n", r.iN.iR12, r.iN.iR13, r.iN.iR14, r.iN.iR15); |
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Printf("R13Svc=%08x R14Svc=%08x SpsrSvc=%08x\r\n", r.iN.iR13Svc, r.iN.iR14Svc, r.iN.iSpsrSvc); |
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NewLine(); |
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} |
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} |
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EXPORT_C void Monitor::GetStackPointers(NThread* aThread, TUint& aSupSP, TUint& aUsrSP) |
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{ |
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if (aThread->iCurrent) |
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{ |
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TInt i = aThread->iLastCpu; |
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aSupSP = RegSet(i).iN.iR13Svc; |
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aUsrSP = RegSet(i).iN.iR13; |
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} |
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else |
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{ |
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aSupSP = (TUint)aThread->iSavedSP; |
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SThreadExcStack* txs = (SThreadExcStack*)((TLinAddr)aThread->iStackBase + (TLinAddr)aThread->iStackSize); |
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--txs; |
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if (txs->iExcCode != SThreadExcStack::EInit && txs->iExcCode != SThreadExcStack::EStub) |
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aUsrSP = txs->iR13usr; |
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else |
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aUsrSP = 0; |
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} |
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} |