kerneltest/e32test/dma/dmasim.cpp
changeset 293 0659d0e1a03c
parent 90 947f0dc9f7a8
equal deleted inserted replaced
291:206a6eaaeb71 293:0659d0e1a03c
     1 // Copyright (c) 2002-2009 Nokia Corporation and/or its subsidiary(-ies).
     1 // Copyright (c) 2002-2010 Nokia Corporation and/or its subsidiary(-ies).
     2 // All rights reserved.
     2 // All rights reserved.
     3 // This component and the accompanying materials are made available
     3 // This component and the accompanying materials are made available
     4 // under the terms of the License "Eclipse Public License v1.0"
     4 // under the terms of the License "Eclipse Public License v1.0"
     5 // which accompanies this distribution, and is available
     5 // which accompanies this distribution, and is available
     6 // at the URL "http://www.eclipse.org/legal/epl-v10.html".
     6 // at the URL "http://www.eclipse.org/legal/epl-v10.html".
    21 #include <kernel/kern_priv.h>
    21 #include <kernel/kern_priv.h>
    22 
    22 
    23 
    23 
    24 const char KDmaPanicCat[] = "DMASIM";
    24 const char KDmaPanicCat[] = "DMASIM";
    25 
    25 
    26 const TInt KMaxTransferSize = 0x1FFF;
    26 const TInt KMaxTransferSize = 0x4000;
    27 const TInt KMemAlignMask = 3; // memory addresses passed to DMAC must be multiple of 4
    27 const TInt KMemAlignMask = 3; // memory addresses passed to DMAC must be multiple of 4
    28 const TInt KBurstSize = 0x800;
    28 const TInt KBurstSize = KMaxTransferSize;
    29 
    29 
    30 typedef void (*TPseudoIsr)();
    30 typedef void (*TPseudoIsr)();
    31 
    31 
    32 const TInt KChannelCount = 4;								// # of channels per controller
    32 const TInt KChannelCount = 4;								// # of channels per controller
    33 const TInt KDesCount = 256;									// # of descriptors allocated per controller
    33 const TInt KDesCount = 256;									// # of descriptors allocated per controller
   388 	__e32_atomic_store_ord32(&StartStop, EDmaSimIdle);
   388 	__e32_atomic_store_ord32(&StartStop, EDmaSimIdle);
   389 	}
   389 	}
   390 
   390 
   391 void DmacSim::TickCB(TAny*)
   391 void DmacSim::TickCB(TAny*)
   392 	{
   392 	{
   393 	TInt orig = (TInt)__e32_atomic_ior_acq32(&StartStop, EDmaSimInISR);
   393 	// On the emulator do a transfer for every channel
   394 	if (orig >= 0)
   394 	// each tick. This speeds up t_dmasim significantly, since on the
   395 		{
   395 	// emulator, ticks are less frequent than on real hardware.
   396 		DmacSb::DoTransfer();
   396 #ifdef __EPOC32__
   397 		DmacDb::DoTransfer();
   397 	const TInt transfersPerTick = 1;
   398 		DmacSg::DoTransfer();
   398 #else
   399 		}
   399 	const TInt transfersPerTick = KChannelCount;
   400 	orig = (TInt)__e32_atomic_and_rel32(&StartStop, (TUint32)~EDmaSimInISR);
   400 #endif
   401 	if (orig < 0)
   401 
   402 		{
   402 	for(TInt i = 0; i < transfersPerTick; i++)
   403 		__e32_atomic_store_rel32(&StartStop, EDmaSimIdle);
   403 		{
   404 		return;
   404 		TInt orig = (TInt)__e32_atomic_ior_acq32(&StartStop, EDmaSimInISR);
   405 		}
   405 		if (orig >= 0)
       
   406 			{
       
   407 			DmacSb::DoTransfer();
       
   408 			DmacDb::DoTransfer();
       
   409 			DmacSg::DoTransfer();
       
   410 			}
       
   411 		orig = (TInt)__e32_atomic_and_rel32(&StartStop, (TUint32)~EDmaSimInISR);
       
   412 		if (orig < 0)
       
   413 			{
       
   414 			__e32_atomic_store_rel32(&StartStop, EDmaSimIdle);
       
   415 			return;
       
   416 			}
       
   417 		}
       
   418 
   406 	TInt r = Timer.Again(KPeriod);
   419 	TInt r = Timer.Again(KPeriod);
   407 	if (r == KErrArgument)
   420 	if (r == KErrArgument)
   408 		r = Timer.OneShot(KPeriod);
   421 		r = Timer.OneShot(KPeriod);
   409 	__DMA_ASSERTA(r == KErrNone);
   422 	__DMA_ASSERTA(r == KErrNone);
   410 	}
   423 	}