sysperfana/perfinvestigator/com.nokia.carbide.cpp.pi.doc.user/html/reference/methods/banked_registers.htm
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6 <title>Banked Registers</title> |
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11 <h3>Banked Registers </h3> |
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12 <P LANG="en-GB" ALIGN=JUSTIFY>Current ARM processor architecture has a total of 37 registers. The registers are arranged into overlapping banks. Each of the banks represents a set of 16 general-purpose registers, a current program status register and an optional stored program status register (which is present only in the exception mode banks). There is one bank of registers for each of the processor modes. Some of the registers between the register banks refer to the same physical register, and some of the registers are private for each of the banks respectively. </P> |
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13 <P LANG="en-GB" ALIGN=JUSTIFY>Purpose of the banks is to reduce the amount of data to be stored to the stack when the processor mode is changed. User mode registers can be accessed from the privileged modes through a specific form of the STM (store multiple) and LDM (load multiple) instructions. Information within the user mode registers are valuable in performance measurements when analyzing the operation of the user mode software from a privileged mode, such as during a periodic interrupt</P> |
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