| author | Matti Laitinen <matti.t.laitinen@nokia.com> |
| Thu, 11 Feb 2010 15:32:31 +0200 | |
| changeset 2 | b9ab3b238396 |
| child 5 | 844b047e260d |
| permissions | -rw-r--r-- |
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b9ab3b238396
Initial version of Performance Investigator under EPL
Matti Laitinen <matti.t.laitinen@nokia.com>
parents:
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b9ab3b238396
Initial version of Performance Investigator under EPL
Matti Laitinen <matti.t.laitinen@nokia.com>
parents:
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b9ab3b238396
Initial version of Performance Investigator under EPL
Matti Laitinen <matti.t.laitinen@nokia.com>
parents:
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b9ab3b238396
Initial version of Performance Investigator under EPL
Matti Laitinen <matti.t.laitinen@nokia.com>
parents:
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b9ab3b238396
Initial version of Performance Investigator under EPL
Matti Laitinen <matti.t.laitinen@nokia.com>
parents:
diff
changeset
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b9ab3b238396
Initial version of Performance Investigator under EPL
Matti Laitinen <matti.t.laitinen@nokia.com>
parents:
diff
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<title>Banked Registers</title> |
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b9ab3b238396
Initial version of Performance Investigator under EPL
Matti Laitinen <matti.t.laitinen@nokia.com>
parents:
diff
changeset
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<link href="../../../book.css" rel="stylesheet" type="text/css"> |
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b9ab3b238396
Initial version of Performance Investigator under EPL
Matti Laitinen <matti.t.laitinen@nokia.com>
parents:
diff
changeset
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</head> |
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b9ab3b238396
Initial version of Performance Investigator under EPL
Matti Laitinen <matti.t.laitinen@nokia.com>
parents:
diff
changeset
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b9ab3b238396
Initial version of Performance Investigator under EPL
Matti Laitinen <matti.t.laitinen@nokia.com>
parents:
diff
changeset
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<body> |
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b9ab3b238396
Initial version of Performance Investigator under EPL
Matti Laitinen <matti.t.laitinen@nokia.com>
parents:
diff
changeset
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<h3>Banked Registers </h3> |
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b9ab3b238396
Initial version of Performance Investigator under EPL
Matti Laitinen <matti.t.laitinen@nokia.com>
parents:
diff
changeset
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<P LANG="en-GB" ALIGN=JUSTIFY>Current ARM processor architecture has a total of 37 registers. The registers are arranged into overlapping banks. Each of the banks represents a set of 16 general-purpose registers, a current program status register and an optional stored program status register (which is present only in the exception mode banks). There is one bank of registers for each of the processor modes. Some of the registers between the register banks refer to the same physical register, and some of the registers are private for each of the banks respectively. </P> |
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b9ab3b238396
Initial version of Performance Investigator under EPL
Matti Laitinen <matti.t.laitinen@nokia.com>
parents:
diff
changeset
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<P LANG="en-GB" ALIGN=JUSTIFY>Purpose of the banks is to reduce the amount of data to be stored to the stack when the processor mode is changed. User mode registers can be accessed from the privileged modes through a specific form of the STM (store multiple) and LDM (load multiple) instructions. Information within the user mode registers are valuable in performance measurements when analyzing the operation of the user mode software from a privileged mode, such as during a periodic interrupt</P> |
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b9ab3b238396
Initial version of Performance Investigator under EPL
Matti Laitinen <matti.t.laitinen@nokia.com>
parents:
diff
changeset
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<div id="footer">Copyright © 2009 Nokia Corporation and/or its subsidiary(-ies). All rights reserved. <br>License: <a href="http://www.eclipse.org/legal/epl-v10.html">http://www.eclipse.org/legal/epl-v10.html</a></div> |
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b9ab3b238396
Initial version of Performance Investigator under EPL
Matti Laitinen <matti.t.laitinen@nokia.com>
parents:
diff
changeset
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</body> |
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b9ab3b238396
Initial version of Performance Investigator under EPL
Matti Laitinen <matti.t.laitinen@nokia.com>
parents:
diff
changeset
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</html> |