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/*
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* Copyright (c) 2004 Nokia Corporation and/or its subsidiary(-ies).
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* All rights reserved.
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* This component and the accompanying materials are made available
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* under the terms of "Eclipse Public License v1.0"
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* which accompanies this distribution, and is available
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* at the URL "http://www.eclipse.org/legal/epl-v10.html".
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*
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* Initial Contributors:
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* Nokia Corporation - initial contribution.
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*
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* Contributors:
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*
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* Description:
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*
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*/
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#ifndef __TRKDRIVER_H__
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#define __TRKDRIVER_H__
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// Debug messages
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#ifdef _DEBUG
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#define LOG_MSG(x) __KTRACE_OPT(KDEBUGGER, Kern::Printf(x))
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#define LOG_MSG2(x, y) __KTRACE_OPT(KDEBUGGER, Kern::Printf(x, y))
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#else
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#define LOG_MSG(x)
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#define LOG_MSG2(x, y)
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#endif
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//
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// Macros
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//
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const TUint32 KArmBreakPoint = 0xE7F123F4;
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const TUint16 KThumbBreakPoint = 0xDE56;
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// From mmboot.h header
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const TLinAddr KDataSectionEnd =0x40000000u;
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const TLinAddr KRomLinearBase =0xF8000000u;
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const TLinAddr KSuperPageMovingLinAddr =0x60000000u;
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const TLinAddr KSuperPageMultipleLinAddr =0xC0000000u;
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const TLinAddr KKernDataEndMovingLinAddr =0x655FFFFFu;//0xF3FFFFFFu;
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const TLinAddr KKernDataEndMultipleLinAddr =0xFFEFFFFFu;
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#define NUMBER_OF_TEMP_BREAKPOINTS 10
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#define NUMBER_OF_EVENTS_TO_QUEUE 50
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#define NUMBER_OF_LIBS_TO_REGISTER 100
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#define ROM_LINEAR_BASE KRomLinearBase
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//for multiple memory model
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#define NUMBER_OF_MAX_BREAKPOINTS 100
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// Result checking
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#define ReturnIfError(x) { TInt y = x; if (KErrNone != y) return y; }
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// Register definitions
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#define SP_REGISTER 13
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#define LINK_REGISTER 14
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#define PC_REGISTER 15
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#define STATUS_REGISTER 16
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// ARM instruction bitmasks
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#define ARM_OPCODE(x) (((TUint32)(x) & 0x0E000000) >> 25)
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// Generic instruction defines
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#define ARM_RM(x) ((TUint32)(x) & 0x0000000F) // bit 0- 4
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#define ARM_RS(x) (((TUint32)(x) & 0x00000F00) >> 8) // bit 8-11
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#define ARM_RD(x) (((TUint32)(x) & 0x0000F000) >> 12) // bit 12-15
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#define ARM_RN(x) (((TUint32)(x) & 0x000F0000) >> 16) // bit 16-19
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#define ARM_LOAD(x) (((TUint32)(x) & 0x00100000) >> 20) // bit 20
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// Data processing instruction defines
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#define ARM_DATA_SHIFT(x) (((TUint32)(x) & 0x00000060) >> 5) // bit 5- 6
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#define ARM_DATA_C(x) (((TUint32)(x) & 0x00000F80) >> 7) // bit 7-11
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#define ARM_DATA_IMM(x) ((TUint32)(x) & 0x000000FF) // bit 0-7
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#define ARM_DATA_ROT(x) (((TUint32)(x) & 0x00000F00) >> 8) // bit 8-11
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// Single date transfer instruction defines
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#define ARM_SINGLE_IMM(x) ((TUint32)(x) & 0x00000FFF) // bit 0-11
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#define ARM_SINGLE_BYTE(x) (((TUint32)(x) & 0x00400000) >> 22) // bit 22
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#define ARM_SINGLE_U(x) (((TUint32)(x) & 0x00800000) >> 23) // bit 23
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#define ARM_SINGLE_PRE(x) (((TUint32)(x) & 0x01000000) >> 24) // bit 24
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// Block data transfer instruction defines
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#define ARM_BLOCK_REGLIST(x) ((TUint32)(x) & 0x0000FFFF) // bit 0-15
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#define ARM_BLOCK_U(x) (((TUint32)(x) & 0x00800000) >> 23) // bit 23
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#define ARM_BLOCK_PRE(x) (((TUint32)(x) & 0x01000000) >> 24) // bit 24
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// Branch instruction defines
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#define ARM_B_ADDR(x) ((x & 0x00800000) ? ((TUint32)(x) & 0x00FFFFFF | 0xFF000000) : (TUint32)(x) & 0x00FFFFFF)
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#define ARM_INSTR_B_DEST(x,a) (ARM_B_ADDR(x) << 2) + ((TUint32)(a) + 8)
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#define ARM_CARRY_BIT 0x20000000 // bit 30
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// Thumb instruction bitmasks
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#define THUMB_OPCODE(x) (((TUint16)(x) & 0xF800) >> 11)
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#define THUMB_INST_7_15(x) (((TUint16)(x) & 0xFF80) >> 7)
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#define THUMB_INST_8_15(x) (((TUint16)(x) & 0xFF00) >> 8)
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const TUint8 KArm4Stub[8] = { 0x00, 0xC0, 0x9F, 0xE5, 0x00, 0xF0, 0x9C, 0xE5 };
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const TUint8 KArmIStub[12] = { 0x04, 0xC0, 0x9F, 0xE5, 0x00, 0xC0, 0x9C, 0xE5, 0x1C, 0xFF, 0x2F, 0xE1 };
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const TUint8 KFastArmIStub[12] = { 0x04, 0xC0, 0x9F, 0xE5, 0x1C, 0xFF, 0x2F, 0xE1, 0x00, 0x00, 0x00, 0x00 };
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const TUint8 KThumbStub[12] = { 0x40, 0xB4, 0x02, 0x4E, 0x36, 0x68, 0xB4, 0x46, 0x40, 0xBC, 0x60, 0x47 };
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const TUint8 KThumbStub2[8] = { 0x01, 0x4B, 0x1B, 0x68, 0x18, 0x47, 0xC0, 0x46 };
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const TUint8 KFastThumbStub[12] = { 0x40, 0xB4, 0x02, 0x4E, 0xB4, 0x46, 0x40, 0xBC, 0x60, 0x47, 0xC0, 0x46 };
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const TUint8 KFastThumbStub2[8] = { 0x01, 0x4B, 0x18, 0x47, 0xC0, 0x46, 0xC0, 0x46 };
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const unsigned char KRvctArm4Stub[4] = { 0x04, 0xF0, 0x1F, 0xE5 };
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//
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// class TBreakEntry
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//
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class TBreakEntry
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{
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public:
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inline TBreakEntry() { Reset(); };
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inline TBreakEntry(TUint32 aId, TUint32 aThreadId, TUint32 aAddress, TBool aThumbMode)
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: iId(aId),
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iThreadId(aThreadId),
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iAddress(aAddress),
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iThumbMode(aThumbMode)
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{
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iInstruction.FillZ(4);
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iPageAddress = 0;
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iDisabledForStep = EFalse;
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iObsoleteLibraryBreakpoint = EFalse;
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iResumeOnceOutOfRange = EFalse;
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iSteppingInto = EFalse;
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iRangeStart = 0;
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iRangeEnd = 0;
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iThreadSpecific = EFalse;
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};
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inline void Reset()
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{
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iThreadId = 0;
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iAddress = 0;
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iThumbMode = EFalse;
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iInstruction.FillZ(4);
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iPageAddress = 0;
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iDisabledForStep = EFalse;
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iObsoleteLibraryBreakpoint = EFalse;
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iResumeOnceOutOfRange = EFalse;
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iSteppingInto = EFalse;
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iRangeStart = 0;
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iRangeEnd = 0;
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};
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public:
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TInt32 iId;
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TUint32 iThreadId;
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TUint32 iAddress;
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TBool iThumbMode;
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TBuf8<4> iInstruction;
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TUint32 iPageAddress;
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TBool iDisabledForStep;
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TBool iObsoleteLibraryBreakpoint;
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TBool iResumeOnceOutOfRange;
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TBool iSteppingInto;
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TUint32 iRangeStart;
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TUint32 iRangeEnd;
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TBool iThreadSpecific;
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};
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class TProcessInfo
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{
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public:
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inline TProcessInfo() { Reset(); }
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inline TProcessInfo(TUint32 aId, TUint32 aCodeAddress, TUint32 aCodeSize, TUint32 aDataAddress)
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: iId(aId),
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iCodeAddress(aCodeAddress),
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iCodeSize(aCodeSize),
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iDataAddress(aDataAddress) { }
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inline void Reset()
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{
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iId = 0;
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iCodeAddress = 0;
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iCodeSize = 0;
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iDataAddress = 0;
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}
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public:
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TUint32 iId;
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TUint32 iCodeAddress;
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TUint32 iCodeSize;
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TUint32 iDataAddress;
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};
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//
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// class DMetroTrkDriverFactory
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//
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class DMetroTrkDriverFactory : public DLogicalDevice
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{
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public:
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DMetroTrkDriverFactory();
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virtual TInt Install();
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virtual void GetCaps(TDes8& aDes) const;
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virtual TInt Create(DLogicalChannelBase*& aChannel);
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};
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class DMetroTrkEventHandler;
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//
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// DMetroTrkChannel
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//
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class DMetroTrkChannel : public DLogicalChannel
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{
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public:
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DMetroTrkChannel(DLogicalDevice* aLogicalDevice);
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~DMetroTrkChannel();
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virtual TInt DoCreate(TInt aUnit, const TDesC* anInfo, const TVersion& aVer);
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virtual void HandleMsg(TMessageBase* aMsg);
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//called from the event handler
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void AddProcess(DProcess *aProcess, DThread* aThread);
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void StartThread(DThread *aThread);
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void RemoveProcess(DProcess *aProcess);
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void AddLibrary(DLibrary *aLibrary, DThread *aThread);
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void RemoveLibrary(DLibrary *aLibrary);
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void AddCodeSegment(DCodeSeg *aCodeSeg, DProcess *aProcess);
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void RemoveCodeSegment(DCodeSeg *aCodeSeg, DProcess *aProcess);
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TBool HandleEventKillThread(DThread* aThread);
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TBool HandleSwException(TExcType aExcType);
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TBool HandleHwException(TArmExcInfo* aExcInfo);
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TBool HandleUserTrace(TText* aStr, TInt aLen);
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protected:
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virtual void DoCancel(TInt aReqNo);
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virtual void DoRequest(TInt aReqNo, TRequestStatus* aStatus, TAny* a1, TAny* a2);
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virtual TInt DoControl(TInt aFunction, TAny *a1, TAny *a2);
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private:
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void HandleException(SEventInfo& aEventInfo, DThread* aCurrentThread);
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TInt SetBreak(TUint32 aThreadId, TMetroTrkBreakInfo* aBreakInfo);
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TInt StepRange(DThread* aThread, TMetroTrkStepInfo* aStepInfo);
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TInt ReadMemory(DThread* aThread, TMetroTrkMemoryInfo* aMemoryInfo);
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TInt WriteMemory(DThread* aThread, TMetroTrkMemoryInfo* aMemoryInfo);
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TInt ReadRegisters(DThread* aThread, TMetroTrkRegisterInfo* aRegisterInfo);
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TInt WriteRegisters(DThread* aThread, TMetroTrkRegisterInfo* aRegisterInfo);
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TInt GetProcessInfo(TInt aIndex, TMetroTrkTaskInfo* aTaskInfo);
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TInt GetThreadInfo(TInt aIndex, TMetroTrkTaskInfo* aTaskInfo);
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TInt GetProcessAddresses(DThread* aThread, TMetroTrkProcessInfo* aProcessInfo);
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TInt GetStaticLibraryInfo(TInt aIndex, SEventInfo* aEventInfo);
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TInt GetLibraryInfo(TMetroTrkLibInfo* aLibInfo);
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TInt GetExeInfo(TMetroTrkExeInfo* aExeInfo);
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TInt GetProcUidInfo(TMetroTrkProcUidInfo* aProcUidInfo);
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TInt DetachProcess(DProcess* aProcess);
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TInt DoSetBreak(const TUint32 aProcessId, const TUint32 aThreadId, const TUint32 aAddress, const TBool aThumbMode, TInt32 &aId);
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TInt DoEnableBreak(TBreakEntry &aEntry, TBool aSaveOldInstruction);
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TInt DoClearBreak(const TInt32 aId);
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TInt DoChangeBreakThread(TUint32 aThreadId, TInt32 aId);
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TInt DoSuspendThread(DThread *aThread);
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TInt DoResumeThread(DThread *aThread);
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TInt DoStepRange(DThread *aThread, const TUint32 aStartAddress, const TUint32 aStopAddress, TBool aStepInto, TBool aResumeOnceOutOfRange, TBool aUserRequest = EFalse);
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TInt DoReadMemory(DThread *aThread, const TUint32 aAddress, const TInt16 aLength, TDes8 &aData);
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TInt DoWriteMemory(DThread *aThread, const TUint32 aAddress, const TInt16 aLength, TDes8 &aData);
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TInt DoReadRegisters(DThread *aThread, const TInt16 aFirstRegister, const TInt16 aLastRegister, TDes8 &aValues);
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TInt DoWriteRegisters(DThread *aThread, const TInt16 aFirstRegister, const TInt16 aLastRegister, TDesC8 &aValues);
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TInt DoGetProcessInfo(const TInt aIndex, TMetroTrkTaskInfo *aInfo);
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TInt DoGetThreadInfo(const TInt aIndex, TMetroTrkTaskInfo *aInfo);
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TInt DoGetProcessAddresses(DThread *aThread, TUint32 &aCodeAddress, TUint32 &aDataAddress);
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TInt DoGetStaticLibraryInfo(const TInt aIndex, SEventInfo *aInfo);
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TInt DoGetLibraryInfo(TDesC8 &aDllName, TMetroTrkLibInfo* aLibInfo);
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TInt DoGetExeInfo(TDesC8 &aExeName, TMetroTrkExeInfo* aExeInfo);
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TInt DoGetProcUidInfo(TMetroTrkProcUidInfo* aProcUidInfo);
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TBool DoSecurityCheck();
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TInt TryToReadMemory(DThread *aThread, TAny *aSrc, TAny *aDest, TInt16 aLength);
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TInt TryToWriteMemory(DThread *aThread, TAny *aDest, TAny *aSrc, TInt16 aLength);
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TInt32 ReadRegister(DThread *aThread, TInt aNum);
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TInt ModifyBreaksForStep(DThread *aThread, TUint32 aRangeStart, TUint32 aRangeEnd, TBool aStepInto, TBool aResumeOnceOutOfRange, TBool aCheckForStubs);
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TBool IsExecuted(TUint8 aCondition, TUint32 aStatusRegister);
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void ClearAllBreakPoints();
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TInt DisableBreakAtAddress(TUint32 aAddress);
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TInt DoEnableDisabledBreak(TUint32 aThreadId);
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TUint32 ShiftedRegValue(DThread *aThread, TUint32 aInstruction, TUint32 aCurrentPC, TUint32 aStatusRegister);
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TBool InstructionModifiesPC(DThread *aThread, TUint8 *aInstruction, TBool aThumbMode, TBool aStepInto);
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TUint32 PCAfterInstructionExecutes(DThread *aThread, TUint32 aCurrentPC, TUint32 aStatusRegister, TInt aInstSize, TBool aStepInto, TUint32 &aNewRangeEnd, TBool &aChangingModes);
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void DecodeDataProcessingInstruction(TUint8 aOpcode, TUint32 aOp1, TUint32 aOp2, TUint32 aStatusRegister, TUint32 &aBreakAddress);
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TBool IsPreviousInstructionMovePCToLR(DThread *aThread);
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TBool IsAddressInRom(TUint32 aAddress);
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TBool IsAddressSecure(TUint32 aAddress);
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TBool IsRegisterSecure(TInt registerIndex);
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TInt AllocateShadowPageIfNecessary(TUint32 aAddress, TUint32 &aPageAddress);
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TInt FreeShadowPageIfNecessary(TUint32 aAddress, TUint32 aPageAddress);
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void NotifyEvent(SEventInfo aEventInfo, TBool isTraceEvent=EFalse);
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DThread* ThreadFromId(TUint32 aId);
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DProcess* ProcessFromId(TUint32 aId);
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TBool GetSystemThreadRegisters(TArmRegSet* aArmRegSet);
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TInt DoGetLibInfoFromCodeSegList(TDesC8 &aDllName, TMetroTrkLibInfo *aInfo);
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TInt DoGetLibInfoFromKernLibContainer(TDesC8 &aDllName, TMetroTrkLibInfo *aInfo);
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TBool HasManufacturerCaps(DThread* aThread);
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TBool IsBeingDebugged(const DThread* aThread);
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void CheckLibraryNotifyList(TUint32 aProcessId);
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private:
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DThread* iClientThread;
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DMetroTrkEventHandler* iEventHandler;
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TUint32 iExcludedROMAddressStart;
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TUint32 iExcludedROMAddressEnd;
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RArray<TBreakEntry> iBreakPointList;
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TInt iNextBreakId;
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SEventInfo *iEventInfo;
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RArray<SEventInfo> iEventQueue;
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RArray<SEventInfo> iTraceEventQueue;
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TRequestStatus* iRequestGetEventStatus;
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TUint32 iPageSize;
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TBool iNotifyLibLoadedEvent;
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TBool iMultipleMemModel;
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RArray<TProcessInfo> iDebugProcessList; //processes that we are debugging
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RArray<SEventInfo> iProcessNotifyList;
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TDfcQue* iDFCQue;
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TArmExcInfo iCurrentExcInfo;
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342 |
TBool iExcInfoValid;
|
|
343 |
TBool iDebugging;
|
|
344 |
// PANIC_BACKPORT
|
|
345 |
RPointerArray<NFastSemaphore> iFrozenThreadSemaphores;
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|
346 |
// END PANIC_BACKPORT
|
|
347 |
RArray<TTrkLibName> iLibraryNotifyList;
|
|
348 |
|
|
349 |
};
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|
350 |
|
|
351 |
#endif //__TRKDRIVER_H__
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