baseport/syborg/variant.mmh
author Gareth Stockwell <gareth.stockwell@accenture.com>
Fri, 24 Sep 2010 13:44:00 +0100
branchgraphics-phase-3
changeset 117 b7d35cad610d
parent 87 42ae69d3c4a8
permissions -rw-r--r--
Modified path to qemu package source to /sf/adapt/qemu This is to conform with the convention that adaptation-level packages should be located in /sf/adapt rather than /sf/adaptation. This is an interim workaround for bug 3744.
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/*
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* Copyright (c) 2009 Nokia Corporation and/or its subsidiary(-ies).
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* All rights reserved.
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* This component and the accompanying materials are made available
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* under the terms of the License "Eclipse Public License v1.0"
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* which accompanies this distribution, and is available
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* at the URL "http://www.eclipse.org/legal/epl-v10.html".
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*
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* Initial Contributors:
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* Nokia Corporation - initial contribution.
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*
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* Contributors:
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*
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* Description:
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*
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*/
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#include <platform_paths.hrh>
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//macro   __CPU_ARM926J__
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//#define __CPU__ ARM926EJ-S
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//macro __CPU_ARM1136__
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//#define __CPU_ARM1176__
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macro __CPU_CORTEX_A8N__
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macro __VFP_V3
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#define SYBORG
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macro __SYBORG__
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#define MM_MULTIPLE
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//#define MM_FLEXIBLE
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// TO DO: decide if we need to switch these on or off!!
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//
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// Uncomment the following line if using the r1p0 release or later of the ARM1136 processor.
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// 
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//#define __CPU_ARM1136_IS_R1__
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//
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/* Uncomment if ARM1136 Erratum 351912
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 * "VFP11 double precision multiply can corrupt data"
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 * is fixed on this hardware.
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 */
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//macro __CPU_ARM1136_ERRATUM_351912_FIXED
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/* Uncomment if ARM1136 Erratum 353494
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 * "Rare conditions can cause corruption of the Instruction Cache"
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 * is fixed on this hardware.
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 */
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//macro __CPU_ARM1136_ERRATUM_353494_FIXED
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/* Uncomment if ARM1136 Erratum 371025
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 * "Invalidate Instruction Cache operation can fail"
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 * is fixed on this hardware.
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 */
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//macro __CPU_ARM1136_ERRATUM_371025_FIXED
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/* Uncomment if using ARM1136 processor and ARM1136 Erratum 399234
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 * "Write back data cache entry evicted by write through entry causes data corruption"
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 * is fixed on this hardware.
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 * Workaround
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 * The erratum may be avoided by marking all cacheable memory as one of write through or write back.
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 * This requires the memory attributes described in the translation tables to be modified by software
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 * appropriately, or the use of the remapping capability to remap write through regions to non cacheable.
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 * If this macro is enabled, it should be acompanied by:
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 *					GBLL	CFG_CPU_ARM1136_ERRATUM_399234_FIXED in config.inc
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 */
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//macro __CPU_ARM1136_ERRATUM_399234_FIXED
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/* Uncomment if ARM1136 Erratum 408022 "Cancelled write to CONTEXTID register might update ASID" 
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 * is fixed on this hardware.
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 */
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//macro __CPU_ARM1136_ERRATUM_408022_FIXED
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// TO DO:
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//
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// Uncomment the next line if using the ARM1136 processor and ARM1136 Erratum 406973
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// "CLREX instruction might be ignored during data cache line fill"
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// is fixed on this hardware.
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// 
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//#define __CPU_ARM1136_ERRATUM_406973_FIXED
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// Uncomment if:
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//	1)	using ARM1136 processor and ARM1136 Erratum 411920: "Invalidate Entire Instruction Cache
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//	  	operation might fail to invalidate some lines if coincident with linefill"
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//  	  	is fixed on this hardware, or
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//	2)	using ARM1176 processor and ARM1176 Erratum 415045: "Invalidate Entire Instruction Cache
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// 	  	operation might fail to invalidate some lines if coincident with linefill
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//	  	is fixed on this hardware.
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// Workaround:
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//	1)	Disables the use of of prefetch range cache operations by setting RV bit in Auxiliary Ctrl Reg.
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//	2)	Replaces Invalidate ICache operation with the sequence defined in the errata document.
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// If this macro is enabled, it should be accompanied by:
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// 	"GBLL CFG_CPU_ARM1136_ERRATUM_411920_FIXED" in variant.mmh
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//
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//macro __CPU_ARM1136_ERRATUM_411920_FIXED
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#ifndef GCCE
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macro __CPU_HAS_VFP
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#define USE_VFP_MATH
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#endif
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// !@! not moving when 1136
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//#define MM_MOVING
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macro __DEBUGGER_SUPPORT__
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macro FASTTRACE_KERNEL_ALL
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macro __EMI_SUPPORT__
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#define VariantTarget(name,ext)     _syborg_##name##.##ext
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#define AsspNKernIncludePath        /sf/adapt/qemu/baseport/syborg/specific
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#define VariantMediaDefIncludePath  /epoc32/include/syborg        
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#define PlatformLib		   		    kasyborg.lib
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systeminclude	/epoc32/include/memmodel/epoc/mmubase
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//systeminclude	/epoc32/include/memmodel/epoc/moving
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//systeminclude	/epoc32/include/memmodel/epoc/moving/arm
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//systeminclude	/epoc32/include/memmodel/epoc/flexible
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//systeminclude	/epoc32/include/memmodel/epoc/flexible/arm
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systeminclude	/epoc32/include/memmodel/epoc/multiple
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systeminclude	/epoc32/include/memmodel/epoc/multiple/arm
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SYMBIAN_BASE_SYSTEMINCLUDE(memmodel/epoc/mmubase)
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SYMBIAN_BASE_SYSTEMINCLUDE(memmodel/epoc/multiple)
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SYMBIAN_BASE_SYSTEMINCLUDE(memmodel/epoc/multiple/arm)
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OS_LAYER_SYSTEMINCLUDE
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systeminclude	../../../../os/kernelhwsrv/driversupport/socassp/interface
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// Uncomment for T_USERCOMDEB test
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//#define BUILD_TESTS
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#ifdef BUILD_TESTS
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macro BTRACE_KERNEL_ALL
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#endif
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//OPTION_REPLACE	ARMCC  --cpu __CPU__
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//OPTION_REPLACE	ARMASM --cpu __CPU__