// Copyright (c) 1994-2009 Nokia Corporation and/or its subsidiary(-ies).

// All rights reserved.

// This component and the accompanying materials are made available

// under the terms of the License "Eclipse Public License v1.0"

// which accompanies this distribution, and is available

// at the URL "http://www.eclipse.org/legal/epl-v10.html".

//

// Initial Contributors:

// Nokia Corporation - initial contribution.

//

// Contributors:

//

// Description:

// e32\kernel\arm\cutils.cia

// 

//

//#define __EARLY_DEBUG__

//#define __NE1__

//#define __MI920__

//#define __BOOTLDRIN__

//#define __MCOT__

#include <e32cia.h>

#include <arm_mem.h>

#include "nk_cpu.h"

#include <kernel/kern_priv.h>

#include <kernel/cache.h>

#if defined(__MEMMODEL_MOVING__) || defined(__MEMMODEL_MULTIPLE__)

#include <mmubase.h>

#endif

#ifdef __SMP__

__NAKED__ TUint __arm_cpu_number()

	{

	asm("mrc	p15, 0, r0, c0, c0, 5 ");

	asm("and	r0, r0, #15 ");

	__JUMP(,lr);

	}

#endif

#ifdef __EARLY_DEBUG__

__NAKED__ void DebugOutputChar(TUint)

//

// Early debug print code - must hack this for the particular platform.

// We assume bootstrap trace has already initialised the port.

//

	{

#if defined(__MISA__)

	// Brutus debug print code.

	asm("ldr r1, __UartBase ");

	asm("wait_tx_rdy: ");

	asm("ldr r2, [r1, #0x20] ");

	asm("tst r2, #0x04 ");

	asm("beq wait_tx_rdy ");

	asm("str r0, [r1, #0x14] ");

	__JUMP(,lr);

	asm("__UartBase: ");

	asm(".word 0x63001000 ");

#elif defined(__MAWD__)

	// S5mx debug print code.

	asm("ldr r1, __UartBase ");

	asm("wait_tx_rdy: ");

	asm("ldr r2, [r1, #0x10] ");

	asm("tst r2, #0x20 ");

	asm("bne wait_tx_rdy ");

	asm("str r0, [r1, #0x00] ");

	__JUMP(,lr);

	asm("__UartBase: ");

	asm(".word 0x63000700 ");

#elif defined(__SAWD__)

	// S5mx debug print code.

	asm("ldr r1, __UartBase ");

	asm("wait_tx_rdy: ");

	asm("ldr r2, [r1, #0x10] ");

	asm("tst r2, #0x20 ");

	asm("bne wait_tx_rdy ");

	asm("str r0, [r1, #0x00] ");

	__JUMP(,lr);

	asm("__UartBase: ");

	asm(".word 0x80000700 ");

#elif defined(__MI920__) || defined(__NI1136__) || defined(__BOOTLDRIN__)

	// Integrator debug print code.

	asm("ldr r1, __UartBase ");

	asm("wait_tx_rdy: ");

	asm("ldr r2, [r1, #0x18] ");

	asm("tst r2, #0x20 ");

	asm("bne wait_tx_rdy ");

	asm("str r0, [r1, #0x00] ");

	__JUMP(,lr);

	asm("__UartBase: ");

#if defined(__MI920__)

	asm(".word 0x63006000 ");

#elif defined(__NI1136__)

	asm(".word 0xc6006000 ");

#elif defined(__BOOTLDRIN__)

	asm(".word 0x16000000 ");

#endif

#elif 0

//#elif defined(__NI1136__)

	// Use debug comms channel

//	asm("mov r1, #0x1000 ");

//	asm("mcr p14, 0, r1, c0, c1, 0 ");

//	asm("1: ");

//	asm("mrc p14, 0, r15, c0, c1, 0 ");		// read comm channel flags into CPSR

//	asm("bcs 1b ");	// wait for space

//	asm("mcr p14, 0, r0, c0, c5, 0 ");		// output character

//	__JUMP(,lr);

	asm("mov r1, #0xc3000000 ");

	asm("add r1, r1, #0xc000 ");

	asm("str r0, [r1, #0x20] ");

	__JUMP(,lr);

#elif defined(__MCOT__)

	// Lubbock debug print code.

	asm("ldr r1, __UartBase ");

	asm("1: ");

	asm("ldr r2, [r1, #0x14] ");

	asm("tst r2, #0x20 ");

	asm("beq 1b ");

	asm("str r0, [r1, #0x00] ");

	__JUMP(,lr);

	asm("__UartBase: ");

	asm(".word 0x63001000 ");

#elif defined(__IS_OMAP1610__) || defined(__IS_OMAP1510__)

	// omap 1510 and 1610 debug print code.

	// N.B. Could also use JTAG DCC code from Arm::DebugOutJTAG()

	asm("ldr r1, __UartBase ");

	asm("1: ");

	asm("ldrb r2, [r1, #0x14] ");

	asm("tst r2, #0x20 ");

	asm("beq 1b ");

	asm("strb r0, [r1, #0x00] ");

	__JUMP(,lr);

	asm("__UartBase: ");

	#if defined(__MEMMODEL_DIRECT__)

	asm(".word 0xFFFB0000 ");	// Physical for single

	#else

	asm(".word 0x630B0000 ");	// Virtual for normal

	#endif

#elif defined(__NE1__)

	asm("ldr	r1, __SuperPageAddress ");

	asm("adr	r2, __UartBase ");

	asm("ldr	r1, [r1] ");

	asm("ldr	r1, [r1, #%a0]" : : "i" _FOFF(TSuperPage,iDebugPort));

	asm("cmp	r1, #0 ");

	asm("ldrne	r2, [r2, #4] ");

	asm("ldreq	r2, [r2, #0] ");

	asm("1: ");

	asm("ldr	r3, [r2, #0x14] ");	// LSR

	asm("tst	r3, #0x20 ");

	asm("beq	1b ");

	asm("str	r0, [r2, #0x00] ");	// THR

	__JUMP(,lr);

	asm("__UartBase: ");

	#if defined(__MEMMODEL_DIRECT__)

	asm(".word 0x18034000 ");

	asm(".word 0x18034400 ");

	#else

	asm(".word 0xc6000000 ");

	asm(".word 0xc6000400 ");

	#endif

	asm("__SuperPageAddress: ");

	asm(".word SuperPageAddress ");

#elif defined(__REALVIEW__)

	// RealView platform debug print code.

	asm("ldr r1, __SuperPageBase ");

	asm("ldr r1, [r1] ");

	asm("ldr r1, [r1, #%a0] " : : "i" _FOFF(TSuperPage,iDebugPort));

	asm("cmp r1, #%a0 " : : "i" ((TInt)KNullDebugPort));

	asm("bxeq lr ");                // debug output supressed

	asm("adr r2, __UartBase ");

	asm("ldr r1, [r2] ");

	asm("1: ");

	asm("ldr r2, [r1, #0x18] ");    // check status Tpl011::KHoFlags

	asm("tst r2, #0x20 ");          // compare to Tpl011::KFlagTxFifoFull  

	asm("bne 1b ");                 // if transmit data full, wait

	asm("str r0, [r1] ");           // store to data register Tpl011::KHoData

	asm("bx  lr ");

	asm("__SuperPageBase: ");

	asm(".word %a0 " : : "i" ((TInt)&SuperPageAddress));

	asm("__UartBase: ");

	asm(".word 0xc6004000 ");

#endif

	}

#endif

__NAKED__ EXPORT_C TInt Arm::DebugOutJTAG(TUint /*aChar*/)

	{

#if defined(__CPU_ARM920T__) || defined(__CPU_ARM720T__) || defined(__CPU_ARM926J__)

	asm("mov r2, #0x100000 ");			// timeout

	asm("1: ");

	asm("mrc p14, 0, r1, c0, c0, 0 ");	// get debug comms control register

	asm("tst r1, #2 ");					// test W bit (1=busy)

	asm("subnes r2, r2, #1 ");			// if busy, decrement timeout

	asm("bne 1b ");						// if busy and not timed out, loop

	asm("tst r1, #2 ");

	asm("mcreq p14, 0, r0, c1, c0, 0 ");	// if not busy, output value

	asm("moveq r0, #0 ");				// and return KErrNone

	asm("movne r0, #%a0" : : "i" ((TInt)KErrTimedOut));	// else return KErrTimedOut

#elif defined(__CPU_ARM1020T__)

	asm("mov r2, #0x100000 ");			// timeout

	asm("1: ");

	asm("mrc p14, 0, r1, c0, c1, 0 ");	// get DSCR

	asm("movs r1, r1, lsl #25 ");		// test WE bit (1=empty) - set N flag if empty

	asm("subpls r2, r2, #1 ");			// if busy, decrement timeout

	asm("bpl 1b ");						// if busy and not timed out, loop

	asm("cmp r1, #0 ");

	asm("mcrmi p14, 0, r0, c0, c5, 0 ");	// if not busy, output value

	asm("movmi r0, #0 ");				// and return KErrNone

	asm("movpl r0, #%a0" : : "i" ((TInt)KErrTimedOut));	// else return KErrTimedOut

#elif defined(__CPU_ARM1136__) || defined(__CPU_ARM1176__)

	asm("mov r2, #0x100000 ");			// timeout

	asm("1: ");

	asm("mrc p14, 0, r15, c0, c1, 0 ");	// test DSCR, wDTRfull->C flag (1=full)

	asm("subcss r2, r2, #1 ");			// if busy, decrement timeout

	asm("bcs 1b ");						// if busy and not timed out, loop

	asm("mrc p14, 0, r15, c0, c1, 0 ");	// test DSCR, wDTRfull->C flag (1=full)

	asm("mcrcc p14, 0, r0, c0, c5, 0 ");	// if not busy, output value

	asm("movcc r0, #0 ");				// and return KErrNone

	asm("movcs r0, #%a0" : : "i" ((TInt)KErrTimedOut));	// else return KErrTimedOut

#else

	asm("mov r0, #%a0" : : "i" ((TInt)KErrNotSupported));

#endif

	__JUMP(,lr);

	}

__NAKED__ EXPORT_C TInt Arm::DebugInJTAG(TUint32& /*aRxData*/)

	{

#if defined(__CPU_ARM920T__) || defined(__CPU_ARM720T__) || defined(__CPU_ARM926J__)

	asm("mrc p14, 0, r2, c0, c0, 0 ");	// get debug comms control register

	asm("tst r2, #1 ");					// test R bit (1=data available)

	asm("mrcne p14, 0, r2, c1, c0, 0 ");	// get RX data

	asm("strne r2, [r0] ");				// store RX data

	asm("movne r0, #0 ");				// return KErrNone

	asm("moveq r0, #%a0" : : "i" ((TInt)KErrNotReady));	// if no data available return KErrNotReady

#elif defined(__CPU_ARM1020T__)

	asm("mrc p14, 0, r2, c0, c1, 0 ");	// get DSCR

	asm("tst r2, #0x80 ");				// test RF bit (1=full)

	asm("mrcne p14, 0, r2, c0, c5, 0 ");	// get RX data

	asm("strne r2, [r0] ");				// store RX data

	asm("movne r0, #0 ");				// return KErrNone

	asm("moveq r0, #%a0" : : "i" ((TInt)KErrNotReady));	// if no data available return KErrNotReady

#elif defined(__CPU_ARM1136__) || defined(__CPU_ARM1176__)

	asm("mrc p14, 0, r15, c0, c1, 0 ");	// test DSCR, rDTRfull->Z flag (1=full)

	asm("mrceq p14, 0, r2, c0, c5, 0 ");	// get RX data

	asm("streq r2, [r0] ");				// store RX data

	asm("moveq r0, #0 ");				// return KErrNone

	asm("movne r0, #%a0" : : "i" ((TInt)KErrNotReady));	// if no data available return KErrNotReady

#else

	asm("mov r0, #%a0" : : "i" ((TInt)KErrNotSupported));

#endif

	__JUMP(,lr);

	}

__NAKED__ void KPrintf(const char*, ...)

	{

	asm("b  " CSM_ZN4Kern6PrintfEPKcz);

	}

__NAKED__ TInt A::CallSupervisorFunction(TSupervisorFunction, TAny*)

//

// Execute an F32 function in supervisor mode - might be THUMB.

//

	{

	asm("mov r2, r0 ");					// r2=function ptr

	asm("mov r0, r1 ");					// r0=argument

	__JUMP(,r2);						// call function in correct mode

	}

#if defined (__DES8_MACHINE_CODED__)

/**

Checks whether the specified name is a valid DObject full name.

A name is deemed to be invalid, if it contains an asterisk or a question

mark.

@param aName Name to check.

@return KErrNone, if valid;

        KErrBadName, if invalid.

*/

#ifndef __KERNEL_MODE__

#error "TDesC is not 8-bit as __KERNEL_MODE__ is not defined (see e32cmn.h)"

#endif

__NAKED__ EXPORT_C TInt Kern::ValidateFullName(const TDesC& /*aName*/)

//

// Check for * or ? in descriptor, return KErrBadName if found

//

	{

	asm("ldr r2, [r0], #4 ");			// r2=length/type

	asm("cmp r2, #0x50000000 ");

	asm("mvncs r0, #%a0" : : "i" (~KErrBadDescriptor));

	__JUMP(cs,lr);

	asm("bics r3, r2, #0xF0000000 ");	// r3=length

	asm("moveq r0, #0 ");				// if length=0, return KErrNone

	__JUMP(eq,lr);

	asm("eor r2, r2, r2, lsr #1 ");

	asm("msr cpsr_flg, r2 ");

	asm("addcs r0, r0, #4 ");

	asm("ldrle r0, [r0] ");

	asm("addeq r0, r0, #4 ");			// r0=this.Ptr()

	asm("ValidateFullName_1: ");

	asm("ldrb r1, [r0], #1 ");			// r1=*r0++

	asm("cmp r1, #0x20 ");				// is it < 0x20 ?

	asm("rsbhss r2, r1, #0x7f ");		// if not, compare 0x7f with char

	asm("bls ValidateFullName_2 ");		// if char < 0x20 or char >= 0x7f, error

	asm("cmp r1, #'*' ");				// is it *

	asm("cmpne r1, #'?' ");				// if not, is it ?

	asm("subnes r3, r3, #1 ");			// if neither of these, decrement length

	asm("bne ValidateFullName_1 ");

	asm("ValidateFullName_2: ");		// About to return so did we

	asm("cmp r3, #0 ");					// reach the end of string?

	asm("moveq r0, #0 ");				// if we did, return KErrNone

	asm("mvnne r0, #%a0" : : "i" (~KErrBadName));	// else return KErrBadName

	__JUMP(,lr);

	}

#endif

/**

Default implementation for Kern::NanoWait, which waits for the specified time.

@param aInterval The time to wait in nanoseconds.

*/

__NAKED__ void K::DoNanoWait(TUint32 /*aInterval*/)

	{

	asm("ldr r1, __NanoWaitCal ");

	asm("ldr r1, [r1] ");				// r1=PP::NanoWaitCal

	asm(".align 8");					// to make the 'nanowait_loop' start on a cache line

	asm("nanowait_loop: ");

	asm("subs r0, r0, r1 ");

	asm("bhi nanowait_loop ");

	__JUMP(,lr);

	asm("__NanoWaitCal: ");

	asm(".word  " CSM_ZN2PP11NanoWaitCalE );

	}

__NAKED__ void A::StartCrashDebugger(const TAny*, TInt)

	{

	USER_MEMORY_GUARD_OFF(,r0,r0);		// let crash debugger have unfettered access to user memory

	asm("ldr r0, __MonitorEntryPoint ");

	asm("ldmia r0, {r1-r3} ");			// r1 = debugger entry point

	asm("mvn r0, r2 ");

	asm("cmp r1, r0 ");					// r2 = complement of r1 if valid

	asm("moveq r12, r1, lsr #2 ");

	asm("muleq r0, r12, r2 ");			// r3 = (r1*r2/4)MOD 2^32 if valid

	asm("cmpeq r3, r0 ");

	__JUMP(ne,lr);						// if debugger entry point invalid, return

#ifdef __SMP__

	GET_RWNO_TID(,r0);

	asm("ldr r0, [r0, #%a0]" : : "i" _FOFF(TSubScheduler,i_Regs));	// pass in address of stored registers

#else

	asm("ldr r0, __TheScheduler ");

	asm("ldr r0, [r0, #%a0]" : : "i" _FOFF(TScheduler,i_Regs));	// pass in address of stored registers

#endif

	__JUMP(,r1);						// jump to monitor

										// if it returns, return from this function and reboot

	asm("__MonitorEntryPoint: ");

	asm(".word  " CSM_ZN2PP17MonitorEntryPointE);

	}

/**	Increments atomically a counter that's initially positive

	It checks the previous CPU mode and if it's User, it only applies user permissions when accessing aValue.

	It doesn't increment if aValue is negative or zero.

	@param aValue Reference to the counter to increment

	@return Previous value of counter

********** NO GOOD ON SMP ****************

*/

EXPORT_C __NAKED__ TInt Kern::KUSafeInc(TInt& /*aValue*/)

	{

	ASM_ASSERT_PAGING_SAFE

	asm("mrs ip, cpsr ");

	INTS_OFF_1(r2, ip, INTS_ALL_OFF);

	asm("mrs r3, spsr ");		// check caller's mode

	asm("mov r1, r0 ");			// address into r1

	asm("tst r3, #0x0f ");		// test for user mode

	asm("bne 1f ");				// branch if not

	INTS_OFF_2(r2, ip, INTS_ALL_OFF);	// interrupts off

	USER_MEMORY_GUARD_OFF(,r2,r2);

	asm("ldrt r0, [r1] ");		// r0=original value, only allow user permissions

	asm("cmp r0, #0 ");

	asm("addgt r2, r0, #1 ");

	asm("strgtt r2, [r1] ");	// if original value >0, increment

	USER_MEMORY_GUARD_ON(,r2,r2);

	asm("msr cpsr, ip ");		// restore interrupts

	__JUMP(,lr);

	asm("1: ");

	INTS_OFF_2(r2, ip, INTS_ALL_OFF);	// interrupts off

	asm("ldr r0, [r1] ");		// r0=original value

	asm("cmp r0, #0 ");

	asm("addgt r2, r0, #1 ");

	asm("strgt r2, [r1] ");		// if >0, increment

	asm("msr cpsr, ip ");		// restore interrupts

	__JUMP(,lr);

	}

/**	Decrements atomically a counter that's initially positive

	It checks the previous CPU mode and if it's User, it only applies user permissions when accessing aValue.

	It doesn't decrement if aValue is negative or zero.

	@param aValue Reference to the counter to decrement

	@return Previous value of counter 

	********** NO GOOD ON SMP ****************

*/

EXPORT_C __NAKED__ TInt Kern::KUSafeDec(TInt& /*aValue*/)

	{

	ASM_ASSERT_PAGING_SAFE

	asm("mrs ip, cpsr ");

	INTS_OFF_1(r2, ip, INTS_ALL_OFF);

	asm("mrs r3, spsr ");		// check caller's mode

	asm("mov r1, r0 ");			// address into r1

	asm("tst r3, #0x0f ");		// test for user mode

	asm("bne 1f ");				// branch if not

	INTS_OFF_2(r2, ip, INTS_ALL_OFF);	// interrupts off

	USER_MEMORY_GUARD_OFF(,r2,r2);

	asm("ldrt r0, [r1] ");		// r0=original value, only allow user permissions

	asm("subs r2, r0, #1 ");	// decrement

	asm("strget r2, [r1] ");	// update if result >=0

	USER_MEMORY_GUARD_ON(,r2,r2);

	asm("msr cpsr, ip ");		// restore interrupts

	__JUMP(,lr);

	asm("1: ");

	INTS_OFF_2(r2, ip, INTS_ALL_OFF);	// interrupts off

	asm("ldr r0, [r1] ");		// r0=original value

	asm("subs r2, r0, #1 ");	// decrement

	asm("strge r2, [r1] ");		// update if result >=0

	asm("msr cpsr, ip ");		// restore interrupts

	__JUMP(,lr);

	}

#ifdef __HANDLES_MACHINE_CODED__

EXPORT_C __NAKED__ DObject* DThread::ObjectFromHandle(TInt /*aHandle*/)

	{

	// r0=this, r1=aHandle

	asm("adds ip, r1, r1 ");			// check for special handle (bit 31 set => special)

	asm("bcs 2f ");						// if not, N flag indicates local handle

	asm("ldrpl ip, [r0, #%a0]" : : "i" _FOFF(DThread,iOwningProcess));	// if not local, ip=aThread->iOwningProcess

	asm("addmi ip, r0, #%a0" : : "i" _FOFF(DThread,iHandles));		// if local, ip=&aThread->iHandles

	asm("addpl ip, ip, #%a0" : : "i" _FOFF(DProcess,iHandles));		// if not, ip=&aThread->iOwningProcess->iHandles

#ifdef __HANDLES_USE_RW_SPIN_LOCK__

	asm("stmfd sp!, {r0,r1,ip,lr} ");	// save r0, r1, ip and lr

	asm("mov r0, ip ");					// move RObjectIx this(ip) to r0

	asm("bl _ZN9RObjectIx15AcquireReadLockEv") // call RObjectIx::AquireReadLock

	asm("ldmfd sp!, {r0,r1,ip,lr} ");	// restore r0, r1, ip and lr

#else

	// system lock is held

#endif

#ifdef __HANDLES_USE_RW_SPIN_LOCK__

// TODO: If handle lookup protected only by RW spin lock, must take a reference on the object

// (__HANDLES_USE_RW_SPIN_LOCK__ is not supported or even finished)

#endif

	asm("mov r3, r1, lsl #17 ");		// r3=r1<<17 = index(aHandle)<<17

	asm("mov r1, r1, lsl #2 ");			// r1=instance(Handle)<<18

	asm("ldr r0, [ip, #%a0]" : : "i" _FOFF(RObjectIx,iCount));		// r0=iCount

	asm("ldr ip, [ip, #%a0]" : : "i" _FOFF(RObjectIx,iSlots));		// ip=iSlots

	asm("subs r0, r0, r3, lsr #17 ");	// r0 = iCount - index(aHandle) - 1

	asm("ldrge r2, [ip, r3, lsr #14]! ");	// if count-1>=index, r2=pS->uniqueID:pS->instance, ip=iSlots+index(Handle)=pS ...

	asm("ldrge r0, [ip, #4] ");			// ... and r0 = pointer to DObject ...

	asm("andge r0, r0, #%a0" : : "i" (RObjectIx::EObjRObjMask));	// r0 = (pointer & EObjRObjMask);

	asm("eorge r1, r1, r2, lsl #18 ");	// ... and check if instance(aHandle)<<18 == pS->(uid:instance)<<18

	asm("movges r1, r1, lsr #18 ");

	asm("movne r0, #0");				// ... else r0 = 0

#ifdef __HANDLES_USE_RW_SPIN_LOCK__

	asm("stmfd sp!, {r0,ip,lr} ");	// save r0, ip and lr

	asm("mov r0, ip ");					// move RObjectIx this(ip) to r0

	asm("bl _ZN9RObjectIx15ReleaseReadLockEv") // call RObjectIx::ReleaseReadLock

	asm("ldmfd sp!, {r0,ip,lr} ");	// restore r0, ip and lr

#else

	// system lock is held, nothing to do

#endif

	// r0 now either 0(EBadHandle) or valid pointer...

	__JUMP(,lr);

	asm("1: ");

	asm("mov r0, #0 ");					// if wrong, bad handle

	__JUMP(,lr);

	asm("2: ");							// r12=handle<<1 (valid values are ffff0000 and ffff0002)

	asm("bic ip, ip, #0x10000 ");		// clear 'no close' flag

#ifdef	__OBSOLETE_V1_IPC_SUPPORT__

	asm("cmp ip, #0x10000000 ");

	asm("blo dobj_pseudo_5 ");			// if handle<0x88000000, it's an IPC client thread pseudo handle

#endif

	asm("ldr r0, __TheScheduler ");

	asm("ldr r0, [r0, #%a0]" : : "i" _FOFF(TScheduler,iCurrentThread));	// r0->current NThread

	asm("adds ip, ip, #0x20000 ");		// valid values now 0 and 2

	asm("ldreq r0, [r0, #%a0]" : : "i" (_FOFF(DThread,iOwningProcess)-_FOFF(DThread,iNThread)));

	__JUMP(eq,lr);						// if handle = ffff8000, return TheCurrentThread->iOwningProcess

	asm("cmp ip, #2 ");					// otherwise, handle = ffff8001 ?

	asm("subeq r0, r0, #%a0" : : "i" _FOFF(DThread,iNThread));

	__JUMP(eq,lr);						// if so, return TheCurrentThread

	asm("b 1b ");						// else bad handle

	asm("badobjectfault: ");

	asm("mov r0, #%a0" : : "i" (EBadObjectType));

	asm("b  " CSM_ZN1K5FaultENS_6TFaultE);

	}

/**

Returns the kernel object that the given handle refers.

The handle passed is looked up in the thread's handles collection if the handle is local or

in the thread's owner process' collection otherwise. If aHandle is negative or not found in

the thread's or process' collection then NULL is returned.

Two special handle values KCurrentThreadHandle and KCurrentProcessHandle can be used to get

a pointer to the current thread and the current process.

aType is used to ensure that the object referred by the handle is of desired type.

If the type of the object referred by aHandle is different from aType then NULL is returned.