author | Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com> |
Thu, 17 Dec 2009 09:24:54 +0200 | |
changeset 9 | 96e5fb8b040d |
permissions | -rw-r--r-- |
9
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/* |
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* Copyright (c) 2009 Nokia Corporation and/or its subsidiary(-ies). |
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* All rights reserved. |
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* This component and the accompanying materials are made available |
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* under the terms of the License "Eclipse Public License v1.0" |
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* which accompanies this distribution, and is available |
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* at the URL "http://www.eclipse.org/legal/epl-v10.html". |
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* |
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* Initial Contributors: |
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* Nokia Corporation - initial contribution. |
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* |
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* Contributors: |
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* |
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* Description: |
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* |
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*/ |
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// |
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// TO DO: (mandatory) |
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// |
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// Add here a definition for your CPU (list in CONFIG.INC) |
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// |
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macro __CPU_ARM11MP__ |
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// |
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// TO DO: (mandatory) |
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// |
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// Add here a definition for your Memory Model |
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// |
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#define MM_MULTIPLE |
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// |
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// TO DO: (mandatory) |
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// |
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// Macro which generates the names for the binaries for this platform |
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// |
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#ifndef VariantTarget |
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#define VariantTarget(name,ext) _ne1_tb_##name##.##ext |
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#endif |
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#ifndef VariantMediaDefIncludePath |
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#define VariantMediaDefIncludePath /epoc32/include/ne1_tb |
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#endif |
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// Used in MMP files for include paths e.g. to hcrconfig.h header |
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#ifndef VariantIncludePath |
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#define VariantIncludePath /epoc32/include/ne1_tb |
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#endif |
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//Include debug support |
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macro __DEBUGGER_SUPPORT__ |
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// |
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// TO DO: |
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// |
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// If euser is built from the variant, uncomment the following line to build it |
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// as ARM rather than Thumb |
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// |
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//#define __BUILD_VARIANT_EUSER_AS_ARM__ |
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// |
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// TO DO: (optional) |
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// |
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// To replace some of the generic utility functions with variant specific |
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// versions (eg to replace memcpy with a version optimised for the hardware), |
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// uncomment the two lines below and edit the files in the replacementUtils |
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// directory. |
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// |
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//#define REPLACE_GENERIC_UTILS |
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//#define VariantReplacementUtilsPath ne1_tb/replacement_utils |
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// |
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// TO DO: (optional) |
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// |
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// Enable BTrace support in release versions of the kernel by adding |
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// the following BTRACE macro declarations |
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// |
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macro BTRACE_KERNEL_ALL |
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// |
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// TO DO: |
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// |
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// Uncomment the following line if using the r1p0 release or later of the ARM1136 processor. |
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// |
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//#define __CPU_ARM1136_IS_R1__ |
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// |
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// Include the following line if default memory mapping should use shared memory. |
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// Should be on for multicore (SMP) devices. |
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macro __CPU_USE_SHARED_MEMORY |
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// Include the following line if CPU cannot tolerate the presence of nonshared |
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// cached memory. This seems to be the case for the ARM11 MPCore - corruption |
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// of data is observed in non-shared cached regions if __CPU_USE_SHARED_MEMORY |
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// is used. |
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macro __CPU_FORCE_SHARED_MEMORY_IF_CACHED |
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// TO DO: |
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// |
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// Uncomment the next line if using the ARM1136 processor and ARM1136 Erratum 406973 |
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// "CLREX instruction might be ignored during data cache line fill" |
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// is fixed on this hardware. |
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// |
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//#define __CPU_ARM1136_ERRATUM_406973_FIXED |
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// Uncomment next line if using the ARM1136 processor and ARM1136 Erratum 408022 |
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// "Cancelled write to CONTEXTID register might update ASID" |
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// is fixed on this hardware. |
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// |
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//#define __CPU_ARM1136_ERRATUM_408022_FIXED |
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// Uncomment if: |
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// 1) using ARM1136 processor and ARM1136 Erratum 411920: "Invalidate Entire Instruction Cache |
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// operation might fail to invalidate some lines if coincident with linefill" |
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// is fixed on this hardware, or |
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// 2) using ARM1176 processor and ARM1176 Erratum 415045: "Invalidate Entire Instruction Cache |
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// operation might fail to invalidate some lines if coincident with linefill |
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// is fixed on this hardware. |
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// Workaround: |
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// 1) Disables the use of of prefetch range cache operations by setting RV bit in Auxiliary Ctrl Reg. |
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// 2) Replaces Invalidate ICache operation with the sequence defined in the errata document. |
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// If this macro is enabled, it should be accompanied by: |
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// "GBLL CFG_CPU_ARM1136_ERRATUM_411920_FIXED" in variant.mmh |
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// |
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// #define __CPU_ARM1136_ERRATUM_411920_FIXED |
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|
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macro FAULTY_NONSHARED_DEVICE_MEMORY |
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#define AsspNKernIncludePath /epoc32/include/assp/naviengine/nkern |
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|
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// FIQ can not be disabled on naviengine, tell kernel to ignore it... |
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macro __FIQ_IS_UNCONTROLLED__ |
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|
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macro MONITOR_THREAD_CPU_TIME |
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|
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#if defined(__USING_USING_ASSP_REGISTER_API__) || defined(__USING_INTERRUPT_API__) || defined(__USING_ASSP_REGISTER_API__) |
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library VariantTarget(kanaviengine,lib) |
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#endif |
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139 |