kernel/eka/memmodel/epoc/direct/arm/xinit.cpp
author Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
Tue, 31 Aug 2010 16:34:26 +0300
branchRCL_3
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parent 0 a41df078684a
child 44 3e88ff8f41d5
permissions -rw-r--r--
Revision: 201035 Kit: 201035
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// Copyright (c) 1996-2009 Nokia Corporation and/or its subsidiary(-ies).
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// All rights reserved.
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// This component and the accompanying materials are made available
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// under the terms of the License "Eclipse Public License v1.0"
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// which accompanies this distribution, and is available
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// at the URL "http://www.eclipse.org/legal/epl-v10.html".
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//
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// Initial Contributors:
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// Nokia Corporation - initial contribution.
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//
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// Contributors:
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//
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// Description:
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// e32\memmodel\epoc\direct\arm\xinit.cpp
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// 
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//
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#include "arm_mem.h"
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#include <e32uid.h>
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#include <kernel/cache.h>
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void MM::Init1()
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	{
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	__KTRACE_OPT(KBOOT,Kern::Printf("MM::Init1()"));
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	MM::RamBlockSize=0x1000;
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	MM::RamBlockShift=12;
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	PP::MaxUserThreadStack=0x14000;			// 80K - STDLIB asks for 64K for PosixServer!!!!
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	PP::UserThreadStackGuard=0x2000;		// 8K
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	PP::MaxStackSpacePerProcess=0x200000;	// 2Mb
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	K::SupervisorThreadStackSize=0x1000;	// 4K
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	PP::SupervisorThreadStackGuard=0x1000;	// 4K
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	K::MachineConfig=(TMachineConfig*)(((TUint8*)SuperPageAddress)+0x800);	// HACK!!
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	K::MaxMemCopyInOneGo = KDefaultMaxMemCopyInOneGo;
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	PP::RamDriveStartAddress = TheSuperPage().iKernelLimit;
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	PP::RamDriveMaxSize = TheRomHeader().iUserDataAddress - PP::RamDriveStartAddress;
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	__KTRACE_OPT(KBOOT,Kern::Printf("RamDriveBase %08x RamDriveMaxSize %08x",PP::RamDriveStartAddress,PP::RamDriveMaxSize));
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#ifdef __CPU_ARM_USE_DOMAINS
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	Arm::DefaultDomainAccess=Arm::Dacr();
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#endif
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	K::MemModelAttributes=EMemModelTypeDirect|EMemModelAttrNonExProt|EMemModelAttrKernProt|
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							EMemModelAttrWriteProt|EMemModelAttrSvKernProt;
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	__KTRACE_OPT(KBOOT,Kern::Printf("K::MaxMemCopyInOneGo=0x%x",K::MaxMemCopyInOneGo));
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	}
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#ifdef __CPU_HAS_CACHE
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// Set up virtual addresses used for cache flushing if this is
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// done by data read or line allocate
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void M::SetupCacheFlushPtr(TInt aCache, SCacheInfo& aInfo)
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	{
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#if defined(__CPU_CACHE_FLUSH_BY_DATA_READ) || defined(__CPU_CACHE_FLUSH_BY_LINE_ALLOC)
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#ifdef __CPU_HAS_ALT_D_CACHE
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	if (aCache==KCacheNumAltD)
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		{
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		aInfo.iFlushPtr=TheSuperPage().iAltDCacheFlushArea;
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		aInfo.iFlushMask=TheSuperPage().iAltDCacheFlushWrap;
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		}
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#endif
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	if (aCache==KCacheNumD)
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		{
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		aInfo.iFlushPtr=TheSuperPage().iDCacheFlushArea;
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		aInfo.iFlushMask=TheSuperPage().iDCacheFlushWrap;
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		}
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#endif
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	}
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#endif
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#ifdef __SMP__
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void M::GetAPBootInfo(TInt aCpu, volatile SAPBootInfo* aInfo)
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	{
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	volatile SArmAPBootInfo& info = *(volatile SArmAPBootInfo*)aInfo;
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	TSubScheduler& ss = SubScheduler();
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	TUint32 delta = aCpu*0x2000;
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	info.iInitR13Fiq = TLinAddr(ss.iSSX.iFiqStackTop) + delta;
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	info.iInitR13Irq = TLinAddr(ss.iSSX.iIrqStackTop) + delta;
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	info.iInitR13Abt = TLinAddr(ss.iSSX.iAbtStackTop) + delta;
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	info.iInitR13Und = TLinAddr(ss.iSSX.iUndStackTop) + delta;
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	}
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void M::Init2AP()
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	{
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	__KTRACE_OPT(KBOOT,Kern::Printf("M::Init2AP()"));
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	}
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#endif