equal
deleted
inserted
replaced
82 void M::Init3() |
82 void M::Init3() |
83 { |
83 { |
84 // Third phase MMU initialisation |
84 // Third phase MMU initialisation |
85 } |
85 } |
86 |
86 |
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87 void M::Init4() |
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88 { |
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89 // Fourth phase MMU initialisation - Not required on this memory model. |
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90 } |
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91 |
87 TInt M::InitSvHeapChunk(DChunk* aChunk, TInt aSize) |
92 TInt M::InitSvHeapChunk(DChunk* aChunk, TInt aSize) |
88 { |
93 { |
89 DMemModelChunk* pC=(DMemModelChunk*)aChunk; |
94 DMemModelChunk* pC=(DMemModelChunk*)aChunk; |
90 TLinAddr base = TheRomHeader().iKernDataAddress; |
95 TLinAddr base = TheRomHeader().iKernDataAddress; |
91 K::HeapInfo.iChunk = aChunk; |
96 K::HeapInfo.iChunk = aChunk; |