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1 // Copyright (c) 1996-2009 Nokia Corporation and/or its subsidiary(-ies). |
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2 // All rights reserved. |
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3 // This component and the accompanying materials are made available |
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4 // under the terms of the License "Eclipse Public License v1.0" |
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5 // which accompanies this distribution, and is available |
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6 // at the URL "http://www.eclipse.org/legal/epl-v10.html". |
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7 // |
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8 // Initial Contributors: |
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9 // Nokia Corporation - initial contribution. |
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10 // |
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11 // Contributors: |
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12 // |
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13 // Description: |
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14 // e32\memmodel\epoc\direct\minit.cpp |
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15 // |
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16 // |
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17 |
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18 #include <memmodel.h> |
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19 #include "cache_maintenance.h" |
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20 |
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21 _LIT(KLitRamAlloc,"RamAlloc"); |
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22 |
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23 const TInt KMaxSupervisorStackSpace=0x200000; |
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24 |
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25 void M::Init1() |
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26 { |
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27 __KTRACE_OPT2(KBOOT,KMMU,Kern::Printf("M::Init1")); |
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28 MM::UserDataSectionBase=TheRomHeader().iUserDataAddress; |
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29 MM::UserRomDataSectionEnd=TheRomHeader().iUserDataAddress+TheRomHeader().iTotalUserDataSize; |
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30 MM::UserDataSectionEnd = TheSuperPage().iRamBase + TheSuperPage().iTotalRamSize; |
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31 |
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32 __KTRACE_OPT2(KBOOT,KMMU,Kern::Printf("MM::UserDataSectionBase=%08x",MM::UserDataSectionBase)); |
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33 __KTRACE_OPT2(KBOOT,KMMU,Kern::Printf("MM::UserRomDataSectionEnd=%08x",MM::UserRomDataSectionEnd)); |
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34 __KTRACE_OPT2(KBOOT,KMMU,Kern::Printf("MM::UserDataSectionEnd=%08x",MM::UserDataSectionEnd)); |
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35 |
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36 // Memory model dependent CPU stuff |
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37 MM::Init1(); |
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38 |
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39 // Set up cache info |
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40 CacheMaintenance::Init1(); |
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41 } |
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42 |
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43 void M::Init2() |
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44 { |
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45 __KTRACE_OPT2(KBOOT,KMMU,Kern::Printf("M::Init2")); |
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46 TInt userRam=MM::UserDataSectionEnd-MM::UserDataSectionBase; |
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47 TInt blocks=userRam>>MM::RamBlockShift; |
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48 MM::RamAllocator=TBitMapAllocator::New(blocks,ETrue); |
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49 if (!MM::RamAllocator) |
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50 MM::Panic(MM::ERamAllocCreateFailed); |
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51 TInt used_blocks=(MM::UserRomDataSectionEnd-MM::UserDataSectionBase)>>MM::RamBlockShift; |
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52 if (used_blocks) |
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53 MM::RamAllocator->Alloc(0,used_blocks); |
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54 __KTRACE_OPT(KBOOT,Kern::Printf("%d blocks, %d used",blocks,used_blocks)); |
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55 TInt r=K::MutexCreate((DMutex*&)MM::RamAllocatorMutex, KLitRamAlloc, NULL, EFalse, KMutexOrdRamAlloc); |
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56 if (r!=KErrNone) |
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57 MM::Panic(MM::ERamAllocMutexCreateFailed); |
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58 const SRamBank* banks = (const SRamBank*)TheSuperPage().iRamBootData; |
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59 TInt nBanks = 0; |
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60 TInt maxBankBlocks = 0; |
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61 TInt bnum = 0; |
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62 const SRamBank* pB = banks; |
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63 for (; pB->iSize; ++nBanks, ++pB) |
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64 { |
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65 TInt nblocks = pB->iSize >> MM::RamBlockShift; |
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66 TInt abnum = bnum &~ 31; |
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67 TInt a_end = (bnum + nblocks + 31)&~31; |
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68 TInt a_count = a_end - abnum; |
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69 if (a_count > maxBankBlocks) |
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70 maxBankBlocks = a_count; |
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71 bnum += (pB->iSize >> MM::RamBlockShift); |
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72 } |
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73 __KTRACE_OPT(KBOOT,Kern::Printf("%d banks, max bank blocks %08x", nBanks, maxBankBlocks)); |
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74 if (nBanks>1) |
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75 { |
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76 MM::SecondaryAllocator = TBitMapAllocator::New(maxBankBlocks, ETrue); |
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77 if (!MM::SecondaryAllocator) |
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78 MM::Panic(MM::ESecAllocCreateFailed); |
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79 } |
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80 } |
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81 |
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82 void M::Init3() |
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83 { |
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84 // Third phase MMU initialisation |
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85 } |
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86 |
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87 TInt M::InitSvHeapChunk(DChunk* aChunk, TInt aSize) |
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88 { |
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89 DMemModelChunk* pC=(DMemModelChunk*)aChunk; |
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90 TLinAddr base = TheRomHeader().iKernDataAddress; |
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91 K::HeapInfo.iChunk = aChunk; |
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92 K::HeapInfo.iBase = (TUint8*)base; |
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93 K::HeapInfo.iMaxSize = pC->MaxSize(); |
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94 pC->SetFixedAddress(base, aSize); |
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95 __KTRACE_OPT(KBOOT,Kern::Printf("Created SvHeap chunk, addr %08X, init size %08X max size %08X",pC->Base(),aSize,pC->MaxSize())); |
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96 return KErrNone; |
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97 } |
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98 |
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99 TInt M::InitSvStackChunk() |
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100 { |
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101 return KErrNone; |
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102 } |
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103 |