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<concept id="GUID-4C5DB74E-41A5-53CB-A053-CBBEADD31AFF" xml:lang="en"><title>Architecture</title><shortdesc>Describes the architecture of the DMA Framework.</shortdesc><prolog><metadata><keywords/></metadata></prolog><conbody>

<p>The following diagram shows the main parts of the architecture: </p>

<fig id="GUID-E25AE30D-8EC9-530F-BD3C-FF4D6E5B9049">

<image href="GUID-AC7830F9-C3FB-5117-B851-1D106AE400D4_d0e367685_href.png" placement="inline"/>

</fig>

<p>The DMA Framework is implemented as a single DLL, which is split into two

layers: </p>

<ul>

<li id="GUID-FE402AA7-2E91-56F2-9424-7ADCB30E5D43"><p>a platform independent

layer that implements the behaviour that is common to all hardware </p> </li>

<li id="GUID-3EB73B07-D1BF-5D05-957D-6DB8A3F3D4F2"><p>a platform specific

layer that implements the behaviour that is specific to a particular platform. </p> </li>

</ul>

<p>The DLL is called <filepath>dma.dll</filepath>, and is implemented as a

kernel extension, which means that it is loaded very early during system initialisation. </p>

<p>The platform specific layer interfaces to the DMA controller hardware via

the I/O port constants and functions exposed by the ASSP DLL and/or Variant

DLL. </p>

<p>The clients of the DMA Framework are physical device drivers (PDD). </p>

</conbody></concept>