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<concept id="GUID-629EAA30-ED77-4CA9-91ED-36C818D7B4F4" xml:lang="en"><title>SMP Quick

Start</title><shortdesc>Provides summary of documents to make SMP-safe applications.</shortdesc><prolog><metadata><keywords/></metadata></prolog><conbody>

<section id="GUID-DA96C23B-D7B6-480A-96EB-377898DAB402"> <title>Getting started

with SMP</title> <p> The SMP introduction topics provide the basic concepts

of threads, interrupt handling, locks and memory barriers in an SMP environment. </p><ul>

<li><p><xref href="GUID-CE72E71B-6ED3-4961-B4C5-C43D823ACA9D.dita">Introduction

to SMP</xref> </p>    </li>

</ul><p>The SMP porting guide describes how to port an application running

on single core device to multi-core device.</p><ul>

<li><p><xref href="GUID-F44ED3DD-F74F-4C79-8E56-1CBBCCA90C91.dita">SMP - Porting

Guide</xref></p></li>

</ul><p>The common error pattern topics describes the solutions to the problems

that occur when porting an application from single core architecture to multiple

core architecture.</p><ul>

<li><p><xref href="GUID-93C75E31-6155-48F1-B99C-92ECD0B2C067.dita">SMP - Common

Error Patterns</xref></p></li>

</ul></section>

<section id="GUID-C0E92C6D-A788-404F-98CB-2D805A179B8D"> <title>Architecture</title><p>The

following illustration is an example of multiprocessor architecture with four

CPUs connected to a shared memory. </p><fig id="GUID-932ACAC3-B997-4219-AFE0-59C4CCC4BE01">

<title>SMP architecture example</title>

<image href="GUID-85A84BAA-4FA2-4A26-A8B1-57018D8838C3_d0e638314_href.jpg" placement="inline"/>

</fig></section>

<section id="GUID-5B1EE6CA-285F-48F3-B719-F6542F090E9B"> <title>Technologies</title><p>SMP

is a microprocessor architecture with two or more processors. The processors

are connected to a single shared memory. A single instance of Symbian platform

runs on the available cores and allocates the threads to different CPUs. </p></section>