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Adaptation/GUID-654A788A-526A-4C3F-838C-05B09F0D5445.dita
changeset 15 307f4279f433 
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+++ b/Adaptation/GUID-654A788A-526A-4C3F-838C-05B09F0D5445.dita	Fri Oct 15 14:32:18 2010 +0100
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+<?xml version="1.0" encoding="utf-8"?>
+<!-- Copyright (c) 2007-2010 Nokia Corporation and/or its subsidiary(-ies) All rights reserved. -->
+<!-- This component and the accompanying materials are made available under the terms of the License 
+"Eclipse Public License v1.0" which accompanies this distribution, 
+and is available at the URL "http://www.eclipse.org/legal/epl-v10.html". -->
+<!-- Initial Contributors:
+    Nokia Corporation - initial contribution.
+Contributors: 
+-->
+<!DOCTYPE concept
+  PUBLIC "-//OASIS//DTD DITA Concept//EN" "concept.dtd">
+<concept id="GUID-654A788A-526A-4C3F-838C-05B09F0D5445" xml:lang="en"><title>Interrupt Technology Guide</title><shortdesc>Describes the concepts of the Interrupts platform service.</shortdesc><prolog><metadata><keywords/></metadata></prolog><conbody>
+<p>The Interrupt platform service provides an interface to the kernel
+and device drivers to associate interrupt with an Interrupt Service
+Routine (ISR). There are three levels of interrupt management: <ol>
+<li id="GUID-74C645F7-29BE-452F-97DB-1D32134FB553"><p>CPU level: Control
+of interrupts available only to the kernel.</p></li>
+<li id="GUID-999F3089-0CF3-4C28-8547-0DCFD634F8B8"><p>Controller level:
+Control provided by functions of the <codeph>Interrupt</codeph> class.</p></li>
+<li id="GUID-47E985FB-1990-4FD8-A1B2-752A58A799A3"><p>Device level:
+Control of hardware sources that are managed by a device specific
+control scheme.</p></li>
+</ol></p>
+<section id="GUID-F80CF14A-3CB2-41B1-A3BD-DBD116FDBA8C-GENID-1-2-1-10-1-5-1-7-1-1-6-1-3-2">         
+   <title>Key concepts</title><dl>
+<dlentry>
+<dt>Interrupt</dt>
+<dd><p>An interrupt is a hardware or a software event that may need
+to be serviced. An example of a hardware interrupt is a key press
+.</p></dd>
+</dlentry>
+<dlentry>
+<dt>Interrupt ID</dt>
+<dd><p>The unique ID of an interrupt source. The interrupt ID are
+defined by the developers creating ASSP and variant.</p></dd>
+</dlentry>
+<dlentry>
+<dt>Spurious interrupts</dt>
+<dd><p>Interrupts not associated with an Interrupt Service Routine
+are called the spurious interrupts. The spurious interrupts are handled
+by a spurious interrupt handler which is only used for debugging.</p></dd>
+</dlentry>
+<dlentry>
+<dt>ISR</dt>
+<dd><p>An Interrupt Service Routine (ISR ) is the function to handle
+an interrupt. ISR is not a class member. ISR provides the minimum
+processing such as storing data that may not be available later and
+requests a DFC for further processing.</p></dd>
+</dlentry>
+<dlentry>
+<dt>Interrupt priority</dt>
+<dd><p>The Interrupt platform service allows developers to set a priority
+for each interrupt source. The meaning of the priority value depends
+on the hardware and the baseport implementation.</p></dd>
+</dlentry>
+<dlentry>
+<dt>Interrupt dispatch</dt>
+<dd><p>When an interrupt is received by the system, it calls the associated
+ISR. This is called interrupt dispatch. The interrupt dispatch is
+provided by the implementation of the <codeph>interrupt</codeph> class
+in the ASSP layer.</p></dd>
+</dlentry>
+<dlentry>
+<dt>ISR table</dt>
+<dd><p>The table that maps the interrupt ID and the associated ISR.
+The ISR table is implemented by the developers creating the baseport
+variant.</p></dd>
+</dlentry>
+<dlentry>
+<dt>Binding</dt>
+<dd><p>The process of associating an interrupt ID with an ISR. Unbinding
+removes the association.</p></dd>
+</dlentry>
+<dlentry>
+<dt>Chained interrupts</dt>
+<dd><p>The output of a low priority interrupt controller is provided
+as an input to a higher priority interrupt controller.</p></dd>
+</dlentry>
+</dl><dl>
+<dlentry>
+<dt>Pseudo-interrupts</dt>
+<dd><p>Pseudo-interrupts correspond to multiple interrupt sources
+sharing a single input to an interrupt controller but requiring separate
+ISRs to service them. The ISRs cannot all be bound to the single real
+interrupt and are therefore bound to the pseudo-interrupt instead.</p></dd>
+</dlentry>
+</dl><dl>
+<dlentry>
+<dt>IRQs and FIQs</dt>
+<dd><p>An IRQ (interrupt request) is the signal generated by an item
+of hardware or software to request an interrupt from the processor.
+An FIQ (fast IRQ) is an IRQ with high priority on systems
+which support prioritization of requests.</p></dd>
+</dlentry>
+</dl>                     </section>
+<section id="GUID-02A23FEF-2E96-4DC7-9AFB-D836B019C37B"><title>Typical
+uses</title><p>The Interrupt platform service allows the kernel and
+device drivers to :</p><ul>
+<li><p>associate an ISR with an interrupt ID</p></li>
+<li><p>enable/disable a specific interrupt</p></li>
+<li><p>clear pending actions on a specific interrupt</p></li>
+<li><p>change the priority of a specific interrupt.</p></li>
+</ul></section>
+</conbody><related-links>
+<link href="GUID-2E54DA7D-1094-41C6-AFB0-9999471991F8.dita"><linktext>Interrupt
+Implementation Guide</linktext></link>
+<link href="GUID-68446E8E-129C-444A-836A-EF8F56BFE0BC.dita"><linktext>Handling
+Interrupts</linktext></link>
+</related-links></concept>
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