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138 .\" ====================================================================== |
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139 .\" |
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140 .IX Title "GCC 1" |
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141 .TH GCC 1 "gcc-3.4.5" "2006-01-18" "GNU" |
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142 .UC |
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143 .SH "NAME" |
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144 gcc \- \s-1GNU\s0 project C and \*(C+ compiler |
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145 .SH "SYNOPSIS" |
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146 .IX Header "SYNOPSIS" |
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147 gcc [\fB\-c\fR|\fB\-S\fR|\fB\-E\fR] [\fB\-std=\fR\fIstandard\fR] |
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148 [\fB\-g\fR] [\fB\-pg\fR] [\fB\-O\fR\fIlevel\fR] |
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149 [\fB\-W\fR\fIwarn\fR...] [\fB\-pedantic\fR] |
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150 [\fB\-I\fR\fIdir\fR...] [\fB\-L\fR\fIdir\fR...] |
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151 [\fB\-D\fR\fImacro\fR[=\fIdefn\fR]...] [\fB\-U\fR\fImacro\fR] |
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152 [\fB\-f\fR\fIoption\fR...] [\fB\-m\fR\fImachine-option\fR...] |
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153 [\fB\-o\fR \fIoutfile\fR] \fIinfile\fR... |
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154 .PP |
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155 Only the most useful options are listed here; see below for the |
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156 remainder. \fBg++\fR accepts mostly the same options as \fBgcc\fR. |
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157 .SH "DESCRIPTION" |
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158 .IX Header "DESCRIPTION" |
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159 When you invoke \s-1GCC\s0, it normally does preprocessing, compilation, |
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160 assembly and linking. The ``overall options'' allow you to stop this |
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161 process at an intermediate stage. For example, the \fB\-c\fR option |
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162 says not to run the linker. Then the output consists of object files |
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163 output by the assembler. |
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164 .PP |
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165 Other options are passed on to one stage of processing. Some options |
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166 control the preprocessor and others the compiler itself. Yet other |
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167 options control the assembler and linker; most of these are not |
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168 documented here, since you rarely need to use any of them. |
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169 .PP |
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170 Most of the command line options that you can use with \s-1GCC\s0 are useful |
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171 for C programs; when an option is only useful with another language |
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172 (usually \*(C+), the explanation says so explicitly. If the description |
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173 for a particular option does not mention a source language, you can use |
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174 that option with all supported languages. |
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175 .PP |
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176 The \fBgcc\fR program accepts options and file names as operands. Many |
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177 options have multi-letter names; therefore multiple single-letter options |
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178 may \fInot\fR be grouped: \fB\-dr\fR is very different from \fB\-d\ \-r\fR. |
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179 .PP |
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180 You can mix options and other arguments. For the most part, the order |
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181 you use doesn't matter. Order does matter when you use several options |
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182 of the same kind; for example, if you specify \fB\-L\fR more than once, |
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183 the directories are searched in the order specified. |
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184 .PP |
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185 Many options have long names starting with \fB\-f\fR or with |
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186 \&\fB\-W\fR\-\-\-for example, \fB\-fforce-mem\fR, |
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187 \&\fB\-fstrength-reduce\fR, \fB\-Wformat\fR and so on. Most of |
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188 these have both positive and negative forms; the negative form of |
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189 \&\fB\-ffoo\fR would be \fB\-fno-foo\fR. This manual documents |
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190 only one of these two forms, whichever one is not the default. |
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191 .SH "OPTIONS" |
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192 .IX Header "OPTIONS" |
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193 .Sh "Option Summary" |
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194 .IX Subsection "Option Summary" |
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195 Here is a summary of all the options, grouped by type. Explanations are |
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196 in the following sections. |
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197 .Ip "\fIOverall Options\fR" 4 |
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198 .IX Item "Overall Options" |
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199 \&\fB\-c \-S \-E \-o\fR \fIfile\fR \fB\-pipe \-pass-exit-codes |
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200 \&\-x\fR \fIlanguage\fR \fB\-v \-### \-\-help \-\-target-help \-\-version\fR |
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201 .Ip "\fIC Language Options\fR" 4 |
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202 .IX Item "C Language Options" |
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203 \&\fB\-ansi \-std=\fR\fIstandard\fR \fB\-aux-info\fR \fIfilename\fR |
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204 \&\fB\-fno-asm \-fno-builtin \-fno-builtin-\fR\fIfunction\fR |
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205 \&\fB\-fhosted \-ffreestanding \-fms-extensions |
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206 \&\-trigraphs \-no-integrated-cpp \-traditional \-traditional-cpp |
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207 \&\-fallow-single-precision \-fcond-mismatch |
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208 \&\-fsigned-bitfields \-fsigned-char |
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209 \&\-funsigned-bitfields \-funsigned-char |
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210 \&\-fwritable-strings\fR |
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211 .Ip "\fI\*(C+ Language Options\fR" 4 |
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212 .IX Item " Language Options" |
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213 \&\fB\-fabi-version=\fR\fIn\fR \fB\-fno-access-control \-fcheck-new |
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214 \&\-fconserve-space \-fno-const-strings |
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215 \&\-fno-elide-constructors |
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216 \&\-fno-enforce-eh-specs |
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217 \&\-ffor-scope \-fno-for-scope \-fno-gnu-keywords |
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218 \&\-fno-implicit-templates |
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219 \&\-fno-implicit-inline-templates |
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220 \&\-fno-implement-inlines \-fms-extensions |
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221 \&\-fno-nonansi-builtins \-fno-operator-names |
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222 \&\-fno-optional-diags \-fpermissive |
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223 \&\-frepo \-fno-rtti \-fstats \-ftemplate-depth-\fR\fIn\fR |
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224 \&\fB\-fuse-cxa-atexit \-fno-weak \-nostdinc++ |
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225 \&\-fno-default-inline \-Wabi \-Wctor-dtor-privacy |
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226 \&\-Wnon-virtual-dtor \-Wreorder |
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227 \&\-Weffc++ \-Wno-deprecated |
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228 \&\-Wno-non-template-friend \-Wold-style-cast |
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229 \&\-Woverloaded-virtual \-Wno-pmf-conversions |
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230 \&\-Wsign-promo\fR |
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231 .Ip "\fIObjective-C Language Options\fR" 4 |
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232 .IX Item "Objective-C Language Options" |
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233 \&\fB\-fconstant-string-class=\fR\fIclass-name\fR |
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234 \&\fB\-fgnu-runtime \-fnext-runtime |
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235 \&\-fno-nil-receivers |
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236 \&\-fobjc-exceptions |
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237 \&\-freplace-objc-classes |
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238 \&\-fzero-link |
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239 \&\-gen-decls |
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240 \&\-Wno-protocol \-Wselector \-Wundeclared-selector\fR |
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241 .Ip "\fILanguage Independent Options\fR" 4 |
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242 .IX Item "Language Independent Options" |
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243 \&\fB\-fmessage-length=\fR\fIn\fR |
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244 \&\fB\-fdiagnostics-show-location=\fR[\fBonce\fR|\fBevery-line\fR] |
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245 .Ip "\fIWarning Options\fR" 4 |
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246 .IX Item "Warning Options" |
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247 \&\fB\-fsyntax-only \-pedantic \-pedantic-errors |
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248 \&\-w \-Wextra \-Wall \-Waggregate-return |
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249 \&\-Wcast-align \-Wcast-qual \-Wchar-subscripts \-Wcomment |
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250 \&\-Wconversion \-Wno-deprecated-declarations |
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251 \&\-Wdisabled-optimization \-Wno-div-by-zero \-Wendif-labels |
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252 \&\-Werror \-Werror-implicit-function-declaration |
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253 \&\-Wfloat-equal \-Wformat \-Wformat=2 |
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254 \&\-Wno-format-extra-args \-Wformat-nonliteral |
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255 \&\-Wformat-security \-Wformat-y2k |
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256 \&\-Wimplicit \-Wimplicit-function-declaration \-Wimplicit-int |
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257 \&\-Wimport \-Wno-import \-Winit-self \-Winline |
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258 \&\-Wno-invalid-offsetof \-Winvalid-pch |
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259 \&\-Wlarger-than-\fR\fIlen\fR \fB\-Wlong-long |
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260 \&\-Wmain \-Wmissing-braces |
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261 \&\-Wmissing-format-attribute \-Wmissing-noreturn |
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262 \&\-Wno-multichar \-Wnonnull \-Wpacked \-Wpadded |
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263 \&\-Wparentheses \-Wpointer-arith \-Wredundant-decls |
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264 \&\-Wreturn-type \-Wsequence-point \-Wshadow |
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265 \&\-Wsign-compare \-Wstrict-aliasing |
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266 \&\-Wswitch \-Wswitch-default \-Wswitch-enum |
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267 \&\-Wsystem-headers \-Wtrigraphs \-Wundef \-Wuninitialized |
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268 \&\-Wunknown-pragmas \-Wunreachable-code |
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269 \&\-Wunused \-Wunused-function \-Wunused-label \-Wunused-parameter |
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270 \&\-Wunused-value \-Wunused-variable \-Wwrite-strings\fR |
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271 .Ip "\fIC-only Warning Options\fR" 4 |
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272 .IX Item "C-only Warning Options" |
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273 \&\fB\-Wbad-function-cast \-Wmissing-declarations |
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274 \&\-Wmissing-prototypes \-Wnested-externs \-Wold-style-definition |
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275 \&\-Wstrict-prototypes \-Wtraditional |
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276 \&\-Wdeclaration-after-statement\fR |
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277 .Ip "\fIDebugging Options\fR" 4 |
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278 .IX Item "Debugging Options" |
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279 \&\fB\-d\fR\fIletters\fR \fB\-dumpspecs \-dumpmachine \-dumpversion |
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280 \&\-fdump-unnumbered \-fdump-translation-unit\fR[\fB-\fR\fIn\fR] |
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281 \&\fB\-fdump-class-hierarchy\fR[\fB-\fR\fIn\fR] |
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282 \&\fB\-fdump-tree-original\fR[\fB-\fR\fIn\fR] |
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283 \&\fB\-fdump-tree-optimized\fR[\fB-\fR\fIn\fR] |
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284 \&\fB\-fdump-tree-inlined\fR[\fB-\fR\fIn\fR] |
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285 \&\fB\-feliminate-dwarf2\-dups \-feliminate-unused-debug-types |
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286 \&\-feliminate-unused-debug-symbols \-fmem-report \-fprofile-arcs |
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287 \&\-frandom-seed=\fR\fIstring\fR \fB\-fsched-verbose=\fR\fIn\fR |
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288 \&\fB\-ftest-coverage \-ftime-report |
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289 \&\-g \-g\fR\fIlevel\fR \fB\-gcoff \-gdwarf-2 |
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290 \&\-ggdb \-gstabs \-gstabs+ \-gvms \-gxcoff \-gxcoff+ |
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291 \&\-p \-pg \-print-file-name=\fR\fIlibrary\fR \fB\-print-libgcc-file-name |
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292 \&\-print-multi-directory \-print-multi-lib |
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293 \&\-print-prog-name=\fR\fIprogram\fR \fB\-print-search-dirs \-Q |
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294 \&\-save-temps \-time\fR |
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295 .Ip "\fIOptimization Options\fR" 4 |
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296 .IX Item "Optimization Options" |
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297 \&\fB\-falign-functions=\fR\fIn\fR \fB\-falign-jumps=\fR\fIn\fR |
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298 \&\fB\-falign-labels=\fR\fIn\fR \fB\-falign-loops=\fR\fIn\fR |
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299 \&\fB\-fbranch-probabilities \-fprofile-values \-fvpt \-fbranch-target-load-optimize |
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300 \&\-fbranch-target-load-optimize2 \-fcaller-saves \-fcprop-registers |
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301 \&\-fcse-follow-jumps \-fcse-skip-blocks \-fdata-sections |
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302 \&\-fdelayed-branch \-fdelete-null-pointer-checks |
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303 \&\-fexpensive-optimizations \-ffast-math \-ffloat-store |
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304 \&\-fforce-addr \-fforce-mem \-ffunction-sections |
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305 \&\-fgcse \-fgcse-lm \-fgcse-sm \-fgcse-las \-floop-optimize |
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306 \&\-fcrossjumping \-fif-conversion \-fif-conversion2 |
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307 \&\-finline-functions \-finline-limit=\fR\fIn\fR \fB\-fkeep-inline-functions |
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308 \&\-fkeep-static-consts \-fmerge-constants \-fmerge-all-constants |
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309 \&\-fmove-all-movables \-fnew-ra \-fno-branch-count-reg |
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310 \&\-fno-default-inline \-fno-defer-pop |
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311 \&\-fno-function-cse \-fno-guess-branch-probability |
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312 \&\-fno-inline \-fno-math-errno \-fno-peephole \-fno-peephole2 |
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313 \&\-funsafe-math-optimizations \-ffinite-math-only |
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314 \&\-fno-trapping-math \-fno-zero-initialized-in-bss |
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315 \&\-fomit-frame-pointer \-foptimize-register-move |
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316 \&\-foptimize-sibling-calls \-fprefetch-loop-arrays |
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317 \&\-fprofile-generate \-fprofile-use |
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318 \&\-freduce-all-givs \-fregmove \-frename-registers |
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319 \&\-freorder-blocks \-freorder-functions |
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320 \&\-frerun-cse-after-loop \-frerun-loop-opt |
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321 \&\-frounding-math \-fschedule-insns \-fschedule-insns2 |
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322 \&\-fno-sched-interblock \-fno-sched-spec \-fsched-spec-load |
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323 \&\-fsched-spec-load-dangerous |
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324 \&\-fsched-stalled-insns=\fR\fIn\fR \fB\-sched-stalled-insns-dep=\fR\fIn\fR |
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325 \&\fB\-fsched2\-use-superblocks |
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326 \&\-fsched2\-use-traces \-fsignaling-nans |
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327 \&\-fsingle-precision-constant |
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328 \&\-fstrength-reduce \-fstrict-aliasing \-ftracer \-fthread-jumps |
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329 \&\-funroll-all-loops \-funroll-loops \-fpeel-loops |
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330 \&\-funswitch-loops \-fold-unroll-loops \-fold-unroll-all-loops |
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331 \&\-\-param\fR \fIname\fR\fB=\fR\fIvalue\fR |
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332 \&\fB\-O \-O0 \-O1 \-O2 \-O3 \-Os\fR |
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333 .Ip "\fIPreprocessor Options\fR" 4 |
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334 .IX Item "Preprocessor Options" |
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335 \&\fB\-A\fR\fIquestion\fR\fB=\fR\fIanswer\fR |
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336 \&\fB\-A-\fR\fIquestion\fR[\fB=\fR\fIanswer\fR] |
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337 \&\fB\-C \-dD \-dI \-dM \-dN |
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338 \&\-D\fR\fImacro\fR[\fB=\fR\fIdefn\fR] \fB\-E \-H |
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339 \&\-idirafter\fR \fIdir\fR |
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340 \&\fB\-include\fR \fIfile\fR \fB\-imacros\fR \fIfile\fR |
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341 \&\fB\-iprefix\fR \fIfile\fR \fB\-iwithprefix\fR \fIdir\fR |
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342 \&\fB\-iwithprefixbefore\fR \fIdir\fR \fB\-isystem\fR \fIdir\fR |
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343 \&\fB\-M \-MM \-MF \-MG \-MP \-MQ \-MT \-nostdinc |
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344 \&\-P \-fworking-directory \-remap |
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345 \&\-trigraphs \-undef \-U\fR\fImacro\fR \fB\-Wp,\fR\fIoption\fR |
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346 \&\fB\-Xpreprocessor\fR \fIoption\fR |
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347 .Ip "\fIAssembler Option\fR" 4 |
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348 .IX Item "Assembler Option" |
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349 \&\fB\-Wa,\fR\fIoption\fR \fB\-Xassembler\fR \fIoption\fR |
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350 .Ip "\fILinker Options\fR" 4 |
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351 .IX Item "Linker Options" |
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352 \&\fIobject-file-name\fR \fB\-l\fR\fIlibrary\fR |
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353 \&\fB\-nostartfiles \-nodefaultlibs \-nostdlib \-pie |
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354 \&\-s \-static \-static-libgcc \-shared \-shared-libgcc \-symbolic |
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355 \&\-Wl,\fR\fIoption\fR \fB\-Xlinker\fR \fIoption\fR |
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356 \&\fB\-u\fR \fIsymbol\fR |
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357 .Ip "\fIDirectory Options\fR" 4 |
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358 .IX Item "Directory Options" |
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359 \&\fB\-B\fR\fIprefix\fR \fB\-I\fR\fIdir\fR \fB\-I- \-L\fR\fIdir\fR \fB\-specs=\fR\fIfile\fR |
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360 .Ip "\fITarget Options\fR" 4 |
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361 .IX Item "Target Options" |
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362 \&\fB\-V\fR \fIversion\fR \fB\-b\fR \fImachine\fR |
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363 .Ip "\fIMachine Dependent Options\fR" 4 |
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364 .IX Item "Machine Dependent Options" |
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365 \&\fIM680x0 Options\fR |
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366 \&\fB\-m68000 \-m68020 \-m68020\-40 \-m68020\-60 \-m68030 \-m68040 |
|
367 \&\-m68060 \-mcpu32 \-m5200 \-m68881 \-mbitfield \-mc68000 \-mc68020 |
|
368 \&\-mnobitfield \-mrtd \-mshort \-msoft-float \-mpcrel |
|
369 \&\-malign-int \-mstrict-align \-msep-data \-mno-sep-data |
|
370 \&\-mshared-library-id=n \-mid-shared-library \-mno-id-shared-library\fR |
|
371 .Sp |
|
372 \&\fIM68hc1x Options\fR |
|
373 \&\fB\-m6811 \-m6812 \-m68hc11 \-m68hc12 \-m68hcs12 |
|
374 \&\-mauto-incdec \-minmax \-mlong-calls \-mshort |
|
375 \&\-msoft-reg-count=\fR\fIcount\fR |
|
376 .Sp |
|
377 \&\fI\s-1VAX\s0 Options\fR |
|
378 \&\fB\-mg \-mgnu \-munix\fR |
|
379 .Sp |
|
380 \&\fI\s-1SPARC\s0 Options\fR |
|
381 \&\fB\-mcpu=\fR\fIcpu-type\fR |
|
382 \&\fB\-mtune=\fR\fIcpu-type\fR |
|
383 \&\fB\-mcmodel=\fR\fIcode-model\fR |
|
384 \&\fB\-m32 \-m64 \-mapp-regs \-mno-app-regs |
|
385 \&\-mfaster-structs \-mno-faster-structs |
|
386 \&\-mflat \-mno-flat \-mfpu \-mno-fpu |
|
387 \&\-mhard-float \-msoft-float |
|
388 \&\-mhard-quad-float \-msoft-quad-float |
|
389 \&\-mimpure-text \-mno-impure-text \-mlittle-endian |
|
390 \&\-mstack-bias \-mno-stack-bias |
|
391 \&\-munaligned-doubles \-mno-unaligned-doubles |
|
392 \&\-mv8plus \-mno-v8plus \-mvis \-mno-vis |
|
393 \&\-mcypress \-mf930 \-mf934 |
|
394 \&\-msparclite \-msupersparc \-mv8 |
|
395 \&\-threads \-pthreads\fR |
|
396 .Sp |
|
397 \&\fI\s-1ARM\s0 Options\fR |
|
398 \&\fB\-mapcs-frame \-mno-apcs-frame |
|
399 \&\-mapcs-26 \-mapcs-32 |
|
400 \&\-mapcs-stack-check \-mno-apcs-stack-check |
|
401 \&\-mapcs-float \-mno-apcs-float |
|
402 \&\-mapcs-reentrant \-mno-apcs-reentrant |
|
403 \&\-msched-prolog \-mno-sched-prolog |
|
404 \&\-mlittle-endian \-mbig-endian \-mwords-little-endian |
|
405 \&\-malignment-traps \-mno-alignment-traps |
|
406 \&\-msoft-float \-mhard-float \-mfpe |
|
407 \&\-mthumb-interwork \-mno-thumb-interwork |
|
408 \&\-mcpu=\fR\fIname\fR \fB\-march=\fR\fIname\fR \fB\-mfpe=\fR\fIname\fR |
|
409 \&\fB\-mstructure-size-boundary=\fR\fIn\fR |
|
410 \&\fB\-mabort-on-noreturn |
|
411 \&\-mlong-calls \-mno-long-calls |
|
412 \&\-msingle-pic-base \-mno-single-pic-base |
|
413 \&\-mpic-register=\fR\fIreg\fR |
|
414 \&\fB\-mnop-fun-dllimport |
|
415 \&\-mcirrus-fix-invalid-insns \-mno-cirrus-fix-invalid-insns |
|
416 \&\-mpoke-function-name |
|
417 \&\-mthumb \-marm |
|
418 \&\-mtpcs-frame \-mtpcs-leaf-frame |
|
419 \&\-mcaller-super-interworking \-mcallee-super-interworking\fR |
|
420 .Sp |
|
421 \&\fI\s-1MN10300\s0 Options\fR |
|
422 \&\fB\-mmult-bug \-mno-mult-bug |
|
423 \&\-mam33 \-mno-am33 |
|
424 \&\-mam33\-2 \-mno-am33\-2 |
|
425 \&\-mno-crt0 \-mrelax\fR |
|
426 .Sp |
|
427 \&\fIM32R/D Options\fR |
|
428 \&\fB\-m32r2 \-m32rx \-m32r |
|
429 \&\-mdebug |
|
430 \&\-malign-loops \-mno-align-loops |
|
431 \&\-missue-rate=\fR\fInumber\fR |
|
432 \&\fB\-mbranch-cost=\fR\fInumber\fR |
|
433 \&\fB\-mmodel=\fR\fIcode-size-model-type\fR |
|
434 \&\fB\-msdata=\fR\fIsdata-type\fR |
|
435 \&\fB\-mno-flush-func \-mflush-func=\fR\fIname\fR |
|
436 \&\fB\-mno-flush-trap \-mflush-trap=\fR\fInumber\fR |
|
437 \&\fB\-G\fR \fInum\fR |
|
438 .Sp |
|
439 \&\fI\s-1RS/6000\s0 and PowerPC Options\fR |
|
440 \&\fB\-mcpu=\fR\fIcpu-type\fR |
|
441 \&\fB\-mtune=\fR\fIcpu-type\fR |
|
442 \&\fB\-mpower \-mno-power \-mpower2 \-mno-power2 |
|
443 \&\-mpowerpc \-mpowerpc64 \-mno-powerpc |
|
444 \&\-maltivec \-mno-altivec |
|
445 \&\-mpowerpc-gpopt \-mno-powerpc-gpopt |
|
446 \&\-mpowerpc-gfxopt \-mno-powerpc-gfxopt |
|
447 \&\-mnew-mnemonics \-mold-mnemonics |
|
448 \&\-mfull-toc \-mminimal-toc \-mno-fp-in-toc \-mno-sum-in-toc |
|
449 \&\-m64 \-m32 \-mxl-compat \-mno-xl-compat \-mpe |
|
450 \&\-malign-power \-malign-natural |
|
451 \&\-msoft-float \-mhard-float \-mmultiple \-mno-multiple |
|
452 \&\-mstring \-mno-string \-mupdate \-mno-update |
|
453 \&\-mfused-madd \-mno-fused-madd \-mbit-align \-mno-bit-align |
|
454 \&\-mstrict-align \-mno-strict-align \-mrelocatable |
|
455 \&\-mno-relocatable \-mrelocatable-lib \-mno-relocatable-lib |
|
456 \&\-mtoc \-mno-toc \-mlittle \-mlittle-endian \-mbig \-mbig-endian |
|
457 \&\-mdynamic-no-pic |
|
458 \&\-mprioritize-restricted-insns=\fR\fIpriority\fR |
|
459 \&\fB\-msched-costly-dep=\fR\fIdependence_type\fR |
|
460 \&\fB\-minsert-sched-nops=\fR\fIscheme\fR |
|
461 \&\fB\-mcall-sysv \-mcall-netbsd |
|
462 \&\-maix-struct-return \-msvr4\-struct-return |
|
463 \&\-mabi=altivec \-mabi=no-altivec |
|
464 \&\-mabi=spe \-mabi=no-spe |
|
465 \&\-misel=yes \-misel=no |
|
466 \&\-mspe=yes \-mspe=no |
|
467 \&\-mfloat-gprs=yes \-mfloat-gprs=no |
|
468 \&\-mprototype \-mno-prototype |
|
469 \&\-msim \-mmvme \-mads \-myellowknife \-memb \-msdata |
|
470 \&\-msdata=\fR\fIopt\fR \fB\-mvxworks \-mwindiss \-G\fR \fInum\fR \fB\-pthread\fR |
|
471 .Sp |
|
472 \&\fIDarwin Options\fR |
|
473 \&\fB\-all_load \-allowable_client \-arch \-arch_errors_fatal |
|
474 \&\-arch_only \-bind_at_load \-bundle \-bundle_loader |
|
475 \&\-client_name \-compatibility_version \-current_version |
|
476 \&\-dependency-file \-dylib_file \-dylinker_install_name |
|
477 \&\-dynamic \-dynamiclib \-exported_symbols_list |
|
478 \&\-filelist \-flat_namespace \-force_cpusubtype_ALL |
|
479 \&\-force_flat_namespace \-headerpad_max_install_names |
|
480 \&\-image_base \-init \-install_name \-keep_private_externs |
|
481 \&\-multi_module \-multiply_defined \-multiply_defined_unused |
|
482 \&\-noall_load \-nofixprebinding \-nomultidefs \-noprebind \-noseglinkedit |
|
483 \&\-pagezero_size \-prebind \-prebind_all_twolevel_modules |
|
484 \&\-private_bundle \-read_only_relocs \-sectalign |
|
485 \&\-sectobjectsymbols \-whyload \-seg1addr |
|
486 \&\-sectcreate \-sectobjectsymbols \-sectorder |
|
487 \&\-seg_addr_table \-seg_addr_table_filename \-seglinkedit |
|
488 \&\-segprot \-segs_read_only_addr \-segs_read_write_addr |
|
489 \&\-single_module \-static \-sub_library \-sub_umbrella |
|
490 \&\-twolevel_namespace \-umbrella \-undefined |
|
491 \&\-unexported_symbols_list \-weak_reference_mismatches |
|
492 \&\-whatsloaded\fR |
|
493 .Sp |
|
494 \&\fI\s-1MIPS\s0 Options\fR |
|
495 \&\fB\-EL \-EB \-march=\fR\fIarch\fR \fB\-mtune=\fR\fIarch\fR |
|
496 \&\fB\-mips1 \-mips2 \-mips3 \-mips4 \-mips32 \-mips32r2 \-mips64 |
|
497 \&\-mips16 \-mno-mips16 \-mabi=\fR\fIabi\fR \fB\-mabicalls \-mno-abicalls |
|
498 \&\-mxgot \-mno-xgot \-membedded-pic \-mno-embedded-pic |
|
499 \&\-mgp32 \-mgp64 \-mfp32 \-mfp64 \-mhard-float \-msoft-float |
|
500 \&\-msingle-float \-mdouble-float \-mint64 \-mlong64 \-mlong32 |
|
501 \&\-G\fR\fInum\fR \fB\-membedded-data \-mno-embedded-data |
|
502 \&\-muninit-const-in-rodata \-mno-uninit-const-in-rodata |
|
503 \&\-msplit-addresses \-mno-split-addresses |
|
504 \&\-mexplicit-relocs \-mno-explicit-relocs |
|
505 \&\-mrnames \-mno-rnames |
|
506 \&\-mcheck-zero-division \-mno-check-zero-division |
|
507 \&\-mmemcpy \-mno-memcpy \-mlong-calls \-mno-long-calls |
|
508 \&\-mmad \-mno-mad \-mfused-madd \-mno-fused-madd \-nocpp |
|
509 \&\-mfix-sb1 \-mno-fix-sb1 \-mflush-func=\fR\fIfunc\fR |
|
510 \&\fB\-mno-flush-func \-mbranch-likely \-mno-branch-likely\fR |
|
511 .Sp |
|
512 \&\fIi386 and x86\-64 Options\fR |
|
513 \&\fB\-mtune=\fR\fIcpu-type\fR \fB\-march=\fR\fIcpu-type\fR |
|
514 \&\fB\-mfpmath=\fR\fIunit\fR |
|
515 \&\fB\-masm=\fR\fIdialect\fR \fB\-mno-fancy-math-387 |
|
516 \&\-mno-fp-ret-in-387 \-msoft-float \-msvr3\-shlib |
|
517 \&\-mno-wide-multiply \-mrtd \-malign-double |
|
518 \&\-mpreferred-stack-boundary=\fR\fInum\fR |
|
519 \&\fB\-mmmx \-msse \-msse2 \-msse3 \-m3dnow |
|
520 \&\-mthreads \-mno-align-stringops \-minline-all-stringops |
|
521 \&\-mpush-args \-maccumulate-outgoing-args \-m128bit-long-double |
|
522 \&\-m96bit-long-double \-mregparm=\fR\fInum\fR \fB\-momit-leaf-frame-pointer |
|
523 \&\-mno-red-zone \-mno-tls-direct-seg-refs |
|
524 \&\-mcmodel=\fR\fIcode-model\fR |
|
525 \&\fB\-m32 \-m64 \-mstack-arg-probe\fR |
|
526 .Sp |
|
527 \&\fI\s-1HPPA\s0 Options\fR |
|
528 \&\fB\-march=\fR\fIarchitecture-type\fR |
|
529 \&\fB\-mbig-switch \-mdisable-fpregs \-mdisable-indexing |
|
530 \&\-mfast-indirect-calls \-mgas \-mgnu-ld \-mhp-ld |
|
531 \&\-mjump-in-delay \-mlinker-opt \-mlong-calls |
|
532 \&\-mlong-load-store \-mno-big-switch \-mno-disable-fpregs |
|
533 \&\-mno-disable-indexing \-mno-fast-indirect-calls \-mno-gas |
|
534 \&\-mno-jump-in-delay \-mno-long-load-store |
|
535 \&\-mno-portable-runtime \-mno-soft-float |
|
536 \&\-mno-space-regs \-msoft-float \-mpa-risc-1\-0 |
|
537 \&\-mpa-risc-1\-1 \-mpa-risc-2\-0 \-mportable-runtime |
|
538 \&\-mschedule=\fR\fIcpu-type\fR \fB\-mspace-regs \-msio \-mwsio |
|
539 \&\-nolibdld \-static \-threads\fR |
|
540 .Sp |
|
541 \&\fIIntel 960 Options\fR |
|
542 \&\fB\-m\fR\fIcpu-type\fR \fB\-masm-compat \-mclean-linkage |
|
543 \&\-mcode-align \-mcomplex-addr \-mleaf-procedures |
|
544 \&\-mic-compat \-mic2.0\-compat \-mic3.0\-compat |
|
545 \&\-mintel-asm \-mno-clean-linkage \-mno-code-align |
|
546 \&\-mno-complex-addr \-mno-leaf-procedures |
|
547 \&\-mno-old-align \-mno-strict-align \-mno-tail-call |
|
548 \&\-mnumerics \-mold-align \-msoft-float \-mstrict-align |
|
549 \&\-mtail-call\fR |
|
550 .Sp |
|
551 \&\fI\s-1DEC\s0 Alpha Options\fR |
|
552 \&\fB\-mno-fp-regs \-msoft-float \-malpha-as \-mgas |
|
553 \&\-mieee \-mieee-with-inexact \-mieee-conformant |
|
554 \&\-mfp-trap-mode=\fR\fImode\fR \fB\-mfp-rounding-mode=\fR\fImode\fR |
|
555 \&\fB\-mtrap-precision=\fR\fImode\fR \fB\-mbuild-constants |
|
556 \&\-mcpu=\fR\fIcpu-type\fR \fB\-mtune=\fR\fIcpu-type\fR |
|
557 \&\fB\-mbwx \-mmax \-mfix \-mcix |
|
558 \&\-mfloat-vax \-mfloat-ieee |
|
559 \&\-mexplicit-relocs \-msmall-data \-mlarge-data |
|
560 \&\-msmall-text \-mlarge-text |
|
561 \&\-mmemory-latency=\fR\fItime\fR |
|
562 .Sp |
|
563 \&\fI\s-1DEC\s0 Alpha/VMS Options\fR |
|
564 \&\fB\-mvms-return-codes\fR |
|
565 .Sp |
|
566 \&\fIH8/300 Options\fR |
|
567 \&\fB\-mrelax \-mh \-ms \-mn \-mint32 \-malign-300\fR |
|
568 .Sp |
|
569 \&\fI\s-1SH\s0 Options\fR |
|
570 \&\fB\-m1 \-m2 \-m2e \-m3 \-m3e |
|
571 \&\-m4\-nofpu \-m4\-single-only \-m4\-single \-m4 |
|
572 \&\-m5\-64media \-m5\-64media-nofpu |
|
573 \&\-m5\-32media \-m5\-32media-nofpu |
|
574 \&\-m5\-compact \-m5\-compact-nofpu |
|
575 \&\-mb \-ml \-mdalign \-mrelax |
|
576 \&\-mbigtable \-mfmovd \-mhitachi \-mnomacsave |
|
577 \&\-mieee \-misize \-mpadstruct \-mspace |
|
578 \&\-mprefergot \-musermode\fR |
|
579 .Sp |
|
580 \&\fISystem V Options\fR |
|
581 \&\fB\-Qy \-Qn \-YP,\fR\fIpaths\fR \fB\-Ym,\fR\fIdir\fR |
|
582 .Sp |
|
583 \&\fI\s-1ARC\s0 Options\fR |
|
584 \&\fB\-EB \-EL |
|
585 \&\-mmangle-cpu \-mcpu=\fR\fIcpu\fR \fB\-mtext=\fR\fItext-section\fR |
|
586 \&\fB\-mdata=\fR\fIdata-section\fR \fB\-mrodata=\fR\fIreadonly-data-section\fR |
|
587 .Sp |
|
588 \&\fITMS320C3x/C4x Options\fR |
|
589 \&\fB\-mcpu=\fR\fIcpu\fR \fB\-mbig \-msmall \-mregparm \-mmemparm |
|
590 \&\-mfast-fix \-mmpyi \-mbk \-mti \-mdp-isr-reload |
|
591 \&\-mrpts=\fR\fIcount\fR \fB\-mrptb \-mdb \-mloop-unsigned |
|
592 \&\-mparallel-insns \-mparallel-mpy \-mpreserve-float\fR |
|
593 .Sp |
|
594 \&\fIV850 Options\fR |
|
595 \&\fB\-mlong-calls \-mno-long-calls \-mep \-mno-ep |
|
596 \&\-mprolog-function \-mno-prolog-function \-mspace |
|
597 \&\-mtda=\fR\fIn\fR \fB\-msda=\fR\fIn\fR \fB\-mzda=\fR\fIn\fR |
|
598 \&\fB\-mapp-regs \-mno-app-regs |
|
599 \&\-mdisable-callt \-mno-disable-callt |
|
600 \&\-mv850e1 |
|
601 \&\-mv850e |
|
602 \&\-mv850 \-mbig-switch\fR |
|
603 .Sp |
|
604 \&\fI\s-1NS32K\s0 Options\fR |
|
605 \&\fB\-m32032 \-m32332 \-m32532 \-m32081 \-m32381 |
|
606 \&\-mmult-add \-mnomult-add \-msoft-float \-mrtd \-mnortd |
|
607 \&\-mregparam \-mnoregparam \-msb \-mnosb |
|
608 \&\-mbitfield \-mnobitfield \-mhimem \-mnohimem\fR |
|
609 .Sp |
|
610 \&\fI\s-1AVR\s0 Options\fR |
|
611 \&\fB\-mmcu=\fR\fImcu\fR \fB\-msize \-minit-stack=\fR\fIn\fR \fB\-mno-interrupts |
|
612 \&\-mcall-prologues \-mno-tablejump \-mtiny-stack\fR |
|
613 .Sp |
|
614 \&\fIMCore Options\fR |
|
615 \&\fB\-mhardlit \-mno-hardlit \-mdiv \-mno-div \-mrelax-immediates |
|
616 \&\-mno-relax-immediates \-mwide-bitfields \-mno-wide-bitfields |
|
617 \&\-m4byte-functions \-mno-4byte-functions \-mcallgraph-data |
|
618 \&\-mno-callgraph-data \-mslow-bytes \-mno-slow-bytes \-mno-lsim |
|
619 \&\-mlittle-endian \-mbig-endian \-m210 \-m340 \-mstack-increment\fR |
|
620 .Sp |
|
621 \&\fI\s-1MMIX\s0 Options\fR |
|
622 \&\fB\-mlibfuncs \-mno-libfuncs \-mepsilon \-mno-epsilon \-mabi=gnu |
|
623 \&\-mabi=mmixware \-mzero-extend \-mknuthdiv \-mtoplevel-symbols |
|
624 \&\-melf \-mbranch-predict \-mno-branch-predict \-mbase-addresses |
|
625 \&\-mno-base-addresses \-msingle-exit \-mno-single-exit\fR |
|
626 .Sp |
|
627 \&\fI\s-1IA-64\s0 Options\fR |
|
628 \&\fB\-mbig-endian \-mlittle-endian \-mgnu-as \-mgnu-ld \-mno-pic |
|
629 \&\-mvolatile-asm-stop \-mb-step \-mregister-names \-mno-sdata |
|
630 \&\-mconstant-gp \-mauto-pic \-minline-float-divide-min-latency |
|
631 \&\-minline-float-divide-max-throughput |
|
632 \&\-minline-int-divide-min-latency |
|
633 \&\-minline-int-divide-max-throughput |
|
634 \&\-minline-sqrt-min-latency \-minline-sqrt-max-throughput |
|
635 \&\-mno-dwarf2\-asm \-mearly-stop-bits |
|
636 \&\-mfixed-range=\fR\fIregister-range\fR \fB\-mtls-size=\fR\fItls-size\fR |
|
637 \&\fB\-mtune=\fR\fIcpu-type\fR \fB\-mt \-pthread \-milp32 \-mlp64\fR |
|
638 .Sp |
|
639 \&\fID30V Options\fR |
|
640 \&\fB\-mextmem \-mextmemory \-monchip \-mno-asm-optimize |
|
641 \&\-masm-optimize \-mbranch-cost=\fR\fIn\fR \fB\-mcond-exec=\fR\fIn\fR |
|
642 .Sp |
|
643 \&\fIS/390 and zSeries Options\fR |
|
644 \&\fB\-mtune=\fR\fIcpu-type\fR \fB\-march=\fR\fIcpu-type\fR |
|
645 \&\fB\-mhard-float \-msoft-float \-mbackchain \-mno-backchain |
|
646 \&\-msmall-exec \-mno-small-exec \-mmvcle \-mno-mvcle |
|
647 \&\-m64 \-m31 \-mdebug \-mno-debug \-mesa \-mzarch \-mfused-madd \-mno-fused-madd\fR |
|
648 .Sp |
|
649 \&\fI\s-1CRIS\s0 Options\fR |
|
650 \&\fB\-mcpu=\fR\fIcpu\fR \fB\-march=\fR\fIcpu\fR \fB\-mtune=\fR\fIcpu\fR |
|
651 \&\fB\-mmax-stack-frame=\fR\fIn\fR \fB\-melinux-stacksize=\fR\fIn\fR |
|
652 \&\fB\-metrax4 \-metrax100 \-mpdebug \-mcc-init \-mno-side-effects |
|
653 \&\-mstack-align \-mdata-align \-mconst-align |
|
654 \&\-m32\-bit \-m16\-bit \-m8\-bit \-mno-prologue-epilogue \-mno-gotplt |
|
655 \&\-melf \-maout \-melinux \-mlinux \-sim \-sim2 |
|
656 \&\-mmul-bug-workaround \-mno-mul-bug-workaround\fR |
|
657 .Sp |
|
658 \&\fI\s-1PDP-11\s0 Options\fR |
|
659 \&\fB\-mfpu \-msoft-float \-mac0 \-mno-ac0 \-m40 \-m45 \-m10 |
|
660 \&\-mbcopy \-mbcopy-builtin \-mint32 \-mno-int16 |
|
661 \&\-mint16 \-mno-int32 \-mfloat32 \-mno-float64 |
|
662 \&\-mfloat64 \-mno-float32 \-mabshi \-mno-abshi |
|
663 \&\-mbranch-expensive \-mbranch-cheap |
|
664 \&\-msplit \-mno-split \-munix-asm \-mdec-asm\fR |
|
665 .Sp |
|
666 \&\fIXstormy16 Options\fR |
|
667 \&\fB\-msim\fR |
|
668 .Sp |
|
669 \&\fIXtensa Options\fR |
|
670 \&\fB\-mconst16 \-mno-const16 |
|
671 \&\-mfused-madd \-mno-fused-madd |
|
672 \&\-mtext-section-literals \-mno-text-section-literals |
|
673 \&\-mtarget-align \-mno-target-align |
|
674 \&\-mlongcalls \-mno-longcalls\fR |
|
675 .Sp |
|
676 \&\fI\s-1FRV\s0 Options\fR |
|
677 \&\fB\-mgpr-32 \-mgpr-64 \-mfpr-32 \-mfpr-64 |
|
678 \&\-mhard-float \-msoft-float |
|
679 \&\-malloc-cc \-mfixed-cc \-mdword \-mno-dword |
|
680 \&\-mdouble \-mno-double |
|
681 \&\-mmedia \-mno-media \-mmuladd \-mno-muladd |
|
682 \&\-mlibrary-pic \-macc-4 \-macc-8 |
|
683 \&\-mpack \-mno-pack \-mno-eflags \-mcond-move \-mno-cond-move |
|
684 \&\-mscc \-mno-scc \-mcond-exec \-mno-cond-exec |
|
685 \&\-mvliw-branch \-mno-vliw-branch |
|
686 \&\-mmulti-cond-exec \-mno-multi-cond-exec \-mnested-cond-exec |
|
687 \&\-mno-nested-cond-exec \-mtomcat-stats |
|
688 \&\-mcpu=\fR\fIcpu\fR |
|
689 .Ip "\fICode Generation Options\fR" 4 |
|
690 .IX Item "Code Generation Options" |
|
691 \&\fB\-fcall-saved-\fR\fIreg\fR \fB\-fcall-used-\fR\fIreg\fR |
|
692 \&\fB\-ffixed-\fR\fIreg\fR \fB\-fexceptions |
|
693 \&\-fnon-call-exceptions \-funwind-tables |
|
694 \&\-fasynchronous-unwind-tables |
|
695 \&\-finhibit-size-directive \-finstrument-functions |
|
696 \&\-fno-common \-fno-ident |
|
697 \&\-fpcc-struct-return \-fpic \-fPIC \-fpie \-fPIE |
|
698 \&\-freg-struct-return \-fshared-data \-fshort-enums |
|
699 \&\-fshort-double \-fshort-wchar |
|
700 \&\-fverbose-asm \-fpack-struct \-fstack-check |
|
701 \&\-fstack-limit-register=\fR\fIreg\fR \fB\-fstack-limit-symbol=\fR\fIsym\fR |
|
702 \&\fB\-fargument-alias \-fargument-noalias |
|
703 \&\-fargument-noalias-global \-fleading-underscore |
|
704 \&\-ftls-model=\fR\fImodel\fR |
|
705 \&\fB\-ftrapv \-fwrapv \-fbounds-check\fR |
|
706 .Sh "Options Controlling the Kind of Output" |
|
707 .IX Subsection "Options Controlling the Kind of Output" |
|
708 Compilation can involve up to four stages: preprocessing, compilation |
|
709 proper, assembly and linking, always in that order. \s-1GCC\s0 is capable of |
|
710 preprocessing and compiling several files either into several |
|
711 assembler input files, or into one assembler input file; then each |
|
712 assembler input file produces an object file, and linking combines all |
|
713 the object files (those newly compiled, and those specified as input) |
|
714 into an executable file. |
|
715 .PP |
|
716 For any given input file, the file name suffix determines what kind of |
|
717 compilation is done: |
|
718 .Ip "\fIfile\fR\fB.c\fR" 4 |
|
719 .IX Item "file.c" |
|
720 C source code which must be preprocessed. |
|
721 .Ip "\fIfile\fR\fB.i\fR" 4 |
|
722 .IX Item "file.i" |
|
723 C source code which should not be preprocessed. |
|
724 .Ip "\fIfile\fR\fB.ii\fR" 4 |
|
725 .IX Item "file.ii" |
|
726 \&\*(C+ source code which should not be preprocessed. |
|
727 .Ip "\fIfile\fR\fB.m\fR" 4 |
|
728 .IX Item "file.m" |
|
729 Objective-C source code. Note that you must link with the library |
|
730 \&\fIlibobjc.a\fR to make an Objective-C program work. |
|
731 .Ip "\fIfile\fR\fB.mi\fR" 4 |
|
732 .IX Item "file.mi" |
|
733 Objective-C source code which should not be preprocessed. |
|
734 .Ip "\fIfile\fR\fB.h\fR" 4 |
|
735 .IX Item "file.h" |
|
736 C or \*(C+ header file to be turned into a precompiled header. |
|
737 .Ip "\fIfile\fR\fB.cc\fR" 4 |
|
738 .IX Item "file.cc" |
|
739 .PD 0 |
|
740 .Ip "\fIfile\fR\fB.cp\fR" 4 |
|
741 .IX Item "file.cp" |
|
742 .Ip "\fIfile\fR\fB.cxx\fR" 4 |
|
743 .IX Item "file.cxx" |
|
744 .Ip "\fIfile\fR\fB.cpp\fR" 4 |
|
745 .IX Item "file.cpp" |
|
746 .Ip "\fIfile\fR\fB.CPP\fR" 4 |
|
747 .IX Item "file.CPP" |
|
748 .Ip "\fIfile\fR\fB.c++\fR" 4 |
|
749 .IX Item "file.c++" |
|
750 .Ip "\fIfile\fR\fB.C\fR" 4 |
|
751 .IX Item "file.C" |
|
752 .PD |
|
753 \&\*(C+ source code which must be preprocessed. Note that in \fB.cxx\fR, |
|
754 the last two letters must both be literally \fBx\fR. Likewise, |
|
755 \&\fB.C\fR refers to a literal capital C. |
|
756 .Ip "\fIfile\fR\fB.hh\fR" 4 |
|
757 .IX Item "file.hh" |
|
758 .PD 0 |
|
759 .Ip "\fIfile\fR\fB.H\fR" 4 |
|
760 .IX Item "file.H" |
|
761 .PD |
|
762 \&\*(C+ header file to be turned into a precompiled header. |
|
763 .Ip "\fIfile\fR\fB.f\fR" 4 |
|
764 .IX Item "file.f" |
|
765 .PD 0 |
|
766 .Ip "\fIfile\fR\fB.for\fR" 4 |
|
767 .IX Item "file.for" |
|
768 .Ip "\fIfile\fR\fB.FOR\fR" 4 |
|
769 .IX Item "file.FOR" |
|
770 .PD |
|
771 Fortran source code which should not be preprocessed. |
|
772 .Ip "\fIfile\fR\fB.F\fR" 4 |
|
773 .IX Item "file.F" |
|
774 .PD 0 |
|
775 .Ip "\fIfile\fR\fB.fpp\fR" 4 |
|
776 .IX Item "file.fpp" |
|
777 .Ip "\fIfile\fR\fB.FPP\fR" 4 |
|
778 .IX Item "file.FPP" |
|
779 .PD |
|
780 Fortran source code which must be preprocessed (with the traditional |
|
781 preprocessor). |
|
782 .Ip "\fIfile\fR\fB.r\fR" 4 |
|
783 .IX Item "file.r" |
|
784 Fortran source code which must be preprocessed with a \s-1RATFOR\s0 |
|
785 preprocessor (not included with \s-1GCC\s0). |
|
786 .Ip "\fIfile\fR\fB.ads\fR" 4 |
|
787 .IX Item "file.ads" |
|
788 Ada source code file which contains a library unit declaration (a |
|
789 declaration of a package, subprogram, or generic, or a generic |
|
790 instantiation), or a library unit renaming declaration (a package, |
|
791 generic, or subprogram renaming declaration). Such files are also |
|
792 called \fIspecs\fR. |
|
793 .Ip "\fIfile\fR\fB.adb\fR" 4 |
|
794 .IX Item "file.adb" |
|
795 Ada source code file containing a library unit body (a subprogram or |
|
796 package body). Such files are also called \fIbodies\fR. |
|
797 .Ip "\fIfile\fR\fB.s\fR" 4 |
|
798 .IX Item "file.s" |
|
799 Assembler code. |
|
800 .Ip "\fIfile\fR\fB.S\fR" 4 |
|
801 .IX Item "file.S" |
|
802 Assembler code which must be preprocessed. |
|
803 .Ip "\fIother\fR" 4 |
|
804 .IX Item "other" |
|
805 An object file to be fed straight into linking. |
|
806 Any file name with no recognized suffix is treated this way. |
|
807 .PP |
|
808 You can specify the input language explicitly with the \fB\-x\fR option: |
|
809 .Ip "\fB\-x\fR \fIlanguage\fR" 4 |
|
810 .IX Item "-x language" |
|
811 Specify explicitly the \fIlanguage\fR for the following input files |
|
812 (rather than letting the compiler choose a default based on the file |
|
813 name suffix). This option applies to all following input files until |
|
814 the next \fB\-x\fR option. Possible values for \fIlanguage\fR are: |
|
815 .Sp |
|
816 .Vb 8 |
|
817 \& c c-header cpp-output |
|
818 \& c++ c++-header c++-cpp-output |
|
819 \& objective-c objective-c-header objc-cpp-output |
|
820 \& assembler assembler-with-cpp |
|
821 \& ada |
|
822 \& f77 f77-cpp-input ratfor |
|
823 \& java |
|
824 \& treelang |
|
825 .Ve |
|
826 .Ip "\fB\-x none\fR" 4 |
|
827 .IX Item "-x none" |
|
828 Turn off any specification of a language, so that subsequent files are |
|
829 handled according to their file name suffixes (as they are if \fB\-x\fR |
|
830 has not been used at all). |
|
831 .Ip "\fB\-pass-exit-codes\fR" 4 |
|
832 .IX Item "-pass-exit-codes" |
|
833 Normally the \fBgcc\fR program will exit with the code of 1 if any |
|
834 phase of the compiler returns a non-success return code. If you specify |
|
835 \&\fB\-pass-exit-codes\fR, the \fBgcc\fR program will instead return with |
|
836 numerically highest error produced by any phase that returned an error |
|
837 indication. |
|
838 .PP |
|
839 If you only want some of the stages of compilation, you can use |
|
840 \&\fB\-x\fR (or filename suffixes) to tell \fBgcc\fR where to start, and |
|
841 one of the options \fB\-c\fR, \fB\-S\fR, or \fB\-E\fR to say where |
|
842 \&\fBgcc\fR is to stop. Note that some combinations (for example, |
|
843 \&\fB\-x cpp-output \-E\fR) instruct \fBgcc\fR to do nothing at all. |
|
844 .Ip "\fB\-c\fR" 4 |
|
845 .IX Item "-c" |
|
846 Compile or assemble the source files, but do not link. The linking |
|
847 stage simply is not done. The ultimate output is in the form of an |
|
848 object file for each source file. |
|
849 .Sp |
|
850 By default, the object file name for a source file is made by replacing |
|
851 the suffix \fB.c\fR, \fB.i\fR, \fB.s\fR, etc., with \fB.o\fR. |
|
852 .Sp |
|
853 Unrecognized input files, not requiring compilation or assembly, are |
|
854 ignored. |
|
855 .Ip "\fB\-S\fR" 4 |
|
856 .IX Item "-S" |
|
857 Stop after the stage of compilation proper; do not assemble. The output |
|
858 is in the form of an assembler code file for each non-assembler input |
|
859 file specified. |
|
860 .Sp |
|
861 By default, the assembler file name for a source file is made by |
|
862 replacing the suffix \fB.c\fR, \fB.i\fR, etc., with \fB.s\fR. |
|
863 .Sp |
|
864 Input files that don't require compilation are ignored. |
|
865 .Ip "\fB\-E\fR" 4 |
|
866 .IX Item "-E" |
|
867 Stop after the preprocessing stage; do not run the compiler proper. The |
|
868 output is in the form of preprocessed source code, which is sent to the |
|
869 standard output. |
|
870 .Sp |
|
871 Input files which don't require preprocessing are ignored. |
|
872 .Ip "\fB\-o\fR \fIfile\fR" 4 |
|
873 .IX Item "-o file" |
|
874 Place output in file \fIfile\fR. This applies regardless to whatever |
|
875 sort of output is being produced, whether it be an executable file, |
|
876 an object file, an assembler file or preprocessed C code. |
|
877 .Sp |
|
878 If you specify \fB\-o\fR when compiling more than one input file, or |
|
879 you are producing an executable file as output, all the source files |
|
880 on the command line will be compiled at once. |
|
881 .Sp |
|
882 If \fB\-o\fR is not specified, the default is to put an executable file |
|
883 in \fIa.out\fR, the object file for \fI\fIsource\fI.\fIsuffix\fI\fR in |
|
884 \&\fI\fIsource\fI.o\fR, its assembler file in \fI\fIsource\fI.s\fR, and |
|
885 all preprocessed C source on standard output. |
|
886 .Ip "\fB\-v\fR" 4 |
|
887 .IX Item "-v" |
|
888 Print (on standard error output) the commands executed to run the stages |
|
889 of compilation. Also print the version number of the compiler driver |
|
890 program and of the preprocessor and the compiler proper. |
|
891 .Ip "\fB\-###\fR" 4 |
|
892 .IX Item "-###" |
|
893 Like \fB\-v\fR except the commands are not executed and all command |
|
894 arguments are quoted. This is useful for shell scripts to capture the |
|
895 driver-generated command lines. |
|
896 .Ip "\fB\-pipe\fR" 4 |
|
897 .IX Item "-pipe" |
|
898 Use pipes rather than temporary files for communication between the |
|
899 various stages of compilation. This fails to work on some systems where |
|
900 the assembler is unable to read from a pipe; but the \s-1GNU\s0 assembler has |
|
901 no trouble. |
|
902 .Ip "\fB\*(--help\fR" 4 |
|
903 .IX Item "help" |
|
904 Print (on the standard output) a description of the command line options |
|
905 understood by \fBgcc\fR. If the \fB\-v\fR option is also specified |
|
906 then \fB\*(--help\fR will also be passed on to the various processes |
|
907 invoked by \fBgcc\fR, so that they can display the command line options |
|
908 they accept. If the \fB\-Wextra\fR option is also specified then command |
|
909 line options which have no documentation associated with them will also |
|
910 be displayed. |
|
911 .Ip "\fB\*(--target-help\fR" 4 |
|
912 .IX Item "target-help" |
|
913 Print (on the standard output) a description of target specific command |
|
914 line options for each tool. |
|
915 .Ip "\fB\*(--version\fR" 4 |
|
916 .IX Item "version" |
|
917 Display the version number and copyrights of the invoked \s-1GCC\s0. |
|
918 .Sh "Compiling \*(C+ Programs" |
|
919 .IX Subsection "Compiling Programs" |
|
920 \&\*(C+ source files conventionally use one of the suffixes \fB.C\fR, |
|
921 \&\fB.cc\fR, \fB.cpp\fR, \fB.CPP\fR, \fB.c++\fR, \fB.cp\fR, or |
|
922 \&\fB.cxx\fR; \*(C+ header files often use \fB.hh\fR or \fB.H\fR; and |
|
923 preprocessed \*(C+ files use the suffix \fB.ii\fR. \s-1GCC\s0 recognizes |
|
924 files with these names and compiles them as \*(C+ programs even if you |
|
925 call the compiler the same way as for compiling C programs (usually |
|
926 with the name \fBgcc\fR). |
|
927 .PP |
|
928 However, \*(C+ programs often require class libraries as well as a |
|
929 compiler that understands the \*(C+ language\-\-\-and under some |
|
930 circumstances, you might want to compile programs or header files from |
|
931 standard input, or otherwise without a suffix that flags them as \*(C+ |
|
932 programs. You might also like to precompile a C header file with a |
|
933 \&\fB.h\fR extension to be used in \*(C+ compilations. \fBg++\fR is a |
|
934 program that calls \s-1GCC\s0 with the default language set to \*(C+, and |
|
935 automatically specifies linking against the \*(C+ library. On many |
|
936 systems, \fBg++\fR is also installed with the name \fBc++\fR. |
|
937 .PP |
|
938 When you compile \*(C+ programs, you may specify many of the same |
|
939 command-line options that you use for compiling programs in any |
|
940 language; or command-line options meaningful for C and related |
|
941 languages; or options that are meaningful only for \*(C+ programs. |
|
942 .Sh "Options Controlling C Dialect" |
|
943 .IX Subsection "Options Controlling C Dialect" |
|
944 The following options control the dialect of C (or languages derived |
|
945 from C, such as \*(C+ and Objective-C) that the compiler accepts: |
|
946 .Ip "\fB\-ansi\fR" 4 |
|
947 .IX Item "-ansi" |
|
948 In C mode, support all \s-1ISO\s0 C90 programs. In \*(C+ mode, |
|
949 remove \s-1GNU\s0 extensions that conflict with \s-1ISO\s0 \*(C+. |
|
950 .Sp |
|
951 This turns off certain features of \s-1GCC\s0 that are incompatible with \s-1ISO\s0 |
|
952 C90 (when compiling C code), or of standard \*(C+ (when compiling \*(C+ code), |
|
953 such as the \f(CW\*(C`asm\*(C'\fR and \f(CW\*(C`typeof\*(C'\fR keywords, and |
|
954 predefined macros such as \f(CW\*(C`unix\*(C'\fR and \f(CW\*(C`vax\*(C'\fR that identify the |
|
955 type of system you are using. It also enables the undesirable and |
|
956 rarely used \s-1ISO\s0 trigraph feature. For the C compiler, |
|
957 it disables recognition of \*(C+ style \fB//\fR comments as well as |
|
958 the \f(CW\*(C`inline\*(C'\fR keyword. |
|
959 .Sp |
|
960 The alternate keywords \f(CW\*(C`_\|_asm_\|_\*(C'\fR, \f(CW\*(C`_\|_extension_\|_\*(C'\fR, |
|
961 \&\f(CW\*(C`_\|_inline_\|_\*(C'\fR and \f(CW\*(C`_\|_typeof_\|_\*(C'\fR continue to work despite |
|
962 \&\fB\-ansi\fR. You would not want to use them in an \s-1ISO\s0 C program, of |
|
963 course, but it is useful to put them in header files that might be included |
|
964 in compilations done with \fB\-ansi\fR. Alternate predefined macros |
|
965 such as \f(CW\*(C`_\|_unix_\|_\*(C'\fR and \f(CW\*(C`_\|_vax_\|_\*(C'\fR are also available, with or |
|
966 without \fB\-ansi\fR. |
|
967 .Sp |
|
968 The \fB\-ansi\fR option does not cause non-ISO programs to be |
|
969 rejected gratuitously. For that, \fB\-pedantic\fR is required in |
|
970 addition to \fB\-ansi\fR. |
|
971 .Sp |
|
972 The macro \f(CW\*(C`_\|_STRICT_ANSI_\|_\*(C'\fR is predefined when the \fB\-ansi\fR |
|
973 option is used. Some header files may notice this macro and refrain |
|
974 from declaring certain functions or defining certain macros that the |
|
975 \&\s-1ISO\s0 standard doesn't call for; this is to avoid interfering with any |
|
976 programs that might use these names for other things. |
|
977 .Sp |
|
978 Functions which would normally be built in but do not have semantics |
|
979 defined by \s-1ISO\s0 C (such as \f(CW\*(C`alloca\*(C'\fR and \f(CW\*(C`ffs\*(C'\fR) are not built-in |
|
980 functions with \fB\-ansi\fR is used. |
|
981 .Ip "\fB\-std=\fR" 4 |
|
982 .IX Item "-std=" |
|
983 Determine the language standard. This option is currently only |
|
984 supported when compiling C or \*(C+. A value for this option must be |
|
985 provided; possible values are |
|
986 .RS 4 |
|
987 .Ip "\fBc89\fR" 4 |
|
988 .IX Item "c89" |
|
989 .PD 0 |
|
990 .Ip "\fBiso9899:1990\fR" 4 |
|
991 .IX Item "iso9899:1990" |
|
992 .PD |
|
993 \&\s-1ISO\s0 C90 (same as \fB\-ansi\fR). |
|
994 .Ip "\fBiso9899:199409\fR" 4 |
|
995 .IX Item "iso9899:199409" |
|
996 \&\s-1ISO\s0 C90 as modified in amendment 1. |
|
997 .Ip "\fBc99\fR" 4 |
|
998 .IX Item "c99" |
|
999 .PD 0 |
|
1000 .Ip "\fBc9x\fR" 4 |
|
1001 .IX Item "c9x" |
|
1002 .Ip "\fBiso9899:1999\fR" 4 |
|
1003 .IX Item "iso9899:1999" |
|
1004 .Ip "\fBiso9899:199x\fR" 4 |
|
1005 .IX Item "iso9899:199x" |
|
1006 .PD |
|
1007 \&\s-1ISO\s0 C99. Note that this standard is not yet fully supported; see |
|
1008 <\fBhttp://gcc.gnu.org/gcc-3.4/c99status.html\fR> for more information. The |
|
1009 names \fBc9x\fR and \fBiso9899:199x\fR are deprecated. |
|
1010 .Ip "\fBgnu89\fR" 4 |
|
1011 .IX Item "gnu89" |
|
1012 Default, \s-1ISO\s0 C90 plus \s-1GNU\s0 extensions (including some C99 features). |
|
1013 .Ip "\fBgnu99\fR" 4 |
|
1014 .IX Item "gnu99" |
|
1015 .PD 0 |
|
1016 .Ip "\fBgnu9x\fR" 4 |
|
1017 .IX Item "gnu9x" |
|
1018 .PD |
|
1019 \&\s-1ISO\s0 C99 plus \s-1GNU\s0 extensions. When \s-1ISO\s0 C99 is fully implemented in \s-1GCC\s0, |
|
1020 this will become the default. The name \fBgnu9x\fR is deprecated. |
|
1021 .Ip "\fBc++98\fR" 4 |
|
1022 .IX Item "c++98" |
|
1023 The 1998 \s-1ISO\s0 \*(C+ standard plus amendments. |
|
1024 .Ip "\fBgnu++98\fR" 4 |
|
1025 .IX Item "gnu++98" |
|
1026 The same as \fB\-std=c++98\fR plus \s-1GNU\s0 extensions. This is the |
|
1027 default for \*(C+ code. |
|
1028 .RE |
|
1029 .RS 4 |
|
1030 .Sp |
|
1031 Even when this option is not specified, you can still use some of the |
|
1032 features of newer standards in so far as they do not conflict with |
|
1033 previous C standards. For example, you may use \f(CW\*(C`_\|_restrict_\|_\*(C'\fR even |
|
1034 when \fB\-std=c99\fR is not specified. |
|
1035 .Sp |
|
1036 The \fB\-std\fR options specifying some version of \s-1ISO\s0 C have the same |
|
1037 effects as \fB\-ansi\fR, except that features that were not in \s-1ISO\s0 C90 |
|
1038 but are in the specified version (for example, \fB//\fR comments and |
|
1039 the \f(CW\*(C`inline\*(C'\fR keyword in \s-1ISO\s0 C99) are not disabled. |
|
1040 .RE |
|
1041 .Ip "\fB\-aux-info\fR \fIfilename\fR" 4 |
|
1042 .IX Item "-aux-info filename" |
|
1043 Output to the given filename prototyped declarations for all functions |
|
1044 declared and/or defined in a translation unit, including those in header |
|
1045 files. This option is silently ignored in any language other than C. |
|
1046 .Sp |
|
1047 Besides declarations, the file indicates, in comments, the origin of |
|
1048 each declaration (source file and line), whether the declaration was |
|
1049 implicit, prototyped or unprototyped (\fBI\fR, \fBN\fR for new or |
|
1050 \&\fBO\fR for old, respectively, in the first character after the line |
|
1051 number and the colon), and whether it came from a declaration or a |
|
1052 definition (\fBC\fR or \fBF\fR, respectively, in the following |
|
1053 character). In the case of function definitions, a K&R-style list of |
|
1054 arguments followed by their declarations is also provided, inside |
|
1055 comments, after the declaration. |
|
1056 .Ip "\fB\-fno-asm\fR" 4 |
|
1057 .IX Item "-fno-asm" |
|
1058 Do not recognize \f(CW\*(C`asm\*(C'\fR, \f(CW\*(C`inline\*(C'\fR or \f(CW\*(C`typeof\*(C'\fR as a |
|
1059 keyword, so that code can use these words as identifiers. You can use |
|
1060 the keywords \f(CW\*(C`_\|_asm_\|_\*(C'\fR, \f(CW\*(C`_\|_inline_\|_\*(C'\fR and \f(CW\*(C`_\|_typeof_\|_\*(C'\fR |
|
1061 instead. \fB\-ansi\fR implies \fB\-fno-asm\fR. |
|
1062 .Sp |
|
1063 In \*(C+, this switch only affects the \f(CW\*(C`typeof\*(C'\fR keyword, since |
|
1064 \&\f(CW\*(C`asm\*(C'\fR and \f(CW\*(C`inline\*(C'\fR are standard keywords. You may want to |
|
1065 use the \fB\-fno-gnu-keywords\fR flag instead, which has the same |
|
1066 effect. In C99 mode (\fB\-std=c99\fR or \fB\-std=gnu99\fR), this |
|
1067 switch only affects the \f(CW\*(C`asm\*(C'\fR and \f(CW\*(C`typeof\*(C'\fR keywords, since |
|
1068 \&\f(CW\*(C`inline\*(C'\fR is a standard keyword in \s-1ISO\s0 C99. |
|
1069 .Ip "\fB\-fno-builtin\fR" 4 |
|
1070 .IX Item "-fno-builtin" |
|
1071 .PD 0 |
|
1072 .Ip "\fB\-fno-builtin-\fR\fIfunction\fR" 4 |
|
1073 .IX Item "-fno-builtin-function" |
|
1074 .PD |
|
1075 Don't recognize built-in functions that do not begin with |
|
1076 \&\fB_\|_builtin_\fR as prefix. |
|
1077 .Sp |
|
1078 \&\s-1GCC\s0 normally generates special code to handle certain built-in functions |
|
1079 more efficiently; for instance, calls to \f(CW\*(C`alloca\*(C'\fR may become single |
|
1080 instructions that adjust the stack directly, and calls to \f(CW\*(C`memcpy\*(C'\fR |
|
1081 may become inline copy loops. The resulting code is often both smaller |
|
1082 and faster, but since the function calls no longer appear as such, you |
|
1083 cannot set a breakpoint on those calls, nor can you change the behavior |
|
1084 of the functions by linking with a different library. |
|
1085 .Sp |
|
1086 With the \fB\-fno-builtin-\fR\fIfunction\fR option |
|
1087 only the built-in function \fIfunction\fR is |
|
1088 disabled. \fIfunction\fR must not begin with \fB_\|_builtin_\fR. If a |
|
1089 function is named this is not built-in in this version of \s-1GCC\s0, this |
|
1090 option is ignored. There is no corresponding |
|
1091 \&\fB\-fbuiltin-\fR\fIfunction\fR option; if you wish to enable |
|
1092 built-in functions selectively when using \fB\-fno-builtin\fR or |
|
1093 \&\fB\-ffreestanding\fR, you may define macros such as: |
|
1094 .Sp |
|
1095 .Vb 2 |
|
1096 \& #define abs(n) __builtin_abs ((n)) |
|
1097 \& #define strcpy(d, s) __builtin_strcpy ((d), (s)) |
|
1098 .Ve |
|
1099 .Ip "\fB\-fhosted\fR" 4 |
|
1100 .IX Item "-fhosted" |
|
1101 Assert that compilation takes place in a hosted environment. This implies |
|
1102 \&\fB\-fbuiltin\fR. A hosted environment is one in which the |
|
1103 entire standard library is available, and in which \f(CW\*(C`main\*(C'\fR has a return |
|
1104 type of \f(CW\*(C`int\*(C'\fR. Examples are nearly everything except a kernel. |
|
1105 This is equivalent to \fB\-fno-freestanding\fR. |
|
1106 .Ip "\fB\-ffreestanding\fR" 4 |
|
1107 .IX Item "-ffreestanding" |
|
1108 Assert that compilation takes place in a freestanding environment. This |
|
1109 implies \fB\-fno-builtin\fR. A freestanding environment |
|
1110 is one in which the standard library may not exist, and program startup may |
|
1111 not necessarily be at \f(CW\*(C`main\*(C'\fR. The most obvious example is an \s-1OS\s0 kernel. |
|
1112 This is equivalent to \fB\-fno-hosted\fR. |
|
1113 .Ip "\fB\-fms-extensions\fR" 4 |
|
1114 .IX Item "-fms-extensions" |
|
1115 Accept some non-standard constructs used in Microsoft header files. |
|
1116 .Ip "\fB\-trigraphs\fR" 4 |
|
1117 .IX Item "-trigraphs" |
|
1118 Support \s-1ISO\s0 C trigraphs. The \fB\-ansi\fR option (and \fB\-std\fR |
|
1119 options for strict \s-1ISO\s0 C conformance) implies \fB\-trigraphs\fR. |
|
1120 .Ip "\fB\-no-integrated-cpp\fR" 4 |
|
1121 .IX Item "-no-integrated-cpp" |
|
1122 Performs a compilation in two passes: preprocessing and compiling. This |
|
1123 option allows a user supplied \*(L"cc1\*(R", \*(L"cc1plus\*(R", or \*(L"cc1obj\*(R" via the |
|
1124 \&\fB\-B\fR option. The user supplied compilation step can then add in |
|
1125 an additional preprocessing step after normal preprocessing but before |
|
1126 compiling. The default is to use the integrated cpp (internal cpp) |
|
1127 .Sp |
|
1128 The semantics of this option will change if \*(L"cc1\*(R", \*(L"cc1plus\*(R", and |
|
1129 \&\*(L"cc1obj\*(R" are merged. |
|
1130 .Ip "\fB\-traditional\fR" 4 |
|
1131 .IX Item "-traditional" |
|
1132 .PD 0 |
|
1133 .Ip "\fB\-traditional-cpp\fR" 4 |
|
1134 .IX Item "-traditional-cpp" |
|
1135 .PD |
|
1136 Formerly, these options caused \s-1GCC\s0 to attempt to emulate a pre-standard |
|
1137 C compiler. They are now only supported with the \fB\-E\fR switch. |
|
1138 The preprocessor continues to support a pre-standard mode. See the \s-1GNU\s0 |
|
1139 \&\s-1CPP\s0 manual for details. |
|
1140 .Ip "\fB\-fcond-mismatch\fR" 4 |
|
1141 .IX Item "-fcond-mismatch" |
|
1142 Allow conditional expressions with mismatched types in the second and |
|
1143 third arguments. The value of such an expression is void. This option |
|
1144 is not supported for \*(C+. |
|
1145 .Ip "\fB\-funsigned-char\fR" 4 |
|
1146 .IX Item "-funsigned-char" |
|
1147 Let the type \f(CW\*(C`char\*(C'\fR be unsigned, like \f(CW\*(C`unsigned char\*(C'\fR. |
|
1148 .Sp |
|
1149 Each kind of machine has a default for what \f(CW\*(C`char\*(C'\fR should |
|
1150 be. It is either like \f(CW\*(C`unsigned char\*(C'\fR by default or like |
|
1151 \&\f(CW\*(C`signed char\*(C'\fR by default. |
|
1152 .Sp |
|
1153 Ideally, a portable program should always use \f(CW\*(C`signed char\*(C'\fR or |
|
1154 \&\f(CW\*(C`unsigned char\*(C'\fR when it depends on the signedness of an object. |
|
1155 But many programs have been written to use plain \f(CW\*(C`char\*(C'\fR and |
|
1156 expect it to be signed, or expect it to be unsigned, depending on the |
|
1157 machines they were written for. This option, and its inverse, let you |
|
1158 make such a program work with the opposite default. |
|
1159 .Sp |
|
1160 The type \f(CW\*(C`char\*(C'\fR is always a distinct type from each of |
|
1161 \&\f(CW\*(C`signed char\*(C'\fR or \f(CW\*(C`unsigned char\*(C'\fR, even though its behavior |
|
1162 is always just like one of those two. |
|
1163 .Ip "\fB\-fsigned-char\fR" 4 |
|
1164 .IX Item "-fsigned-char" |
|
1165 Let the type \f(CW\*(C`char\*(C'\fR be signed, like \f(CW\*(C`signed char\*(C'\fR. |
|
1166 .Sp |
|
1167 Note that this is equivalent to \fB\-fno-unsigned-char\fR, which is |
|
1168 the negative form of \fB\-funsigned-char\fR. Likewise, the option |
|
1169 \&\fB\-fno-signed-char\fR is equivalent to \fB\-funsigned-char\fR. |
|
1170 .Ip "\fB\-fsigned-bitfields\fR" 4 |
|
1171 .IX Item "-fsigned-bitfields" |
|
1172 .PD 0 |
|
1173 .Ip "\fB\-funsigned-bitfields\fR" 4 |
|
1174 .IX Item "-funsigned-bitfields" |
|
1175 .Ip "\fB\-fno-signed-bitfields\fR" 4 |
|
1176 .IX Item "-fno-signed-bitfields" |
|
1177 .Ip "\fB\-fno-unsigned-bitfields\fR" 4 |
|
1178 .IX Item "-fno-unsigned-bitfields" |
|
1179 .PD |
|
1180 These options control whether a bit-field is signed or unsigned, when the |
|
1181 declaration does not use either \f(CW\*(C`signed\*(C'\fR or \f(CW\*(C`unsigned\*(C'\fR. By |
|
1182 default, such a bit-field is signed, because this is consistent: the |
|
1183 basic integer types such as \f(CW\*(C`int\*(C'\fR are signed types. |
|
1184 .Ip "\fB\-fwritable-strings\fR" 4 |
|
1185 .IX Item "-fwritable-strings" |
|
1186 Store string constants in the writable data segment and don't uniquize |
|
1187 them. This is for compatibility with old programs which assume they can |
|
1188 write into string constants. |
|
1189 .Sp |
|
1190 Writing into string constants is a very bad idea; ``constants'' should |
|
1191 be constant. |
|
1192 .Sp |
|
1193 This option is deprecated. |
|
1194 .Sh "Options Controlling \*(C+ Dialect" |
|
1195 .IX Subsection "Options Controlling Dialect" |
|
1196 This section describes the command-line options that are only meaningful |
|
1197 for \*(C+ programs; but you can also use most of the \s-1GNU\s0 compiler options |
|
1198 regardless of what language your program is in. For example, you |
|
1199 might compile a file \f(CW\*(C`firstClass.C\*(C'\fR like this: |
|
1200 .PP |
|
1201 .Vb 1 |
|
1202 \& g++ -g -frepo -O -c firstClass.C |
|
1203 .Ve |
|
1204 In this example, only \fB\-frepo\fR is an option meant |
|
1205 only for \*(C+ programs; you can use the other options with any |
|
1206 language supported by \s-1GCC\s0. |
|
1207 .PP |
|
1208 Here is a list of options that are \fIonly\fR for compiling \*(C+ programs: |
|
1209 .Ip "\fB\-fabi-version=\fR\fIn\fR" 4 |
|
1210 .IX Item "-fabi-version=n" |
|
1211 Use version \fIn\fR of the \*(C+ \s-1ABI\s0. Version 2 is the version of the |
|
1212 \&\*(C+ \s-1ABI\s0 that first appeared in G++ 3.4. Version 1 is the version of |
|
1213 the \*(C+ \s-1ABI\s0 that first appeared in G++ 3.2. Version 0 will always be |
|
1214 the version that conforms most closely to the \*(C+ \s-1ABI\s0 specification. |
|
1215 Therefore, the \s-1ABI\s0 obtained using version 0 will change as \s-1ABI\s0 bugs |
|
1216 are fixed. |
|
1217 .Sp |
|
1218 The default is version 2. |
|
1219 .Ip "\fB\-fno-access-control\fR" 4 |
|
1220 .IX Item "-fno-access-control" |
|
1221 Turn off all access checking. This switch is mainly useful for working |
|
1222 around bugs in the access control code. |
|
1223 .Ip "\fB\-fcheck-new\fR" 4 |
|
1224 .IX Item "-fcheck-new" |
|
1225 Check that the pointer returned by \f(CW\*(C`operator new\*(C'\fR is non-null |
|
1226 before attempting to modify the storage allocated. This check is |
|
1227 normally unnecessary because the \*(C+ standard specifies that |
|
1228 \&\f(CW\*(C`operator new\*(C'\fR will only return \f(CW\*(C`0\*(C'\fR if it is declared |
|
1229 \&\fB\f(BIthrow()\fB\fR, in which case the compiler will always check the |
|
1230 return value even without this option. In all other cases, when |
|
1231 \&\f(CW\*(C`operator new\*(C'\fR has a non-empty exception specification, memory |
|
1232 exhaustion is signalled by throwing \f(CW\*(C`std::bad_alloc\*(C'\fR. See also |
|
1233 \&\fBnew (nothrow)\fR. |
|
1234 .Ip "\fB\-fconserve-space\fR" 4 |
|
1235 .IX Item "-fconserve-space" |
|
1236 Put uninitialized or runtime-initialized global variables into the |
|
1237 common segment, as C does. This saves space in the executable at the |
|
1238 cost of not diagnosing duplicate definitions. If you compile with this |
|
1239 flag and your program mysteriously crashes after \f(CW\*(C`main()\*(C'\fR has |
|
1240 completed, you may have an object that is being destroyed twice because |
|
1241 two definitions were merged. |
|
1242 .Sp |
|
1243 This option is no longer useful on most targets, now that support has |
|
1244 been added for putting variables into \s-1BSS\s0 without making them common. |
|
1245 .Ip "\fB\-fno-const-strings\fR" 4 |
|
1246 .IX Item "-fno-const-strings" |
|
1247 Give string constants type \f(CW\*(C`char *\*(C'\fR instead of type \f(CW\*(C`const |
|
1248 char *\*(C'\fR. By default, G++ uses type \f(CW\*(C`const char *\*(C'\fR as required by |
|
1249 the standard. Even if you use \fB\-fno-const-strings\fR, you cannot |
|
1250 actually modify the value of a string constant, unless you also use |
|
1251 \&\fB\-fwritable-strings\fR. |
|
1252 .Sp |
|
1253 This option might be removed in a future release of G++. For maximum |
|
1254 portability, you should structure your code so that it works with |
|
1255 string constants that have type \f(CW\*(C`const char *\*(C'\fR. |
|
1256 .Ip "\fB\-fno-elide-constructors\fR" 4 |
|
1257 .IX Item "-fno-elide-constructors" |
|
1258 The \*(C+ standard allows an implementation to omit creating a temporary |
|
1259 which is only used to initialize another object of the same type. |
|
1260 Specifying this option disables that optimization, and forces G++ to |
|
1261 call the copy constructor in all cases. |
|
1262 .Ip "\fB\-fno-enforce-eh-specs\fR" 4 |
|
1263 .IX Item "-fno-enforce-eh-specs" |
|
1264 Don't check for violation of exception specifications at runtime. This |
|
1265 option violates the \*(C+ standard, but may be useful for reducing code |
|
1266 size in production builds, much like defining \fB\s-1NDEBUG\s0\fR. The compiler |
|
1267 will still optimize based on the exception specifications. |
|
1268 .Ip "\fB\-ffor-scope\fR" 4 |
|
1269 .IX Item "-ffor-scope" |
|
1270 .PD 0 |
|
1271 .Ip "\fB\-fno-for-scope\fR" 4 |
|
1272 .IX Item "-fno-for-scope" |
|
1273 .PD |
|
1274 If \fB\-ffor-scope\fR is specified, the scope of variables declared in |
|
1275 a \fIfor-init-statement\fR is limited to the \fBfor\fR loop itself, |
|
1276 as specified by the \*(C+ standard. |
|
1277 If \fB\-fno-for-scope\fR is specified, the scope of variables declared in |
|
1278 a \fIfor-init-statement\fR extends to the end of the enclosing scope, |
|
1279 as was the case in old versions of G++, and other (traditional) |
|
1280 implementations of \*(C+. |
|
1281 .Sp |
|
1282 The default if neither flag is given to follow the standard, |
|
1283 but to allow and give a warning for old-style code that would |
|
1284 otherwise be invalid, or have different behavior. |
|
1285 .Ip "\fB\-fno-gnu-keywords\fR" 4 |
|
1286 .IX Item "-fno-gnu-keywords" |
|
1287 Do not recognize \f(CW\*(C`typeof\*(C'\fR as a keyword, so that code can use this |
|
1288 word as an identifier. You can use the keyword \f(CW\*(C`_\|_typeof_\|_\*(C'\fR instead. |
|
1289 \&\fB\-ansi\fR implies \fB\-fno-gnu-keywords\fR. |
|
1290 .Ip "\fB\-fno-implicit-templates\fR" 4 |
|
1291 .IX Item "-fno-implicit-templates" |
|
1292 Never emit code for non-inline templates which are instantiated |
|
1293 implicitly (i.e. by use); only emit code for explicit instantiations. |
|
1294 .Ip "\fB\-fno-implicit-inline-templates\fR" 4 |
|
1295 .IX Item "-fno-implicit-inline-templates" |
|
1296 Don't emit code for implicit instantiations of inline templates, either. |
|
1297 The default is to handle inlines differently so that compiles with and |
|
1298 without optimization will need the same set of explicit instantiations. |
|
1299 .Ip "\fB\-fno-implement-inlines\fR" 4 |
|
1300 .IX Item "-fno-implement-inlines" |
|
1301 To save space, do not emit out-of-line copies of inline functions |
|
1302 controlled by \fB#pragma implementation\fR. This will cause linker |
|
1303 errors if these functions are not inlined everywhere they are called. |
|
1304 .Ip "\fB\-fms-extensions\fR" 4 |
|
1305 .IX Item "-fms-extensions" |
|
1306 Disable pedantic warnings about constructs used in \s-1MFC\s0, such as implicit |
|
1307 int and getting a pointer to member function via non-standard syntax. |
|
1308 .Ip "\fB\-fno-nonansi-builtins\fR" 4 |
|
1309 .IX Item "-fno-nonansi-builtins" |
|
1310 Disable built-in declarations of functions that are not mandated by |
|
1311 \&\s-1ANSI/ISO\s0 C. These include \f(CW\*(C`ffs\*(C'\fR, \f(CW\*(C`alloca\*(C'\fR, \f(CW\*(C`_exit\*(C'\fR, |
|
1312 \&\f(CW\*(C`index\*(C'\fR, \f(CW\*(C`bzero\*(C'\fR, \f(CW\*(C`conjf\*(C'\fR, and other related functions. |
|
1313 .Ip "\fB\-fno-operator-names\fR" 4 |
|
1314 .IX Item "-fno-operator-names" |
|
1315 Do not treat the operator name keywords \f(CW\*(C`and\*(C'\fR, \f(CW\*(C`bitand\*(C'\fR, |
|
1316 \&\f(CW\*(C`bitor\*(C'\fR, \f(CW\*(C`compl\*(C'\fR, \f(CW\*(C`not\*(C'\fR, \f(CW\*(C`or\*(C'\fR and \f(CW\*(C`xor\*(C'\fR as |
|
1317 synonyms as keywords. |
|
1318 .Ip "\fB\-fno-optional-diags\fR" 4 |
|
1319 .IX Item "-fno-optional-diags" |
|
1320 Disable diagnostics that the standard says a compiler does not need to |
|
1321 issue. Currently, the only such diagnostic issued by G++ is the one for |
|
1322 a name having multiple meanings within a class. |
|
1323 .Ip "\fB\-fpermissive\fR" 4 |
|
1324 .IX Item "-fpermissive" |
|
1325 Downgrade some diagnostics about nonconformant code from errors to |
|
1326 warnings. Thus, using \fB\-fpermissive\fR will allow some |
|
1327 nonconforming code to compile. |
|
1328 .Ip "\fB\-frepo\fR" 4 |
|
1329 .IX Item "-frepo" |
|
1330 Enable automatic template instantiation at link time. This option also |
|
1331 implies \fB\-fno-implicit-templates\fR. |
|
1332 .Ip "\fB\-fno-rtti\fR" 4 |
|
1333 .IX Item "-fno-rtti" |
|
1334 Disable generation of information about every class with virtual |
|
1335 functions for use by the \*(C+ runtime type identification features |
|
1336 (\fBdynamic_cast\fR and \fBtypeid\fR). If you don't use those parts |
|
1337 of the language, you can save some space by using this flag. Note that |
|
1338 exception handling uses the same information, but it will generate it as |
|
1339 needed. |
|
1340 .Ip "\fB\-fstats\fR" 4 |
|
1341 .IX Item "-fstats" |
|
1342 Emit statistics about front-end processing at the end of the compilation. |
|
1343 This information is generally only useful to the G++ development team. |
|
1344 .Ip "\fB\-ftemplate-depth-\fR\fIn\fR" 4 |
|
1345 .IX Item "-ftemplate-depth-n" |
|
1346 Set the maximum instantiation depth for template classes to \fIn\fR. |
|
1347 A limit on the template instantiation depth is needed to detect |
|
1348 endless recursions during template class instantiation. \s-1ANSI/ISO\s0 \*(C+ |
|
1349 conforming programs must not rely on a maximum depth greater than 17. |
|
1350 .Ip "\fB\-fuse-cxa-atexit\fR" 4 |
|
1351 .IX Item "-fuse-cxa-atexit" |
|
1352 Register destructors for objects with static storage duration with the |
|
1353 \&\f(CW\*(C`_\|_cxa_atexit\*(C'\fR function rather than the \f(CW\*(C`atexit\*(C'\fR function. |
|
1354 This option is required for fully standards-compliant handling of static |
|
1355 destructors, but will only work if your C library supports |
|
1356 \&\f(CW\*(C`_\|_cxa_atexit\*(C'\fR. |
|
1357 .Ip "\fB\-fno-weak\fR" 4 |
|
1358 .IX Item "-fno-weak" |
|
1359 Do not use weak symbol support, even if it is provided by the linker. |
|
1360 By default, G++ will use weak symbols if they are available. This |
|
1361 option exists only for testing, and should not be used by end-users; |
|
1362 it will result in inferior code and has no benefits. This option may |
|
1363 be removed in a future release of G++. |
|
1364 .Ip "\fB\-nostdinc++\fR" 4 |
|
1365 .IX Item "-nostdinc++" |
|
1366 Do not search for header files in the standard directories specific to |
|
1367 \&\*(C+, but do still search the other standard directories. (This option |
|
1368 is used when building the \*(C+ library.) |
|
1369 .PP |
|
1370 In addition, these optimization, warning, and code generation options |
|
1371 have meanings only for \*(C+ programs: |
|
1372 .Ip "\fB\-fno-default-inline\fR" 4 |
|
1373 .IX Item "-fno-default-inline" |
|
1374 Do not assume \fBinline\fR for functions defined inside a class scope. |
|
1375 Note that these |
|
1376 functions will have linkage like inline functions; they just won't be |
|
1377 inlined by default. |
|
1378 .Ip "\fB\-Wabi\fR (\*(C+ only)" 4 |
|
1379 .IX Item "-Wabi ( only)" |
|
1380 Warn when G++ generates code that is probably not compatible with the |
|
1381 vendor-neutral \*(C+ \s-1ABI\s0. Although an effort has been made to warn about |
|
1382 all such cases, there are probably some cases that are not warned about, |
|
1383 even though G++ is generating incompatible code. There may also be |
|
1384 cases where warnings are emitted even though the code that is generated |
|
1385 will be compatible. |
|
1386 .Sp |
|
1387 You should rewrite your code to avoid these warnings if you are |
|
1388 concerned about the fact that code generated by G++ may not be binary |
|
1389 compatible with code generated by other compilers. |
|
1390 .Sp |
|
1391 The known incompatibilities at this point include: |
|
1392 .RS 4 |
|
1393 .Ip "\(bu" 4 |
|
1394 Incorrect handling of tail-padding for bit-fields. G++ may attempt to |
|
1395 pack data into the same byte as a base class. For example: |
|
1396 .Sp |
|
1397 .Vb 2 |
|
1398 \& struct A { virtual void f(); int f1 : 1; }; |
|
1399 \& struct B : public A { int f2 : 1; }; |
|
1400 .Ve |
|
1401 In this case, G++ will place \f(CW\*(C`B::f2\*(C'\fR into the same byte |
|
1402 as\f(CW\*(C`A::f1\*(C'\fR; other compilers will not. You can avoid this problem |
|
1403 by explicitly padding \f(CW\*(C`A\*(C'\fR so that its size is a multiple of the |
|
1404 byte size on your platform; that will cause G++ and other compilers to |
|
1405 layout \f(CW\*(C`B\*(C'\fR identically. |
|
1406 .Ip "\(bu" 4 |
|
1407 Incorrect handling of tail-padding for virtual bases. G++ does not use |
|
1408 tail padding when laying out virtual bases. For example: |
|
1409 .Sp |
|
1410 .Vb 3 |
|
1411 \& struct A { virtual void f(); char c1; }; |
|
1412 \& struct B { B(); char c2; }; |
|
1413 \& struct C : public A, public virtual B {}; |
|
1414 .Ve |
|
1415 In this case, G++ will not place \f(CW\*(C`B\*(C'\fR into the tail-padding for |
|
1416 \&\f(CW\*(C`A\*(C'\fR; other compilers will. You can avoid this problem by |
|
1417 explicitly padding \f(CW\*(C`A\*(C'\fR so that its size is a multiple of its |
|
1418 alignment (ignoring virtual base classes); that will cause G++ and other |
|
1419 compilers to layout \f(CW\*(C`C\*(C'\fR identically. |
|
1420 .Ip "\(bu" 4 |
|
1421 Incorrect handling of bit-fields with declared widths greater than that |
|
1422 of their underlying types, when the bit-fields appear in a union. For |
|
1423 example: |
|
1424 .Sp |
|
1425 .Vb 1 |
|
1426 \& union U { int i : 4096; }; |
|
1427 .Ve |
|
1428 Assuming that an \f(CW\*(C`int\*(C'\fR does not have 4096 bits, G++ will make the |
|
1429 union too small by the number of bits in an \f(CW\*(C`int\*(C'\fR. |
|
1430 .Ip "\(bu" 4 |
|
1431 Empty classes can be placed at incorrect offsets. For example: |
|
1432 .Sp |
|
1433 .Vb 1 |
|
1434 \& struct A {}; |
|
1435 .Ve |
|
1436 .Vb 4 |
|
1437 \& struct B { |
|
1438 \& A a; |
|
1439 \& virtual void f (); |
|
1440 \& }; |
|
1441 .Ve |
|
1442 .Vb 1 |
|
1443 \& struct C : public B, public A {}; |
|
1444 .Ve |
|
1445 G++ will place the \f(CW\*(C`A\*(C'\fR base class of \f(CW\*(C`C\*(C'\fR at a nonzero offset; |
|
1446 it should be placed at offset zero. G++ mistakenly believes that the |
|
1447 \&\f(CW\*(C`A\*(C'\fR data member of \f(CW\*(C`B\*(C'\fR is already at offset zero. |
|
1448 .Ip "\(bu" 4 |
|
1449 Names of template functions whose types involve \f(CW\*(C`typename\*(C'\fR or |
|
1450 template template parameters can be mangled incorrectly. |
|
1451 .Sp |
|
1452 .Vb 2 |
|
1453 \& template <typename Q> |
|
1454 \& void f(typename Q::X) {} |
|
1455 .Ve |
|
1456 .Vb 2 |
|
1457 \& template <template <typename> class Q> |
|
1458 \& void f(typename Q<int>::X) {} |
|
1459 .Ve |
|
1460 Instantiations of these templates may be mangled incorrectly. |
|
1461 .RE |
|
1462 .RS 4 |
|
1463 .RE |
|
1464 .Ip "\fB\-Wctor-dtor-privacy\fR (\*(C+ only)" 4 |
|
1465 .IX Item "-Wctor-dtor-privacy ( only)" |
|
1466 Warn when a class seems unusable because all the constructors or |
|
1467 destructors in that class are private, and it has neither friends nor |
|
1468 public static member functions. |
|
1469 .Ip "\fB\-Wnon-virtual-dtor\fR (\*(C+ only)" 4 |
|
1470 .IX Item "-Wnon-virtual-dtor ( only)" |
|
1471 Warn when a class appears to be polymorphic, thereby requiring a virtual |
|
1472 destructor, yet it declares a non-virtual one. |
|
1473 This warning is enabled by \fB\-Wall\fR. |
|
1474 .Ip "\fB\-Wreorder\fR (\*(C+ only)" 4 |
|
1475 .IX Item "-Wreorder ( only)" |
|
1476 Warn when the order of member initializers given in the code does not |
|
1477 match the order in which they must be executed. For instance: |
|
1478 .Sp |
|
1479 .Vb 5 |
|
1480 \& struct A { |
|
1481 \& int i; |
|
1482 \& int j; |
|
1483 \& A(): j (0), i (1) { } |
|
1484 \& }; |
|
1485 .Ve |
|
1486 The compiler will rearrange the member initializers for \fBi\fR |
|
1487 and \fBj\fR to match the declaration order of the members, emitting |
|
1488 a warning to that effect. This warning is enabled by \fB\-Wall\fR. |
|
1489 .PP |
|
1490 The following \fB\-W...\fR options are not affected by \fB\-Wall\fR. |
|
1491 .Ip "\fB\-Weffc++\fR (\*(C+ only)" 4 |
|
1492 .IX Item "-Weffc++ ( only)" |
|
1493 Warn about violations of the following style guidelines from Scott Meyers' |
|
1494 \&\fIEffective \*(C+\fR book: |
|
1495 .RS 4 |
|
1496 .Ip "\(bu" 4 |
|
1497 Item 11: Define a copy constructor and an assignment operator for classes |
|
1498 with dynamically allocated memory. |
|
1499 .Ip "\(bu" 4 |
|
1500 Item 12: Prefer initialization to assignment in constructors. |
|
1501 .Ip "\(bu" 4 |
|
1502 Item 14: Make destructors virtual in base classes. |
|
1503 .Ip "\(bu" 4 |
|
1504 Item 15: Have \f(CW\*(C`operator=\*(C'\fR return a reference to \f(CW\*(C`*this\*(C'\fR. |
|
1505 .Ip "\(bu" 4 |
|
1506 Item 23: Don't try to return a reference when you must return an object. |
|
1507 .RE |
|
1508 .RS 4 |
|
1509 .Sp |
|
1510 Also warn about violations of the following style guidelines from |
|
1511 Scott Meyers' \fIMore Effective \*(C+\fR book: |
|
1512 .RS 4 |
|
1513 .RE |
|
1514 .Ip "\(bu" 4 |
|
1515 Item 6: Distinguish between prefix and postfix forms of increment and |
|
1516 decrement operators. |
|
1517 .Ip "\(bu" 4 |
|
1518 Item 7: Never overload \f(CW\*(C`&&\*(C'\fR, \f(CW\*(C`||\*(C'\fR, or \f(CW\*(C`,\*(C'\fR. |
|
1519 .RE |
|
1520 .RS 4 |
|
1521 .Sp |
|
1522 When selecting this option, be aware that the standard library |
|
1523 headers do not obey all of these guidelines; use \fBgrep \-v\fR |
|
1524 to filter out those warnings. |
|
1525 .RE |
|
1526 .Ip "\fB\-Wno-deprecated\fR (\*(C+ only)" 4 |
|
1527 .IX Item "-Wno-deprecated ( only)" |
|
1528 Do not warn about usage of deprecated features. |
|
1529 .Ip "\fB\-Wno-non-template-friend\fR (\*(C+ only)" 4 |
|
1530 .IX Item "-Wno-non-template-friend ( only)" |
|
1531 Disable warnings when non-templatized friend functions are declared |
|
1532 within a template. Since the advent of explicit template specification |
|
1533 support in G++, if the name of the friend is an unqualified-id (i.e., |
|
1534 \&\fBfriend foo(int)\fR), the \*(C+ language specification demands that the |
|
1535 friend declare or define an ordinary, nontemplate function. (Section |
|
1536 14.5.3). Before G++ implemented explicit specification, unqualified-ids |
|
1537 could be interpreted as a particular specialization of a templatized |
|
1538 function. Because this non-conforming behavior is no longer the default |
|
1539 behavior for G++, \fB\-Wnon-template-friend\fR allows the compiler to |
|
1540 check existing code for potential trouble spots and is on by default. |
|
1541 This new compiler behavior can be turned off with |
|
1542 \&\fB\-Wno-non-template-friend\fR which keeps the conformant compiler code |
|
1543 but disables the helpful warning. |
|
1544 .Ip "\fB\-Wold-style-cast\fR (\*(C+ only)" 4 |
|
1545 .IX Item "-Wold-style-cast ( only)" |
|
1546 Warn if an old-style (C-style) cast to a non-void type is used within |
|
1547 a \*(C+ program. The new-style casts (\fBstatic_cast\fR, |
|
1548 \&\fBreinterpret_cast\fR, and \fBconst_cast\fR) are less vulnerable to |
|
1549 unintended effects and much easier to search for. |
|
1550 .Ip "\fB\-Woverloaded-virtual\fR (\*(C+ only)" 4 |
|
1551 .IX Item "-Woverloaded-virtual ( only)" |
|
1552 Warn when a function declaration hides virtual functions from a |
|
1553 base class. For example, in: |
|
1554 .Sp |
|
1555 .Vb 3 |
|
1556 \& struct A { |
|
1557 \& virtual void f(); |
|
1558 \& }; |
|
1559 .Ve |
|
1560 .Vb 3 |
|
1561 \& struct B: public A { |
|
1562 \& void f(int); |
|
1563 \& }; |
|
1564 .Ve |
|
1565 the \f(CW\*(C`A\*(C'\fR class version of \f(CW\*(C`f\*(C'\fR is hidden in \f(CW\*(C`B\*(C'\fR, and code |
|
1566 like: |
|
1567 .Sp |
|
1568 .Vb 2 |
|
1569 \& B* b; |
|
1570 \& b->f(); |
|
1571 .Ve |
|
1572 will fail to compile. |
|
1573 .Ip "\fB\-Wno-pmf-conversions\fR (\*(C+ only)" 4 |
|
1574 .IX Item "-Wno-pmf-conversions ( only)" |
|
1575 Disable the diagnostic for converting a bound pointer to member function |
|
1576 to a plain pointer. |
|
1577 .Ip "\fB\-Wsign-promo\fR (\*(C+ only)" 4 |
|
1578 .IX Item "-Wsign-promo ( only)" |
|
1579 Warn when overload resolution chooses a promotion from unsigned or |
|
1580 enumerated type to a signed type, over a conversion to an unsigned type of |
|
1581 the same size. Previous versions of G++ would try to preserve |
|
1582 unsignedness, but the standard mandates the current behavior. |
|
1583 .Sp |
|
1584 .Vb 4 |
|
1585 \& struct A { |
|
1586 \& operator int (); |
|
1587 \& A& operator = (int); |
|
1588 \& }; |
|
1589 .Ve |
|
1590 .Vb 5 |
|
1591 \& main () |
|
1592 \& { |
|
1593 \& A a,b; |
|
1594 \& a = b; |
|
1595 \& } |
|
1596 .Ve |
|
1597 In this example, G++ will synthesize a default \fBA& operator = |
|
1598 (const A&);\fR, while cfront will use the user-defined \fBoperator =\fR. |
|
1599 .Sh "Options Controlling Objective-C Dialect" |
|
1600 .IX Subsection "Options Controlling Objective-C Dialect" |
|
1601 (\s-1NOTE:\s0 This manual does not describe the Objective-C language itself. See |
|
1602 <\fBhttp://gcc.gnu.org/readings.html\fR> for references.) |
|
1603 .PP |
|
1604 This section describes the command-line options that are only meaningful |
|
1605 for Objective-C programs, but you can also use most of the \s-1GNU\s0 compiler |
|
1606 options regardless of what language your program is in. For example, |
|
1607 you might compile a file \f(CW\*(C`some_class.m\*(C'\fR like this: |
|
1608 .PP |
|
1609 .Vb 1 |
|
1610 \& gcc -g -fgnu-runtime -O -c some_class.m |
|
1611 .Ve |
|
1612 In this example, \fB\-fgnu-runtime\fR is an option meant only for |
|
1613 Objective-C programs; you can use the other options with any language |
|
1614 supported by \s-1GCC\s0. |
|
1615 .PP |
|
1616 Here is a list of options that are \fIonly\fR for compiling Objective-C |
|
1617 programs: |
|
1618 .Ip "\fB\-fconstant-string-class=\fR\fIclass-name\fR" 4 |
|
1619 .IX Item "-fconstant-string-class=class-name" |
|
1620 Use \fIclass-name\fR as the name of the class to instantiate for each |
|
1621 literal string specified with the syntax \f(CW\*(C`@"..."\*(C'\fR. The default |
|
1622 class name is \f(CW\*(C`NXConstantString\*(C'\fR if the \s-1GNU\s0 runtime is being used, and |
|
1623 \&\f(CW\*(C`NSConstantString\*(C'\fR if the NeXT runtime is being used (see below). The |
|
1624 \&\fB\-fconstant-cfstrings\fR option, if also present, will override the |
|
1625 \&\fB\-fconstant-string-class\fR setting and cause \f(CW\*(C`@"..."\*(C'\fR literals |
|
1626 to be laid out as constant CoreFoundation strings. |
|
1627 .Ip "\fB\-fgnu-runtime\fR" 4 |
|
1628 .IX Item "-fgnu-runtime" |
|
1629 Generate object code compatible with the standard \s-1GNU\s0 Objective-C |
|
1630 runtime. This is the default for most types of systems. |
|
1631 .Ip "\fB\-fnext-runtime\fR" 4 |
|
1632 .IX Item "-fnext-runtime" |
|
1633 Generate output compatible with the NeXT runtime. This is the default |
|
1634 for NeXT-based systems, including Darwin and Mac \s-1OS\s0 X. The macro |
|
1635 \&\f(CW\*(C`_\|_NEXT_RUNTIME_\|_\*(C'\fR is predefined if (and only if) this option is |
|
1636 used. |
|
1637 .Ip "\fB\-fno-nil-receivers\fR" 4 |
|
1638 .IX Item "-fno-nil-receivers" |
|
1639 Assume that all Objective-C message dispatches (e.g., |
|
1640 \&\f(CW\*(C`[receiver message:arg]\*(C'\fR) in this translation unit ensure that the receiver |
|
1641 is not \f(CW\*(C`nil\*(C'\fR. This allows for more efficient entry points in the runtime to be |
|
1642 used. Currently, this option is only available in conjunction with |
|
1643 the NeXT runtime on Mac \s-1OS\s0 X 10.3 and later. |
|
1644 .Ip "\fB\-fobjc-exceptions\fR" 4 |
|
1645 .IX Item "-fobjc-exceptions" |
|
1646 Enable syntactic support for structured exception handling in Objective-C, |
|
1647 similar to what is offered by \*(C+ and Java. Currently, this option is only |
|
1648 available in conjunction with the NeXT runtime on Mac \s-1OS\s0 X 10.3 and later. |
|
1649 .Sp |
|
1650 .Vb 23 |
|
1651 \& @try { |
|
1652 \& ... |
|
1653 \& @throw expr; |
|
1654 \& ... |
|
1655 \& } |
|
1656 \& @catch (AnObjCClass *exc) { |
|
1657 \& ... |
|
1658 \& @throw expr; |
|
1659 \& ... |
|
1660 \& @throw; |
|
1661 \& ... |
|
1662 \& } |
|
1663 \& @catch (AnotherClass *exc) { |
|
1664 \& ... |
|
1665 \& } |
|
1666 \& @catch (id allOthers) { |
|
1667 \& ... |
|
1668 \& } |
|
1669 \& @finally { |
|
1670 \& ... |
|
1671 \& @throw expr; |
|
1672 \& ... |
|
1673 \& } |
|
1674 .Ve |
|
1675 The \f(CW\*(C`@throw\*(C'\fR statement may appear anywhere in an Objective-C or |
|
1676 Objective-\*(C+ program; when used inside of a \f(CW\*(C`@catch\*(C'\fR block, the |
|
1677 \&\f(CW\*(C`@throw\*(C'\fR may appear without an argument (as shown above), in which case |
|
1678 the object caught by the \f(CW\*(C`@catch\*(C'\fR will be rethrown. |
|
1679 .Sp |
|
1680 Note that only (pointers to) Objective-C objects may be thrown and |
|
1681 caught using this scheme. When an object is thrown, it will be caught |
|
1682 by the nearest \f(CW\*(C`@catch\*(C'\fR clause capable of handling objects of that type, |
|
1683 analogously to how \f(CW\*(C`catch\*(C'\fR blocks work in \*(C+ and Java. A |
|
1684 \&\f(CW\*(C`@catch(id ...)\*(C'\fR clause (as shown above) may also be provided to catch |
|
1685 any and all Objective-C exceptions not caught by previous \f(CW\*(C`@catch\*(C'\fR |
|
1686 clauses (if any). |
|
1687 .Sp |
|
1688 The \f(CW\*(C`@finally\*(C'\fR clause, if present, will be executed upon exit from the |
|
1689 immediately preceding \f(CW\*(C`@try ... @catch\*(C'\fR section. This will happen |
|
1690 regardless of whether any exceptions are thrown, caught or rethrown |
|
1691 inside the \f(CW\*(C`@try ... @catch\*(C'\fR section, analogously to the behavior |
|
1692 of the \f(CW\*(C`finally\*(C'\fR clause in Java. |
|
1693 .Sp |
|
1694 There are several caveats to using the new exception mechanism: |
|
1695 .RS 4 |
|
1696 .Ip "\(bu" 4 |
|
1697 Although currently designed to be binary compatible with \f(CW\*(C`NS_HANDLER\*(C'\fR\-style |
|
1698 idioms provided by the \f(CW\*(C`NSException\*(C'\fR class, the new |
|
1699 exceptions can only be used on Mac \s-1OS\s0 X 10.3 (Panther) and later |
|
1700 systems, due to additional functionality needed in the (NeXT) Objective-C |
|
1701 runtime. |
|
1702 .Ip "\(bu" 4 |
|
1703 As mentioned above, the new exceptions do not support handling |
|
1704 types other than Objective-C objects. Furthermore, when used from |
|
1705 Objective-\*(C+, the Objective-C exception model does not interoperate with \*(C+ |
|
1706 exceptions at this time. This means you cannot \f(CW\*(C`@throw\*(C'\fR an exception |
|
1707 from Objective-C and \f(CW\*(C`catch\*(C'\fR it in \*(C+, or vice versa |
|
1708 (i.e., \f(CW\*(C`throw ... @catch\*(C'\fR). |
|
1709 .RE |
|
1710 .RS 4 |
|
1711 .Sp |
|
1712 The \fB\-fobjc-exceptions\fR switch also enables the use of synchronization |
|
1713 blocks for thread-safe execution: |
|
1714 .Sp |
|
1715 .Vb 3 |
|
1716 \& @synchronized (ObjCClass *guard) { |
|
1717 \& ... |
|
1718 \& } |
|
1719 .Ve |
|
1720 Upon entering the \f(CW\*(C`@synchronized\*(C'\fR block, a thread of execution shall |
|
1721 first check whether a lock has been placed on the corresponding \f(CW\*(C`guard\*(C'\fR |
|
1722 object by another thread. If it has, the current thread shall wait until |
|
1723 the other thread relinquishes its lock. Once \f(CW\*(C`guard\*(C'\fR becomes available, |
|
1724 the current thread will place its own lock on it, execute the code contained in |
|
1725 the \f(CW\*(C`@synchronized\*(C'\fR block, and finally relinquish the lock (thereby |
|
1726 making \f(CW\*(C`guard\*(C'\fR available to other threads). |
|
1727 .Sp |
|
1728 Unlike Java, Objective-C does not allow for entire methods to be marked |
|
1729 \&\f(CW\*(C`@synchronized\*(C'\fR. Note that throwing exceptions out of |
|
1730 \&\f(CW\*(C`@synchronized\*(C'\fR blocks is allowed, and will cause the guarding object |
|
1731 to be unlocked properly. |
|
1732 .RE |
|
1733 .Ip "\fB\-freplace-objc-classes\fR" 4 |
|
1734 .IX Item "-freplace-objc-classes" |
|
1735 Emit a special marker instructing \fB\f(BIld\fB\|(1)\fR not to statically link in |
|
1736 the resulting object file, and allow \fB\f(BIdyld\fB\|(1)\fR to load it in at |
|
1737 run time instead. This is used in conjunction with the Fix-and-Continue |
|
1738 debugging mode, where the object file in question may be recompiled and |
|
1739 dynamically reloaded in the course of program execution, without the need |
|
1740 to restart the program itself. Currently, Fix-and-Continue functionality |
|
1741 is only available in conjunction with the NeXT runtime on Mac \s-1OS\s0 X 10.3 |
|
1742 and later. |
|
1743 .Ip "\fB\-fzero-link\fR" 4 |
|
1744 .IX Item "-fzero-link" |
|
1745 When compiling for the NeXT runtime, the compiler ordinarily replaces calls |
|
1746 to \f(CW\*(C`objc_getClass("...")\*(C'\fR (when the name of the class is known at |
|
1747 compile time) with static class references that get initialized at load time, |
|
1748 which improves run-time performance. Specifying the \fB\-fzero-link\fR flag |
|
1749 suppresses this behavior and causes calls to \f(CW\*(C`objc_getClass("...")\*(C'\fR |
|
1750 to be retained. This is useful in Zero-Link debugging mode, since it allows |
|
1751 for individual class implementations to be modified during program execution. |
|
1752 .Ip "\fB\-gen-decls\fR" 4 |
|
1753 .IX Item "-gen-decls" |
|
1754 Dump interface declarations for all classes seen in the source file to a |
|
1755 file named \fI\fIsourcename\fI.decl\fR. |
|
1756 .Ip "\fB\-Wno-protocol\fR" 4 |
|
1757 .IX Item "-Wno-protocol" |
|
1758 If a class is declared to implement a protocol, a warning is issued for |
|
1759 every method in the protocol that is not implemented by the class. The |
|
1760 default behavior is to issue a warning for every method not explicitly |
|
1761 implemented in the class, even if a method implementation is inherited |
|
1762 from the superclass. If you use the \f(CW\*(C`\-Wno\-protocol\*(C'\fR option, then |
|
1763 methods inherited from the superclass are considered to be implemented, |
|
1764 and no warning is issued for them. |
|
1765 .Ip "\fB\-Wselector\fR" 4 |
|
1766 .IX Item "-Wselector" |
|
1767 Warn if multiple methods of different types for the same selector are |
|
1768 found during compilation. The check is performed on the list of methods |
|
1769 in the final stage of compilation. Additionally, a check is performed |
|
1770 for each selector appearing in a \f(CW\*(C`@selector(...)\*(C'\fR |
|
1771 expression, and a corresponding method for that selector has been found |
|
1772 during compilation. Because these checks scan the method table only at |
|
1773 the end of compilation, these warnings are not produced if the final |
|
1774 stage of compilation is not reached, for example because an error is |
|
1775 found during compilation, or because the \f(CW\*(C`\-fsyntax\-only\*(C'\fR option is |
|
1776 being used. |
|
1777 .Ip "\fB\-Wundeclared-selector\fR" 4 |
|
1778 .IX Item "-Wundeclared-selector" |
|
1779 Warn if a \f(CW\*(C`@selector(...)\*(C'\fR expression referring to an |
|
1780 undeclared selector is found. A selector is considered undeclared if no |
|
1781 method with that name has been declared before the |
|
1782 \&\f(CW\*(C`@selector(...)\*(C'\fR expression, either explicitly in an |
|
1783 \&\f(CW\*(C`@interface\*(C'\fR or \f(CW\*(C`@protocol\*(C'\fR declaration, or implicitly in |
|
1784 an \f(CW\*(C`@implementation\*(C'\fR section. This option always performs its |
|
1785 checks as soon as a \f(CW\*(C`@selector(...)\*(C'\fR expression is found, |
|
1786 while \f(CW\*(C`\-Wselector\*(C'\fR only performs its checks in the final stage of |
|
1787 compilation. This also enforces the coding style convention |
|
1788 that methods and selectors must be declared before being used. |
|
1789 .Ip "\fB\-print-objc-runtime-info\fR" 4 |
|
1790 .IX Item "-print-objc-runtime-info" |
|
1791 Generate C header describing the largest structure that is passed by |
|
1792 value, if any. |
|
1793 .Sh "Options to Control Diagnostic Messages Formatting" |
|
1794 .IX Subsection "Options to Control Diagnostic Messages Formatting" |
|
1795 Traditionally, diagnostic messages have been formatted irrespective of |
|
1796 the output device's aspect (e.g. its width, ...). The options described |
|
1797 below can be used to control the diagnostic messages formatting |
|
1798 algorithm, e.g. how many characters per line, how often source location |
|
1799 information should be reported. Right now, only the \*(C+ front end can |
|
1800 honor these options. However it is expected, in the near future, that |
|
1801 the remaining front ends would be able to digest them correctly. |
|
1802 .Ip "\fB\-fmessage-length=\fR\fIn\fR" 4 |
|
1803 .IX Item "-fmessage-length=n" |
|
1804 Try to format error messages so that they fit on lines of about \fIn\fR |
|
1805 characters. The default is 72 characters for \fBg++\fR and 0 for the rest of |
|
1806 the front ends supported by \s-1GCC\s0. If \fIn\fR is zero, then no |
|
1807 line-wrapping will be done; each error message will appear on a single |
|
1808 line. |
|
1809 .Ip "\fB\-fdiagnostics-show-location=once\fR" 4 |
|
1810 .IX Item "-fdiagnostics-show-location=once" |
|
1811 Only meaningful in line-wrapping mode. Instructs the diagnostic messages |
|
1812 reporter to emit \fIonce\fR source location information; that is, in |
|
1813 case the message is too long to fit on a single physical line and has to |
|
1814 be wrapped, the source location won't be emitted (as prefix) again, |
|
1815 over and over, in subsequent continuation lines. This is the default |
|
1816 behavior. |
|
1817 .Ip "\fB\-fdiagnostics-show-location=every-line\fR" 4 |
|
1818 .IX Item "-fdiagnostics-show-location=every-line" |
|
1819 Only meaningful in line-wrapping mode. Instructs the diagnostic |
|
1820 messages reporter to emit the same source location information (as |
|
1821 prefix) for physical lines that result from the process of breaking |
|
1822 a message which is too long to fit on a single line. |
|
1823 .Sh "Options to Request or Suppress Warnings" |
|
1824 .IX Subsection "Options to Request or Suppress Warnings" |
|
1825 Warnings are diagnostic messages that report constructions which |
|
1826 are not inherently erroneous but which are risky or suggest there |
|
1827 may have been an error. |
|
1828 .PP |
|
1829 You can request many specific warnings with options beginning \fB\-W\fR, |
|
1830 for example \fB\-Wimplicit\fR to request warnings on implicit |
|
1831 declarations. Each of these specific warning options also has a |
|
1832 negative form beginning \fB\-Wno-\fR to turn off warnings; |
|
1833 for example, \fB\-Wno-implicit\fR. This manual lists only one of the |
|
1834 two forms, whichever is not the default. |
|
1835 .PP |
|
1836 The following options control the amount and kinds of warnings produced |
|
1837 by \s-1GCC\s0; for further, language-specific options also refer to |
|
1838 \&\fB\*(C+ Dialect Options\fR and \fBObjective-C Dialect Options\fR. |
|
1839 .Ip "\fB\-fsyntax-only\fR" 4 |
|
1840 .IX Item "-fsyntax-only" |
|
1841 Check the code for syntax errors, but don't do anything beyond that. |
|
1842 .Ip "\fB\-pedantic\fR" 4 |
|
1843 .IX Item "-pedantic" |
|
1844 Issue all the warnings demanded by strict \s-1ISO\s0 C and \s-1ISO\s0 \*(C+; |
|
1845 reject all programs that use forbidden extensions, and some other |
|
1846 programs that do not follow \s-1ISO\s0 C and \s-1ISO\s0 \*(C+. For \s-1ISO\s0 C, follows the |
|
1847 version of the \s-1ISO\s0 C standard specified by any \fB\-std\fR option used. |
|
1848 .Sp |
|
1849 Valid \s-1ISO\s0 C and \s-1ISO\s0 \*(C+ programs should compile properly with or without |
|
1850 this option (though a rare few will require \fB\-ansi\fR or a |
|
1851 \&\fB\-std\fR option specifying the required version of \s-1ISO\s0 C). However, |
|
1852 without this option, certain \s-1GNU\s0 extensions and traditional C and \*(C+ |
|
1853 features are supported as well. With this option, they are rejected. |
|
1854 .Sp |
|
1855 \&\fB\-pedantic\fR does not cause warning messages for use of the |
|
1856 alternate keywords whose names begin and end with \fB_\|_\fR. Pedantic |
|
1857 warnings are also disabled in the expression that follows |
|
1858 \&\f(CW\*(C`_\|_extension_\|_\*(C'\fR. However, only system header files should use |
|
1859 these escape routes; application programs should avoid them. |
|
1860 .Sp |
|
1861 Some users try to use \fB\-pedantic\fR to check programs for strict \s-1ISO\s0 |
|
1862 C conformance. They soon find that it does not do quite what they want: |
|
1863 it finds some non-ISO practices, but not all\-\-\-only those for which |
|
1864 \&\s-1ISO\s0 C \fIrequires\fR a diagnostic, and some others for which |
|
1865 diagnostics have been added. |
|
1866 .Sp |
|
1867 A feature to report any failure to conform to \s-1ISO\s0 C might be useful in |
|
1868 some instances, but would require considerable additional work and would |
|
1869 be quite different from \fB\-pedantic\fR. We don't have plans to |
|
1870 support such a feature in the near future. |
|
1871 .Sp |
|
1872 Where the standard specified with \fB\-std\fR represents a \s-1GNU\s0 |
|
1873 extended dialect of C, such as \fBgnu89\fR or \fBgnu99\fR, there is a |
|
1874 corresponding \fIbase standard\fR, the version of \s-1ISO\s0 C on which the \s-1GNU\s0 |
|
1875 extended dialect is based. Warnings from \fB\-pedantic\fR are given |
|
1876 where they are required by the base standard. (It would not make sense |
|
1877 for such warnings to be given only for features not in the specified \s-1GNU\s0 |
|
1878 C dialect, since by definition the \s-1GNU\s0 dialects of C include all |
|
1879 features the compiler supports with the given option, and there would be |
|
1880 nothing to warn about.) |
|
1881 .Ip "\fB\-pedantic-errors\fR" 4 |
|
1882 .IX Item "-pedantic-errors" |
|
1883 Like \fB\-pedantic\fR, except that errors are produced rather than |
|
1884 warnings. |
|
1885 .Ip "\fB\-w\fR" 4 |
|
1886 .IX Item "-w" |
|
1887 Inhibit all warning messages. |
|
1888 .Ip "\fB\-Wno-import\fR" 4 |
|
1889 .IX Item "-Wno-import" |
|
1890 Inhibit warning messages about the use of \fB#import\fR. |
|
1891 .Ip "\fB\-Wchar-subscripts\fR" 4 |
|
1892 .IX Item "-Wchar-subscripts" |
|
1893 Warn if an array subscript has type \f(CW\*(C`char\*(C'\fR. This is a common cause |
|
1894 of error, as programmers often forget that this type is signed on some |
|
1895 machines. |
|
1896 .Ip "\fB\-Wcomment\fR" 4 |
|
1897 .IX Item "-Wcomment" |
|
1898 Warn whenever a comment-start sequence \fB/*\fR appears in a \fB/*\fR |
|
1899 comment, or whenever a Backslash-Newline appears in a \fB//\fR comment. |
|
1900 .Ip "\fB\-Wformat\fR" 4 |
|
1901 .IX Item "-Wformat" |
|
1902 Check calls to \f(CW\*(C`printf\*(C'\fR and \f(CW\*(C`scanf\*(C'\fR, etc., to make sure that |
|
1903 the arguments supplied have types appropriate to the format string |
|
1904 specified, and that the conversions specified in the format string make |
|
1905 sense. This includes standard functions, and others specified by format |
|
1906 attributes, in the \f(CW\*(C`printf\*(C'\fR, |
|
1907 \&\f(CW\*(C`scanf\*(C'\fR, \f(CW\*(C`strftime\*(C'\fR and \f(CW\*(C`strfmon\*(C'\fR (an X/Open extension, |
|
1908 not in the C standard) families. |
|
1909 .Sp |
|
1910 The formats are checked against the format features supported by \s-1GNU\s0 |
|
1911 libc version 2.2. These include all \s-1ISO\s0 C90 and C99 features, as well |
|
1912 as features from the Single Unix Specification and some \s-1BSD\s0 and \s-1GNU\s0 |
|
1913 extensions. Other library implementations may not support all these |
|
1914 features; \s-1GCC\s0 does not support warning about features that go beyond a |
|
1915 particular library's limitations. However, if \fB\-pedantic\fR is used |
|
1916 with \fB\-Wformat\fR, warnings will be given about format features not |
|
1917 in the selected standard version (but not for \f(CW\*(C`strfmon\*(C'\fR formats, |
|
1918 since those are not in any version of the C standard). |
|
1919 .Sp |
|
1920 Since \fB\-Wformat\fR also checks for null format arguments for |
|
1921 several functions, \fB\-Wformat\fR also implies \fB\-Wnonnull\fR. |
|
1922 .Sp |
|
1923 \&\fB\-Wformat\fR is included in \fB\-Wall\fR. For more control over some |
|
1924 aspects of format checking, the options \fB\-Wformat-y2k\fR, |
|
1925 \&\fB\-Wno-format-extra-args\fR, \fB\-Wno-format-zero-length\fR, |
|
1926 \&\fB\-Wformat-nonliteral\fR, \fB\-Wformat-security\fR, and |
|
1927 \&\fB\-Wformat=2\fR are available, but are not included in \fB\-Wall\fR. |
|
1928 .Ip "\fB\-Wformat-y2k\fR" 4 |
|
1929 .IX Item "-Wformat-y2k" |
|
1930 If \fB\-Wformat\fR is specified, also warn about \f(CW\*(C`strftime\*(C'\fR |
|
1931 formats which may yield only a two-digit year. |
|
1932 .Ip "\fB\-Wno-format-extra-args\fR" 4 |
|
1933 .IX Item "-Wno-format-extra-args" |
|
1934 If \fB\-Wformat\fR is specified, do not warn about excess arguments to a |
|
1935 \&\f(CW\*(C`printf\*(C'\fR or \f(CW\*(C`scanf\*(C'\fR format function. The C standard specifies |
|
1936 that such arguments are ignored. |
|
1937 .Sp |
|
1938 Where the unused arguments lie between used arguments that are |
|
1939 specified with \fB$\fR operand number specifications, normally |
|
1940 warnings are still given, since the implementation could not know what |
|
1941 type to pass to \f(CW\*(C`va_arg\*(C'\fR to skip the unused arguments. However, |
|
1942 in the case of \f(CW\*(C`scanf\*(C'\fR formats, this option will suppress the |
|
1943 warning if the unused arguments are all pointers, since the Single |
|
1944 Unix Specification says that such unused arguments are allowed. |
|
1945 .Ip "\fB\-Wno-format-zero-length\fR" 4 |
|
1946 .IX Item "-Wno-format-zero-length" |
|
1947 If \fB\-Wformat\fR is specified, do not warn about zero-length formats. |
|
1948 The C standard specifies that zero-length formats are allowed. |
|
1949 .Ip "\fB\-Wformat-nonliteral\fR" 4 |
|
1950 .IX Item "-Wformat-nonliteral" |
|
1951 If \fB\-Wformat\fR is specified, also warn if the format string is not a |
|
1952 string literal and so cannot be checked, unless the format function |
|
1953 takes its format arguments as a \f(CW\*(C`va_list\*(C'\fR. |
|
1954 .Ip "\fB\-Wformat-security\fR" 4 |
|
1955 .IX Item "-Wformat-security" |
|
1956 If \fB\-Wformat\fR is specified, also warn about uses of format |
|
1957 functions that represent possible security problems. At present, this |
|
1958 warns about calls to \f(CW\*(C`printf\*(C'\fR and \f(CW\*(C`scanf\*(C'\fR functions where the |
|
1959 format string is not a string literal and there are no format arguments, |
|
1960 as in \f(CW\*(C`printf (foo);\*(C'\fR. This may be a security hole if the format |
|
1961 string came from untrusted input and contains \fB%n\fR. (This is |
|
1962 currently a subset of what \fB\-Wformat-nonliteral\fR warns about, but |
|
1963 in future warnings may be added to \fB\-Wformat-security\fR that are not |
|
1964 included in \fB\-Wformat-nonliteral\fR.) |
|
1965 .Ip "\fB\-Wformat=2\fR" 4 |
|
1966 .IX Item "-Wformat=2" |
|
1967 Enable \fB\-Wformat\fR plus format checks not included in |
|
1968 \&\fB\-Wformat\fR. Currently equivalent to \fB\-Wformat |
|
1969 \&\-Wformat-nonliteral \-Wformat-security \-Wformat-y2k\fR. |
|
1970 .Ip "\fB\-Wnonnull\fR" 4 |
|
1971 .IX Item "-Wnonnull" |
|
1972 Warn about passing a null pointer for arguments marked as |
|
1973 requiring a non-null value by the \f(CW\*(C`nonnull\*(C'\fR function attribute. |
|
1974 .Sp |
|
1975 \&\fB\-Wnonnull\fR is included in \fB\-Wall\fR and \fB\-Wformat\fR. It |
|
1976 can be disabled with the \fB\-Wno-nonnull\fR option. |
|
1977 .Ip "\fB\-Winit-self\fR (C, \*(C+, and Objective-C only)" 4 |
|
1978 .IX Item "-Winit-self (C, , and Objective-C only)" |
|
1979 Warn about uninitialized variables which are initialized with themselves. |
|
1980 Note this option can only be used with the \fB\-Wuninitialized\fR option, |
|
1981 which in turn only works with \fB\-O1\fR and above. |
|
1982 .Sp |
|
1983 For example, \s-1GCC\s0 will warn about \f(CW\*(C`i\*(C'\fR being uninitialized in the |
|
1984 following snippet only when \fB\-Winit-self\fR has been specified: |
|
1985 .Sp |
|
1986 .Vb 5 |
|
1987 \& int f() |
|
1988 \& { |
|
1989 \& int i = i; |
|
1990 \& return i; |
|
1991 \& } |
|
1992 .Ve |
|
1993 .Ip "\fB\-Wimplicit-int\fR" 4 |
|
1994 .IX Item "-Wimplicit-int" |
|
1995 Warn when a declaration does not specify a type. |
|
1996 .Ip "\fB\-Wimplicit-function-declaration\fR" 4 |
|
1997 .IX Item "-Wimplicit-function-declaration" |
|
1998 .PD 0 |
|
1999 .Ip "\fB\-Werror-implicit-function-declaration\fR" 4 |
|
2000 .IX Item "-Werror-implicit-function-declaration" |
|
2001 .PD |
|
2002 Give a warning (or error) whenever a function is used before being |
|
2003 declared. |
|
2004 .Ip "\fB\-Wimplicit\fR" 4 |
|
2005 .IX Item "-Wimplicit" |
|
2006 Same as \fB\-Wimplicit-int\fR and \fB\-Wimplicit-function-declaration\fR. |
|
2007 .Ip "\fB\-Wmain\fR" 4 |
|
2008 .IX Item "-Wmain" |
|
2009 Warn if the type of \fBmain\fR is suspicious. \fBmain\fR should be a |
|
2010 function with external linkage, returning int, taking either zero |
|
2011 arguments, two, or three arguments of appropriate types. |
|
2012 .Ip "\fB\-Wmissing-braces\fR" 4 |
|
2013 .IX Item "-Wmissing-braces" |
|
2014 Warn if an aggregate or union initializer is not fully bracketed. In |
|
2015 the following example, the initializer for \fBa\fR is not fully |
|
2016 bracketed, but that for \fBb\fR is fully bracketed. |
|
2017 .Sp |
|
2018 .Vb 2 |
|
2019 \& int a[2][2] = { 0, 1, 2, 3 }; |
|
2020 \& int b[2][2] = { { 0, 1 }, { 2, 3 } }; |
|
2021 .Ve |
|
2022 .Ip "\fB\-Wparentheses\fR" 4 |
|
2023 .IX Item "-Wparentheses" |
|
2024 Warn if parentheses are omitted in certain contexts, such |
|
2025 as when there is an assignment in a context where a truth value |
|
2026 is expected, or when operators are nested whose precedence people |
|
2027 often get confused about. |
|
2028 .Sp |
|
2029 Also warn about constructions where there may be confusion to which |
|
2030 \&\f(CW\*(C`if\*(C'\fR statement an \f(CW\*(C`else\*(C'\fR branch belongs. Here is an example of |
|
2031 such a case: |
|
2032 .Sp |
|
2033 .Vb 7 |
|
2034 \& { |
|
2035 \& if (a) |
|
2036 \& if (b) |
|
2037 \& foo (); |
|
2038 \& else |
|
2039 \& bar (); |
|
2040 \& } |
|
2041 .Ve |
|
2042 In C, every \f(CW\*(C`else\*(C'\fR branch belongs to the innermost possible \f(CW\*(C`if\*(C'\fR |
|
2043 statement, which in this example is \f(CW\*(C`if (b)\*(C'\fR. This is often not |
|
2044 what the programmer expected, as illustrated in the above example by |
|
2045 indentation the programmer chose. When there is the potential for this |
|
2046 confusion, \s-1GCC\s0 will issue a warning when this flag is specified. |
|
2047 To eliminate the warning, add explicit braces around the innermost |
|
2048 \&\f(CW\*(C`if\*(C'\fR statement so there is no way the \f(CW\*(C`else\*(C'\fR could belong to |
|
2049 the enclosing \f(CW\*(C`if\*(C'\fR. The resulting code would look like this: |
|
2050 .Sp |
|
2051 .Vb 9 |
|
2052 \& { |
|
2053 \& if (a) |
|
2054 \& { |
|
2055 \& if (b) |
|
2056 \& foo (); |
|
2057 \& else |
|
2058 \& bar (); |
|
2059 \& } |
|
2060 \& } |
|
2061 .Ve |
|
2062 .Ip "\fB\-Wsequence-point\fR" 4 |
|
2063 .IX Item "-Wsequence-point" |
|
2064 Warn about code that may have undefined semantics because of violations |
|
2065 of sequence point rules in the C standard. |
|
2066 .Sp |
|
2067 The C standard defines the order in which expressions in a C program are |
|
2068 evaluated in terms of \fIsequence points\fR, which represent a partial |
|
2069 ordering between the execution of parts of the program: those executed |
|
2070 before the sequence point, and those executed after it. These occur |
|
2071 after the evaluation of a full expression (one which is not part of a |
|
2072 larger expression), after the evaluation of the first operand of a |
|
2073 \&\f(CW\*(C`&&\*(C'\fR, \f(CW\*(C`||\*(C'\fR, \f(CW\*(C`? :\*(C'\fR or \f(CW\*(C`,\*(C'\fR (comma) operator, before a |
|
2074 function is called (but after the evaluation of its arguments and the |
|
2075 expression denoting the called function), and in certain other places. |
|
2076 Other than as expressed by the sequence point rules, the order of |
|
2077 evaluation of subexpressions of an expression is not specified. All |
|
2078 these rules describe only a partial order rather than a total order, |
|
2079 since, for example, if two functions are called within one expression |
|
2080 with no sequence point between them, the order in which the functions |
|
2081 are called is not specified. However, the standards committee have |
|
2082 ruled that function calls do not overlap. |
|
2083 .Sp |
|
2084 It is not specified when between sequence points modifications to the |
|
2085 values of objects take effect. Programs whose behavior depends on this |
|
2086 have undefined behavior; the C standard specifies that ``Between the |
|
2087 previous and next sequence point an object shall have its stored value |
|
2088 modified at most once by the evaluation of an expression. Furthermore, |
|
2089 the prior value shall be read only to determine the value to be |
|
2090 stored.''. If a program breaks these rules, the results on any |
|
2091 particular implementation are entirely unpredictable. |
|
2092 .Sp |
|
2093 Examples of code with undefined behavior are \f(CW\*(C`a = a++;\*(C'\fR, \f(CW\*(C`a[n] |
|
2094 = b[n++]\*(C'\fR and \f(CW\*(C`a[i++] = i;\*(C'\fR. Some more complicated cases are not |
|
2095 diagnosed by this option, and it may give an occasional false positive |
|
2096 result, but in general it has been found fairly effective at detecting |
|
2097 this sort of problem in programs. |
|
2098 .Sp |
|
2099 The present implementation of this option only works for C programs. A |
|
2100 future implementation may also work for \*(C+ programs. |
|
2101 .Sp |
|
2102 The C standard is worded confusingly, therefore there is some debate |
|
2103 over the precise meaning of the sequence point rules in subtle cases. |
|
2104 Links to discussions of the problem, including proposed formal |
|
2105 definitions, may be found on the \s-1GCC\s0 readings page, at |
|
2106 <\fBhttp://gcc.gnu.org/readings.html\fR>. |
|
2107 .Ip "\fB\-Wreturn-type\fR" 4 |
|
2108 .IX Item "-Wreturn-type" |
|
2109 Warn whenever a function is defined with a return-type that defaults to |
|
2110 \&\f(CW\*(C`int\*(C'\fR. Also warn about any \f(CW\*(C`return\*(C'\fR statement with no |
|
2111 return-value in a function whose return-type is not \f(CW\*(C`void\*(C'\fR. |
|
2112 .Sp |
|
2113 For \*(C+, a function without return type always produces a diagnostic |
|
2114 message, even when \fB\-Wno-return-type\fR is specified. The only |
|
2115 exceptions are \fBmain\fR and functions defined in system headers. |
|
2116 .Ip "\fB\-Wswitch\fR" 4 |
|
2117 .IX Item "-Wswitch" |
|
2118 Warn whenever a \f(CW\*(C`switch\*(C'\fR statement has an index of enumerated type |
|
2119 and lacks a \f(CW\*(C`case\*(C'\fR for one or more of the named codes of that |
|
2120 enumeration. (The presence of a \f(CW\*(C`default\*(C'\fR label prevents this |
|
2121 warning.) \f(CW\*(C`case\*(C'\fR labels outside the enumeration range also |
|
2122 provoke warnings when this option is used. |
|
2123 .Ip "\fB\-Wswitch-default\fR" 4 |
|
2124 .IX Item "-Wswitch-default" |
|
2125 Warn whenever a \f(CW\*(C`switch\*(C'\fR statement does not have a \f(CW\*(C`default\*(C'\fR |
|
2126 case. |
|
2127 .Ip "\fB\-Wswitch-enum\fR" 4 |
|
2128 .IX Item "-Wswitch-enum" |
|
2129 Warn whenever a \f(CW\*(C`switch\*(C'\fR statement has an index of enumerated type |
|
2130 and lacks a \f(CW\*(C`case\*(C'\fR for one or more of the named codes of that |
|
2131 enumeration. \f(CW\*(C`case\*(C'\fR labels outside the enumeration range also |
|
2132 provoke warnings when this option is used. |
|
2133 .Ip "\fB\-Wtrigraphs\fR" 4 |
|
2134 .IX Item "-Wtrigraphs" |
|
2135 Warn if any trigraphs are encountered that might change the meaning of |
|
2136 the program (trigraphs within comments are not warned about). |
|
2137 .Ip "\fB\-Wunused-function\fR" 4 |
|
2138 .IX Item "-Wunused-function" |
|
2139 Warn whenever a static function is declared but not defined or a |
|
2140 non\e-inline static function is unused. |
|
2141 .Ip "\fB\-Wunused-label\fR" 4 |
|
2142 .IX Item "-Wunused-label" |
|
2143 Warn whenever a label is declared but not used. |
|
2144 .Sp |
|
2145 To suppress this warning use the \fBunused\fR attribute. |
|
2146 .Ip "\fB\-Wunused-parameter\fR" 4 |
|
2147 .IX Item "-Wunused-parameter" |
|
2148 Warn whenever a function parameter is unused aside from its declaration. |
|
2149 .Sp |
|
2150 To suppress this warning use the \fBunused\fR attribute. |
|
2151 .Ip "\fB\-Wunused-variable\fR" 4 |
|
2152 .IX Item "-Wunused-variable" |
|
2153 Warn whenever a local variable or non-constant static variable is unused |
|
2154 aside from its declaration |
|
2155 .Sp |
|
2156 To suppress this warning use the \fBunused\fR attribute. |
|
2157 .Ip "\fB\-Wunused-value\fR" 4 |
|
2158 .IX Item "-Wunused-value" |
|
2159 Warn whenever a statement computes a result that is explicitly not used. |
|
2160 .Sp |
|
2161 To suppress this warning cast the expression to \fBvoid\fR. |
|
2162 .Ip "\fB\-Wunused\fR" 4 |
|
2163 .IX Item "-Wunused" |
|
2164 All the above \fB\-Wunused\fR options combined. |
|
2165 .Sp |
|
2166 In order to get a warning about an unused function parameter, you must |
|
2167 either specify \fB\-Wextra \-Wunused\fR (note that \fB\-Wall\fR implies |
|
2168 \&\fB\-Wunused\fR), or separately specify \fB\-Wunused-parameter\fR. |
|
2169 .Ip "\fB\-Wuninitialized\fR" 4 |
|
2170 .IX Item "-Wuninitialized" |
|
2171 Warn if an automatic variable is used without first being initialized or |
|
2172 if a variable may be clobbered by a \f(CW\*(C`setjmp\*(C'\fR call. |
|
2173 .Sp |
|
2174 These warnings are possible only in optimizing compilation, |
|
2175 because they require data flow information that is computed only |
|
2176 when optimizing. If you don't specify \fB\-O\fR, you simply won't |
|
2177 get these warnings. |
|
2178 .Sp |
|
2179 If you want to warn about code which uses the uninitialized value of the |
|
2180 variable in its own initializer, use the \fB\-Winit-self\fR option. |
|
2181 .Sp |
|
2182 These warnings occur only for variables that are candidates for |
|
2183 register allocation. Therefore, they do not occur for a variable that |
|
2184 is declared \f(CW\*(C`volatile\*(C'\fR, or whose address is taken, or whose size |
|
2185 is other than 1, 2, 4 or 8 bytes. Also, they do not occur for |
|
2186 structures, unions or arrays, even when they are in registers. |
|
2187 .Sp |
|
2188 Note that there may be no warning about a variable that is used only |
|
2189 to compute a value that itself is never used, because such |
|
2190 computations may be deleted by data flow analysis before the warnings |
|
2191 are printed. |
|
2192 .Sp |
|
2193 These warnings are made optional because \s-1GCC\s0 is not smart |
|
2194 enough to see all the reasons why the code might be correct |
|
2195 despite appearing to have an error. Here is one example of how |
|
2196 this can happen: |
|
2197 .Sp |
|
2198 .Vb 12 |
|
2199 \& { |
|
2200 \& int x; |
|
2201 \& switch (y) |
|
2202 \& { |
|
2203 \& case 1: x = 1; |
|
2204 \& break; |
|
2205 \& case 2: x = 4; |
|
2206 \& break; |
|
2207 \& case 3: x = 5; |
|
2208 \& } |
|
2209 \& foo (x); |
|
2210 \& } |
|
2211 .Ve |
|
2212 If the value of \f(CW\*(C`y\*(C'\fR is always 1, 2 or 3, then \f(CW\*(C`x\*(C'\fR is |
|
2213 always initialized, but \s-1GCC\s0 doesn't know this. Here is |
|
2214 another common case: |
|
2215 .Sp |
|
2216 .Vb 6 |
|
2217 \& { |
|
2218 \& int save_y; |
|
2219 \& if (change_y) save_y = y, y = new_y; |
|
2220 \& ... |
|
2221 \& if (change_y) y = save_y; |
|
2222 \& } |
|
2223 .Ve |
|
2224 This has no bug because \f(CW\*(C`save_y\*(C'\fR is used only if it is set. |
|
2225 .Sp |
|
2226 This option also warns when a non-volatile automatic variable might be |
|
2227 changed by a call to \f(CW\*(C`longjmp\*(C'\fR. These warnings as well are possible |
|
2228 only in optimizing compilation. |
|
2229 .Sp |
|
2230 The compiler sees only the calls to \f(CW\*(C`setjmp\*(C'\fR. It cannot know |
|
2231 where \f(CW\*(C`longjmp\*(C'\fR will be called; in fact, a signal handler could |
|
2232 call it at any point in the code. As a result, you may get a warning |
|
2233 even when there is in fact no problem because \f(CW\*(C`longjmp\*(C'\fR cannot |
|
2234 in fact be called at the place which would cause a problem. |
|
2235 .Sp |
|
2236 Some spurious warnings can be avoided if you declare all the functions |
|
2237 you use that never return as \f(CW\*(C`noreturn\*(C'\fR. |
|
2238 .Ip "\fB\-Wunknown-pragmas\fR" 4 |
|
2239 .IX Item "-Wunknown-pragmas" |
|
2240 Warn when a #pragma directive is encountered which is not understood by |
|
2241 \&\s-1GCC\s0. If this command line option is used, warnings will even be issued |
|
2242 for unknown pragmas in system header files. This is not the case if |
|
2243 the warnings were only enabled by the \fB\-Wall\fR command line option. |
|
2244 .Ip "\fB\-Wstrict-aliasing\fR" 4 |
|
2245 .IX Item "-Wstrict-aliasing" |
|
2246 This option is only active when \fB\-fstrict-aliasing\fR is active. |
|
2247 It warns about code which might break the strict aliasing rules that the |
|
2248 compiler is using for optimization. The warning does not catch all |
|
2249 cases, but does attempt to catch the more common pitfalls. It is |
|
2250 included in \fB\-Wall\fR. |
|
2251 .Ip "\fB\-Wall\fR" 4 |
|
2252 .IX Item "-Wall" |
|
2253 All of the above \fB\-W\fR options combined. This enables all the |
|
2254 warnings about constructions that some users consider questionable, and |
|
2255 that are easy to avoid (or modify to prevent the warning), even in |
|
2256 conjunction with macros. This also enables some language-specific |
|
2257 warnings described in \fB\*(C+ Dialect Options\fR and |
|
2258 \&\fBObjective-C Dialect Options\fR. |
|
2259 .PP |
|
2260 The following \fB\-W...\fR options are not implied by \fB\-Wall\fR. |
|
2261 Some of them warn about constructions that users generally do not |
|
2262 consider questionable, but which occasionally you might wish to check |
|
2263 for; others warn about constructions that are necessary or hard to avoid |
|
2264 in some cases, and there is no simple way to modify the code to suppress |
|
2265 the warning. |
|
2266 .Ip "\fB\-Wextra\fR" 4 |
|
2267 .IX Item "-Wextra" |
|
2268 (This option used to be called \fB\-W\fR. The older name is still |
|
2269 supported, but the newer name is more descriptive.) Print extra warning |
|
2270 messages for these events: |
|
2271 .RS 4 |
|
2272 .Ip "\(bu" 4 |
|
2273 A function can return either with or without a value. (Falling |
|
2274 off the end of the function body is considered returning without |
|
2275 a value.) For example, this function would evoke such a |
|
2276 warning: |
|
2277 .Sp |
|
2278 .Vb 5 |
|
2279 \& foo (a) |
|
2280 \& { |
|
2281 \& if (a > 0) |
|
2282 \& return a; |
|
2283 \& } |
|
2284 .Ve |
|
2285 .Ip "\(bu" 4 |
|
2286 An expression-statement or the left-hand side of a comma expression |
|
2287 contains no side effects. |
|
2288 To suppress the warning, cast the unused expression to void. |
|
2289 For example, an expression such as \fBx[i,j]\fR will cause a warning, |
|
2290 but \fBx[(void)i,j]\fR will not. |
|
2291 .Ip "\(bu" 4 |
|
2292 An unsigned value is compared against zero with \fB<\fR or \fB>=\fR. |
|
2293 .Ip "\(bu" 4 |
|
2294 A comparison like \fBx<=y<=z\fR appears; this is equivalent to |
|
2295 \&\fB(x<=y ? 1 : 0) <= z\fR, which is a different interpretation from |
|
2296 that of ordinary mathematical notation. |
|
2297 .Ip "\(bu" 4 |
|
2298 Storage-class specifiers like \f(CW\*(C`static\*(C'\fR are not the first things in |
|
2299 a declaration. According to the C Standard, this usage is obsolescent. |
|
2300 .Ip "\(bu" 4 |
|
2301 The return type of a function has a type qualifier such as \f(CW\*(C`const\*(C'\fR. |
|
2302 Such a type qualifier has no effect, since the value returned by a |
|
2303 function is not an lvalue. (But don't warn about the \s-1GNU\s0 extension of |
|
2304 \&\f(CW\*(C`volatile void\*(C'\fR return types. That extension will be warned about |
|
2305 if \fB\-pedantic\fR is specified.) |
|
2306 .Ip "\(bu" 4 |
|
2307 If \fB\-Wall\fR or \fB\-Wunused\fR is also specified, warn about unused |
|
2308 arguments. |
|
2309 .Ip "\(bu" 4 |
|
2310 A comparison between signed and unsigned values could produce an |
|
2311 incorrect result when the signed value is converted to unsigned. |
|
2312 (But don't warn if \fB\-Wno-sign-compare\fR is also specified.) |
|
2313 .Ip "\(bu" 4 |
|
2314 An aggregate has an initializer which does not initialize all members. |
|
2315 For example, the following code would cause such a warning, because |
|
2316 \&\f(CW\*(C`x.h\*(C'\fR would be implicitly initialized to zero: |
|
2317 .Sp |
|
2318 .Vb 2 |
|
2319 \& struct s { int f, g, h; }; |
|
2320 \& struct s x = { 3, 4 }; |
|
2321 .Ve |
|
2322 .Ip "\(bu" 4 |
|
2323 A function parameter is declared without a type specifier in K&R-style |
|
2324 functions: |
|
2325 .Sp |
|
2326 .Vb 1 |
|
2327 \& void foo(bar) { } |
|
2328 .Ve |
|
2329 .Ip "\(bu" 4 |
|
2330 An empty body occurs in an \fBif\fR or \fBelse\fR statement. |
|
2331 .Ip "\(bu" 4 |
|
2332 A pointer is compared against integer zero with \fB<\fR, \fB<=\fR, |
|
2333 \&\fB>\fR, or \fB>=\fR. |
|
2334 .Ip "\(bu" 4 |
|
2335 A variable might be changed by \fBlongjmp\fR or \fBvfork\fR. |
|
2336 .Ip "\(bu" 4 |
|
2337 Any of several floating-point events that often indicate errors, such as |
|
2338 overflow, underflow, loss of precision, etc. |
|
2339 .Ip "*<(\*(C+ only)>" 4 |
|
2340 .IX Item "*<( only)>" |
|
2341 An enumerator and a non-enumerator both appear in a conditional expression. |
|
2342 .Ip "*<(\*(C+ only)>" 4 |
|
2343 .IX Item "*<( only)>" |
|
2344 A non-static reference or non-static \fBconst\fR member appears in a |
|
2345 class without constructors. |
|
2346 .Ip "*<(\*(C+ only)>" 4 |
|
2347 .IX Item "*<( only)>" |
|
2348 Ambiguous virtual bases. |
|
2349 .Ip "*<(\*(C+ only)>" 4 |
|
2350 .IX Item "*<( only)>" |
|
2351 Subscripting an array which has been declared \fBregister\fR. |
|
2352 .Ip "*<(\*(C+ only)>" 4 |
|
2353 .IX Item "*<( only)>" |
|
2354 Taking the address of a variable which has been declared \fBregister\fR. |
|
2355 .Ip "*<(\*(C+ only)>" 4 |
|
2356 .IX Item "*<( only)>" |
|
2357 A base class is not initialized in a derived class' copy constructor. |
|
2358 .RE |
|
2359 .RS 4 |
|
2360 .RE |
|
2361 .Ip "\fB\-Wno-div-by-zero\fR" 4 |
|
2362 .IX Item "-Wno-div-by-zero" |
|
2363 Do not warn about compile-time integer division by zero. Floating point |
|
2364 division by zero is not warned about, as it can be a legitimate way of |
|
2365 obtaining infinities and NaNs. |
|
2366 .Ip "\fB\-Wsystem-headers\fR" 4 |
|
2367 .IX Item "-Wsystem-headers" |
|
2368 Print warning messages for constructs found in system header files. |
|
2369 Warnings from system headers are normally suppressed, on the assumption |
|
2370 that they usually do not indicate real problems and would only make the |
|
2371 compiler output harder to read. Using this command line option tells |
|
2372 \&\s-1GCC\s0 to emit warnings from system headers as if they occurred in user |
|
2373 code. However, note that using \fB\-Wall\fR in conjunction with this |
|
2374 option will \fInot\fR warn about unknown pragmas in system |
|
2375 headers\-\-\-for that, \fB\-Wunknown-pragmas\fR must also be used. |
|
2376 .Ip "\fB\-Wfloat-equal\fR" 4 |
|
2377 .IX Item "-Wfloat-equal" |
|
2378 Warn if floating point values are used in equality comparisons. |
|
2379 .Sp |
|
2380 The idea behind this is that sometimes it is convenient (for the |
|
2381 programmer) to consider floating-point values as approximations to |
|
2382 infinitely precise real numbers. If you are doing this, then you need |
|
2383 to compute (by analyzing the code, or in some other way) the maximum or |
|
2384 likely maximum error that the computation introduces, and allow for it |
|
2385 when performing comparisons (and when producing output, but that's a |
|
2386 different problem). In particular, instead of testing for equality, you |
|
2387 would check to see whether the two values have ranges that overlap; and |
|
2388 this is done with the relational operators, so equality comparisons are |
|
2389 probably mistaken. |
|
2390 .Ip "\fB\-Wtraditional\fR (C only)" 4 |
|
2391 .IX Item "-Wtraditional (C only)" |
|
2392 Warn about certain constructs that behave differently in traditional and |
|
2393 \&\s-1ISO\s0 C. Also warn about \s-1ISO\s0 C constructs that have no traditional C |
|
2394 equivalent, and/or problematic constructs which should be avoided. |
|
2395 .RS 4 |
|
2396 .Ip "\(bu" 4 |
|
2397 Macro parameters that appear within string literals in the macro body. |
|
2398 In traditional C macro replacement takes place within string literals, |
|
2399 but does not in \s-1ISO\s0 C. |
|
2400 .Ip "\(bu" 4 |
|
2401 In traditional C, some preprocessor directives did not exist. |
|
2402 Traditional preprocessors would only consider a line to be a directive |
|
2403 if the \fB#\fR appeared in column 1 on the line. Therefore |
|
2404 \&\fB\-Wtraditional\fR warns about directives that traditional C |
|
2405 understands but would ignore because the \fB#\fR does not appear as the |
|
2406 first character on the line. It also suggests you hide directives like |
|
2407 \&\fB#pragma\fR not understood by traditional C by indenting them. Some |
|
2408 traditional implementations would not recognize \fB#elif\fR, so it |
|
2409 suggests avoiding it altogether. |
|
2410 .Ip "\(bu" 4 |
|
2411 A function-like macro that appears without arguments. |
|
2412 .Ip "\(bu" 4 |
|
2413 The unary plus operator. |
|
2414 .Ip "\(bu" 4 |
|
2415 The \fBU\fR integer constant suffix, or the \fBF\fR or \fBL\fR floating point |
|
2416 constant suffixes. (Traditional C does support the \fBL\fR suffix on integer |
|
2417 constants.) Note, these suffixes appear in macros defined in the system |
|
2418 headers of most modern systems, e.g. the \fB_MIN\fR/\fB_MAX\fR macros in \f(CW\*(C`<limits.h>\*(C'\fR. |
|
2419 Use of these macros in user code might normally lead to spurious |
|
2420 warnings, however \s-1GCC\s0's integrated preprocessor has enough context to |
|
2421 avoid warning in these cases. |
|
2422 .Ip "\(bu" 4 |
|
2423 A function declared external in one block and then used after the end of |
|
2424 the block. |
|
2425 .Ip "\(bu" 4 |
|
2426 A \f(CW\*(C`switch\*(C'\fR statement has an operand of type \f(CW\*(C`long\*(C'\fR. |
|
2427 .Ip "\(bu" 4 |
|
2428 A non-\f(CW\*(C`static\*(C'\fR function declaration follows a \f(CW\*(C`static\*(C'\fR one. |
|
2429 This construct is not accepted by some traditional C compilers. |
|
2430 .Ip "\(bu" 4 |
|
2431 The \s-1ISO\s0 type of an integer constant has a different width or |
|
2432 signedness from its traditional type. This warning is only issued if |
|
2433 the base of the constant is ten. I.e. hexadecimal or octal values, which |
|
2434 typically represent bit patterns, are not warned about. |
|
2435 .Ip "\(bu" 4 |
|
2436 Usage of \s-1ISO\s0 string concatenation is detected. |
|
2437 .Ip "\(bu" 4 |
|
2438 Initialization of automatic aggregates. |
|
2439 .Ip "\(bu" 4 |
|
2440 Identifier conflicts with labels. Traditional C lacks a separate |
|
2441 namespace for labels. |
|
2442 .Ip "\(bu" 4 |
|
2443 Initialization of unions. If the initializer is zero, the warning is |
|
2444 omitted. This is done under the assumption that the zero initializer in |
|
2445 user code appears conditioned on e.g. \f(CW\*(C`_\|_STDC_\|_\*(C'\fR to avoid missing |
|
2446 initializer warnings and relies on default initialization to zero in the |
|
2447 traditional C case. |
|
2448 .Ip "\(bu" 4 |
|
2449 Conversions by prototypes between fixed/floating point values and vice |
|
2450 versa. The absence of these prototypes when compiling with traditional |
|
2451 C would cause serious problems. This is a subset of the possible |
|
2452 conversion warnings, for the full set use \fB\-Wconversion\fR. |
|
2453 .Ip "\(bu" 4 |
|
2454 Use of \s-1ISO\s0 C style function definitions. This warning intentionally is |
|
2455 \&\fInot\fR issued for prototype declarations or variadic functions |
|
2456 because these \s-1ISO\s0 C features will appear in your code when using |
|
2457 libiberty's traditional C compatibility macros, \f(CW\*(C`PARAMS\*(C'\fR and |
|
2458 \&\f(CW\*(C`VPARAMS\*(C'\fR. This warning is also bypassed for nested functions |
|
2459 because that feature is already a \s-1GCC\s0 extension and thus not relevant to |
|
2460 traditional C compatibility. |
|
2461 .RE |
|
2462 .RS 4 |
|
2463 .RE |
|
2464 .Ip "\fB\-Wdeclaration-after-statement\fR (C only)" 4 |
|
2465 .IX Item "-Wdeclaration-after-statement (C only)" |
|
2466 Warn when a declaration is found after a statement in a block. This |
|
2467 construct, known from \*(C+, was introduced with \s-1ISO\s0 C99 and is by default |
|
2468 allowed in \s-1GCC\s0. It is not supported by \s-1ISO\s0 C90 and was not supported by |
|
2469 \&\s-1GCC\s0 versions before \s-1GCC\s0 3.0. |
|
2470 .Ip "\fB\-Wundef\fR" 4 |
|
2471 .IX Item "-Wundef" |
|
2472 Warn if an undefined identifier is evaluated in an \fB#if\fR directive. |
|
2473 .Ip "\fB\-Wendif-labels\fR" 4 |
|
2474 .IX Item "-Wendif-labels" |
|
2475 Warn whenever an \fB#else\fR or an \fB#endif\fR are followed by text. |
|
2476 .Ip "\fB\-Wshadow\fR" 4 |
|
2477 .IX Item "-Wshadow" |
|
2478 Warn whenever a local variable shadows another local variable, parameter or |
|
2479 global variable or whenever a built-in function is shadowed. |
|
2480 .Ip "\fB\-Wlarger-than-\fR\fIlen\fR" 4 |
|
2481 .IX Item "-Wlarger-than-len" |
|
2482 Warn whenever an object of larger than \fIlen\fR bytes is defined. |
|
2483 .Ip "\fB\-Wpointer-arith\fR" 4 |
|
2484 .IX Item "-Wpointer-arith" |
|
2485 Warn about anything that depends on the ``size of'' a function type or |
|
2486 of \f(CW\*(C`void\*(C'\fR. \s-1GNU\s0 C assigns these types a size of 1, for |
|
2487 convenience in calculations with \f(CW\*(C`void *\*(C'\fR pointers and pointers |
|
2488 to functions. |
|
2489 .Ip "\fB\-Wbad-function-cast\fR (C only)" 4 |
|
2490 .IX Item "-Wbad-function-cast (C only)" |
|
2491 Warn whenever a function call is cast to a non-matching type. |
|
2492 For example, warn if \f(CW\*(C`int malloc()\*(C'\fR is cast to \f(CW\*(C`anything *\*(C'\fR. |
|
2493 .Ip "\fB\-Wcast-qual\fR" 4 |
|
2494 .IX Item "-Wcast-qual" |
|
2495 Warn whenever a pointer is cast so as to remove a type qualifier from |
|
2496 the target type. For example, warn if a \f(CW\*(C`const char *\*(C'\fR is cast |
|
2497 to an ordinary \f(CW\*(C`char *\*(C'\fR. |
|
2498 .Ip "\fB\-Wcast-align\fR" 4 |
|
2499 .IX Item "-Wcast-align" |
|
2500 Warn whenever a pointer is cast such that the required alignment of the |
|
2501 target is increased. For example, warn if a \f(CW\*(C`char *\*(C'\fR is cast to |
|
2502 an \f(CW\*(C`int *\*(C'\fR on machines where integers can only be accessed at |
|
2503 two- or four-byte boundaries. |
|
2504 .Ip "\fB\-Wwrite-strings\fR" 4 |
|
2505 .IX Item "-Wwrite-strings" |
|
2506 When compiling C, give string constants the type \f(CW\*(C`const |
|
2507 char[\f(CIlength\f(CW]\*(C'\fR so that |
|
2508 copying the address of one into a non-\f(CW\*(C`const\*(C'\fR \f(CW\*(C`char *\*(C'\fR |
|
2509 pointer will get a warning; when compiling \*(C+, warn about the |
|
2510 deprecated conversion from string constants to \f(CW\*(C`char *\*(C'\fR. |
|
2511 These warnings will help you find at |
|
2512 compile time code that can try to write into a string constant, but |
|
2513 only if you have been very careful about using \f(CW\*(C`const\*(C'\fR in |
|
2514 declarations and prototypes. Otherwise, it will just be a nuisance; |
|
2515 this is why we did not make \fB\-Wall\fR request these warnings. |
|
2516 .Ip "\fB\-Wconversion\fR" 4 |
|
2517 .IX Item "-Wconversion" |
|
2518 Warn if a prototype causes a type conversion that is different from what |
|
2519 would happen to the same argument in the absence of a prototype. This |
|
2520 includes conversions of fixed point to floating and vice versa, and |
|
2521 conversions changing the width or signedness of a fixed point argument |
|
2522 except when the same as the default promotion. |
|
2523 .Sp |
|
2524 Also, warn if a negative integer constant expression is implicitly |
|
2525 converted to an unsigned type. For example, warn about the assignment |
|
2526 \&\f(CW\*(C`x = \-1\*(C'\fR if \f(CW\*(C`x\*(C'\fR is unsigned. But do not warn about explicit |
|
2527 casts like \f(CW\*(C`(unsigned) \-1\*(C'\fR. |
|
2528 .Ip "\fB\-Wsign-compare\fR" 4 |
|
2529 .IX Item "-Wsign-compare" |
|
2530 Warn when a comparison between signed and unsigned values could produce |
|
2531 an incorrect result when the signed value is converted to unsigned. |
|
2532 This warning is also enabled by \fB\-Wextra\fR; to get the other warnings |
|
2533 of \fB\-Wextra\fR without this warning, use \fB\-Wextra \-Wno-sign-compare\fR. |
|
2534 .Ip "\fB\-Waggregate-return\fR" 4 |
|
2535 .IX Item "-Waggregate-return" |
|
2536 Warn if any functions that return structures or unions are defined or |
|
2537 called. (In languages where you can return an array, this also elicits |
|
2538 a warning.) |
|
2539 .Ip "\fB\-Wstrict-prototypes\fR (C only)" 4 |
|
2540 .IX Item "-Wstrict-prototypes (C only)" |
|
2541 Warn if a function is declared or defined without specifying the |
|
2542 argument types. (An old-style function definition is permitted without |
|
2543 a warning if preceded by a declaration which specifies the argument |
|
2544 types.) |
|
2545 .Ip "\fB\-Wold-style-definition\fR (C only)" 4 |
|
2546 .IX Item "-Wold-style-definition (C only)" |
|
2547 Warn if an old-style function definition is used. A warning is given |
|
2548 even if there is a previous prototype. |
|
2549 .Ip "\fB\-Wmissing-prototypes\fR (C only)" 4 |
|
2550 .IX Item "-Wmissing-prototypes (C only)" |
|
2551 Warn if a global function is defined without a previous prototype |
|
2552 declaration. This warning is issued even if the definition itself |
|
2553 provides a prototype. The aim is to detect global functions that fail |
|
2554 to be declared in header files. |
|
2555 .Ip "\fB\-Wmissing-declarations\fR (C only)" 4 |
|
2556 .IX Item "-Wmissing-declarations (C only)" |
|
2557 Warn if a global function is defined without a previous declaration. |
|
2558 Do so even if the definition itself provides a prototype. |
|
2559 Use this option to detect global functions that are not declared in |
|
2560 header files. |
|
2561 .Ip "\fB\-Wmissing-noreturn\fR" 4 |
|
2562 .IX Item "-Wmissing-noreturn" |
|
2563 Warn about functions which might be candidates for attribute \f(CW\*(C`noreturn\*(C'\fR. |
|
2564 Note these are only possible candidates, not absolute ones. Care should |
|
2565 be taken to manually verify functions actually do not ever return before |
|
2566 adding the \f(CW\*(C`noreturn\*(C'\fR attribute, otherwise subtle code generation |
|
2567 bugs could be introduced. You will not get a warning for \f(CW\*(C`main\*(C'\fR in |
|
2568 hosted C environments. |
|
2569 .Ip "\fB\-Wmissing-format-attribute\fR" 4 |
|
2570 .IX Item "-Wmissing-format-attribute" |
|
2571 If \fB\-Wformat\fR is enabled, also warn about functions which might be |
|
2572 candidates for \f(CW\*(C`format\*(C'\fR attributes. Note these are only possible |
|
2573 candidates, not absolute ones. \s-1GCC\s0 will guess that \f(CW\*(C`format\*(C'\fR |
|
2574 attributes might be appropriate for any function that calls a function |
|
2575 like \f(CW\*(C`vprintf\*(C'\fR or \f(CW\*(C`vscanf\*(C'\fR, but this might not always be the |
|
2576 case, and some functions for which \f(CW\*(C`format\*(C'\fR attributes are |
|
2577 appropriate may not be detected. This option has no effect unless |
|
2578 \&\fB\-Wformat\fR is enabled (possibly by \fB\-Wall\fR). |
|
2579 .Ip "\fB\-Wno-multichar\fR" 4 |
|
2580 .IX Item "-Wno-multichar" |
|
2581 Do not warn if a multicharacter constant (\fB'\s-1FOOF\s0'\fR) is used. |
|
2582 Usually they indicate a typo in the user's code, as they have |
|
2583 implementation-defined values, and should not be used in portable code. |
|
2584 .Ip "\fB\-Wno-deprecated-declarations\fR" 4 |
|
2585 .IX Item "-Wno-deprecated-declarations" |
|
2586 Do not warn about uses of functions, variables, and types marked as |
|
2587 deprecated by using the \f(CW\*(C`deprecated\*(C'\fR attribute. |
|
2588 (@pxref{Function Attributes}, \f(CW@pxref\fR{Variable Attributes}, |
|
2589 \&\f(CW@pxref\fR{Type Attributes}.) |
|
2590 .Ip "\fB\-Wpacked\fR" 4 |
|
2591 .IX Item "-Wpacked" |
|
2592 Warn if a structure is given the packed attribute, but the packed |
|
2593 attribute has no effect on the layout or size of the structure. |
|
2594 Such structures may be mis-aligned for little benefit. For |
|
2595 instance, in this code, the variable \f(CW\*(C`f.x\*(C'\fR in \f(CW\*(C`struct bar\*(C'\fR |
|
2596 will be misaligned even though \f(CW\*(C`struct bar\*(C'\fR does not itself |
|
2597 have the packed attribute: |
|
2598 .Sp |
|
2599 .Vb 8 |
|
2600 \& struct foo { |
|
2601 \& int x; |
|
2602 \& char a, b, c, d; |
|
2603 \& } __attribute__((packed)); |
|
2604 \& struct bar { |
|
2605 \& char z; |
|
2606 \& struct foo f; |
|
2607 \& }; |
|
2608 .Ve |
|
2609 .Ip "\fB\-Wpadded\fR" 4 |
|
2610 .IX Item "-Wpadded" |
|
2611 Warn if padding is included in a structure, either to align an element |
|
2612 of the structure or to align the whole structure. Sometimes when this |
|
2613 happens it is possible to rearrange the fields of the structure to |
|
2614 reduce the padding and so make the structure smaller. |
|
2615 .Ip "\fB\-Wredundant-decls\fR" 4 |
|
2616 .IX Item "-Wredundant-decls" |
|
2617 Warn if anything is declared more than once in the same scope, even in |
|
2618 cases where multiple declaration is valid and changes nothing. |
|
2619 .Ip "\fB\-Wnested-externs\fR (C only)" 4 |
|
2620 .IX Item "-Wnested-externs (C only)" |
|
2621 Warn if an \f(CW\*(C`extern\*(C'\fR declaration is encountered within a function. |
|
2622 .Ip "\fB\-Wunreachable-code\fR" 4 |
|
2623 .IX Item "-Wunreachable-code" |
|
2624 Warn if the compiler detects that code will never be executed. |
|
2625 .Sp |
|
2626 This option is intended to warn when the compiler detects that at |
|
2627 least a whole line of source code will never be executed, because |
|
2628 some condition is never satisfied or because it is after a |
|
2629 procedure that never returns. |
|
2630 .Sp |
|
2631 It is possible for this option to produce a warning even though there |
|
2632 are circumstances under which part of the affected line can be executed, |
|
2633 so care should be taken when removing apparently-unreachable code. |
|
2634 .Sp |
|
2635 For instance, when a function is inlined, a warning may mean that the |
|
2636 line is unreachable in only one inlined copy of the function. |
|
2637 .Sp |
|
2638 This option is not made part of \fB\-Wall\fR because in a debugging |
|
2639 version of a program there is often substantial code which checks |
|
2640 correct functioning of the program and is, hopefully, unreachable |
|
2641 because the program does work. Another common use of unreachable |
|
2642 code is to provide behavior which is selectable at compile-time. |
|
2643 .Ip "\fB\-Winline\fR" 4 |
|
2644 .IX Item "-Winline" |
|
2645 Warn if a function can not be inlined and it was declared as inline. |
|
2646 Even with this option, the compiler will not warn about failures to |
|
2647 inline functions declared in system headers. |
|
2648 .Sp |
|
2649 The compiler uses a variety of heuristics to determine whether or not |
|
2650 to inline a function. For example, the compiler takes into account |
|
2651 the size of the function being inlined and the the amount of inlining |
|
2652 that has already been done in the current function. Therefore, |
|
2653 seemingly insignificant changes in the source program can cause the |
|
2654 warnings produced by \fB\-Winline\fR to appear or disappear. |
|
2655 .Ip "\fB\-Wno-invalid-offsetof\fR (\*(C+ only)" 4 |
|
2656 .IX Item "-Wno-invalid-offsetof ( only)" |
|
2657 Suppress warnings from applying the \fBoffsetof\fR macro to a non-POD |
|
2658 type. According to the 1998 \s-1ISO\s0 \*(C+ standard, applying \fBoffsetof\fR |
|
2659 to a non-POD type is undefined. In existing \*(C+ implementations, |
|
2660 however, \fBoffsetof\fR typically gives meaningful results even when |
|
2661 applied to certain kinds of non-POD types. (Such as a simple |
|
2662 \&\fBstruct\fR that fails to be a \s-1POD\s0 type only by virtue of having a |
|
2663 constructor.) This flag is for users who are aware that they are |
|
2664 writing nonportable code and who have deliberately chosen to ignore the |
|
2665 warning about it. |
|
2666 .Sp |
|
2667 The restrictions on \fBoffsetof\fR may be relaxed in a future version |
|
2668 of the \*(C+ standard. |
|
2669 .Ip "\fB\-Winvalid-pch\fR" 4 |
|
2670 .IX Item "-Winvalid-pch" |
|
2671 Warn if a precompiled header is found in |
|
2672 the search path but can't be used. |
|
2673 .Ip "\fB\-Wlong-long\fR" 4 |
|
2674 .IX Item "-Wlong-long" |
|
2675 Warn if \fBlong long\fR type is used. This is default. To inhibit |
|
2676 the warning messages, use \fB\-Wno-long-long\fR. Flags |
|
2677 \&\fB\-Wlong-long\fR and \fB\-Wno-long-long\fR are taken into account |
|
2678 only when \fB\-pedantic\fR flag is used. |
|
2679 .Ip "\fB\-Wdisabled-optimization\fR" 4 |
|
2680 .IX Item "-Wdisabled-optimization" |
|
2681 Warn if a requested optimization pass is disabled. This warning does |
|
2682 not generally indicate that there is anything wrong with your code; it |
|
2683 merely indicates that \s-1GCC\s0's optimizers were unable to handle the code |
|
2684 effectively. Often, the problem is that your code is too big or too |
|
2685 complex; \s-1GCC\s0 will refuse to optimize programs when the optimization |
|
2686 itself is likely to take inordinate amounts of time. |
|
2687 .Ip "\fB\-Werror\fR" 4 |
|
2688 .IX Item "-Werror" |
|
2689 Make all warnings into errors. |
|
2690 .Sh "Options for Debugging Your Program or \s-1GCC\s0" |
|
2691 .IX Subsection "Options for Debugging Your Program or GCC" |
|
2692 \&\s-1GCC\s0 has various special options that are used for debugging |
|
2693 either your program or \s-1GCC:\s0 |
|
2694 .Ip "\fB\-g\fR" 4 |
|
2695 .IX Item "-g" |
|
2696 Produce debugging information in the operating system's native format |
|
2697 (stabs, \s-1COFF\s0, \s-1XCOFF\s0, or \s-1DWARF\s0). \s-1GDB\s0 can work with this debugging |
|
2698 information. |
|
2699 .Sp |
|
2700 On most systems that use stabs format, \fB\-g\fR enables use of extra |
|
2701 debugging information that only \s-1GDB\s0 can use; this extra information |
|
2702 makes debugging work better in \s-1GDB\s0 but will probably make other debuggers |
|
2703 crash or |
|
2704 refuse to read the program. If you want to control for certain whether |
|
2705 to generate the extra information, use \fB\-gstabs+\fR, \fB\-gstabs\fR, |
|
2706 \&\fB\-gxcoff+\fR, \fB\-gxcoff\fR, or \fB\-gvms\fR (see below). |
|
2707 .Sp |
|
2708 Unlike most other C compilers, \s-1GCC\s0 allows you to use \fB\-g\fR with |
|
2709 \&\fB\-O\fR. The shortcuts taken by optimized code may occasionally |
|
2710 produce surprising results: some variables you declared may not exist |
|
2711 at all; flow of control may briefly move where you did not expect it; |
|
2712 some statements may not be executed because they compute constant |
|
2713 results or their values were already at hand; some statements may |
|
2714 execute in different places because they were moved out of loops. |
|
2715 .Sp |
|
2716 Nevertheless it proves possible to debug optimized output. This makes |
|
2717 it reasonable to use the optimizer for programs that might have bugs. |
|
2718 .Sp |
|
2719 The following options are useful when \s-1GCC\s0 is generated with the |
|
2720 capability for more than one debugging format. |
|
2721 .Ip "\fB\-ggdb\fR" 4 |
|
2722 .IX Item "-ggdb" |
|
2723 Produce debugging information for use by \s-1GDB\s0. This means to use the |
|
2724 most expressive format available (\s-1DWARF\s0 2, stabs, or the native format |
|
2725 if neither of those are supported), including \s-1GDB\s0 extensions if at all |
|
2726 possible. |
|
2727 .Ip "\fB\-gstabs\fR" 4 |
|
2728 .IX Item "-gstabs" |
|
2729 Produce debugging information in stabs format (if that is supported), |
|
2730 without \s-1GDB\s0 extensions. This is the format used by \s-1DBX\s0 on most \s-1BSD\s0 |
|
2731 systems. On \s-1MIPS\s0, Alpha and System V Release 4 systems this option |
|
2732 produces stabs debugging output which is not understood by \s-1DBX\s0 or \s-1SDB\s0. |
|
2733 On System V Release 4 systems this option requires the \s-1GNU\s0 assembler. |
|
2734 .Ip "\fB\-feliminate-unused-debug-symbols\fR" 4 |
|
2735 .IX Item "-feliminate-unused-debug-symbols" |
|
2736 Produce debugging information in stabs format (if that is supported), |
|
2737 for only symbols that are actually used. |
|
2738 .Ip "\fB\-gstabs+\fR" 4 |
|
2739 .IX Item "-gstabs+" |
|
2740 Produce debugging information in stabs format (if that is supported), |
|
2741 using \s-1GNU\s0 extensions understood only by the \s-1GNU\s0 debugger (\s-1GDB\s0). The |
|
2742 use of these extensions is likely to make other debuggers crash or |
|
2743 refuse to read the program. |
|
2744 .Ip "\fB\-gcoff\fR" 4 |
|
2745 .IX Item "-gcoff" |
|
2746 Produce debugging information in \s-1COFF\s0 format (if that is supported). |
|
2747 This is the format used by \s-1SDB\s0 on most System V systems prior to |
|
2748 System V Release 4. |
|
2749 .Ip "\fB\-gxcoff\fR" 4 |
|
2750 .IX Item "-gxcoff" |
|
2751 Produce debugging information in \s-1XCOFF\s0 format (if that is supported). |
|
2752 This is the format used by the \s-1DBX\s0 debugger on \s-1IBM\s0 \s-1RS/6000\s0 systems. |
|
2753 .Ip "\fB\-gxcoff+\fR" 4 |
|
2754 .IX Item "-gxcoff+" |
|
2755 Produce debugging information in \s-1XCOFF\s0 format (if that is supported), |
|
2756 using \s-1GNU\s0 extensions understood only by the \s-1GNU\s0 debugger (\s-1GDB\s0). The |
|
2757 use of these extensions is likely to make other debuggers crash or |
|
2758 refuse to read the program, and may cause assemblers other than the \s-1GNU\s0 |
|
2759 assembler (\s-1GAS\s0) to fail with an error. |
|
2760 .Ip "\fB\-gdwarf-2\fR" 4 |
|
2761 .IX Item "-gdwarf-2" |
|
2762 Produce debugging information in \s-1DWARF\s0 version 2 format (if that is |
|
2763 supported). This is the format used by \s-1DBX\s0 on \s-1IRIX\s0 6. |
|
2764 .Ip "\fB\-gvms\fR" 4 |
|
2765 .IX Item "-gvms" |
|
2766 Produce debugging information in \s-1VMS\s0 debug format (if that is |
|
2767 supported). This is the format used by \s-1DEBUG\s0 on \s-1VMS\s0 systems. |
|
2768 .Ip "\fB\-g\fR\fIlevel\fR" 4 |
|
2769 .IX Item "-glevel" |
|
2770 .PD 0 |
|
2771 .Ip "\fB\-ggdb\fR\fIlevel\fR" 4 |
|
2772 .IX Item "-ggdblevel" |
|
2773 .Ip "\fB\-gstabs\fR\fIlevel\fR" 4 |
|
2774 .IX Item "-gstabslevel" |
|
2775 .Ip "\fB\-gcoff\fR\fIlevel\fR" 4 |
|
2776 .IX Item "-gcofflevel" |
|
2777 .Ip "\fB\-gxcoff\fR\fIlevel\fR" 4 |
|
2778 .IX Item "-gxcofflevel" |
|
2779 .Ip "\fB\-gvms\fR\fIlevel\fR" 4 |
|
2780 .IX Item "-gvmslevel" |
|
2781 .PD |
|
2782 Request debugging information and also use \fIlevel\fR to specify how |
|
2783 much information. The default level is 2. |
|
2784 .Sp |
|
2785 Level 1 produces minimal information, enough for making backtraces in |
|
2786 parts of the program that you don't plan to debug. This includes |
|
2787 descriptions of functions and external variables, but no information |
|
2788 about local variables and no line numbers. |
|
2789 .Sp |
|
2790 Level 3 includes extra information, such as all the macro definitions |
|
2791 present in the program. Some debuggers support macro expansion when |
|
2792 you use \fB\-g3\fR. |
|
2793 .Sp |
|
2794 Note that in order to avoid confusion between \s-1DWARF1\s0 debug level 2, |
|
2795 and \s-1DWARF2\s0 \fB\-gdwarf-2\fR does not accept a concatenated debug |
|
2796 level. Instead use an additional \fB\-g\fR\fIlevel\fR option to |
|
2797 change the debug level for \s-1DWARF2\s0. |
|
2798 .Ip "\fB\-feliminate-dwarf2\-dups\fR" 4 |
|
2799 .IX Item "-feliminate-dwarf2-dups" |
|
2800 Compress \s-1DWARF2\s0 debugging information by eliminating duplicated |
|
2801 information about each symbol. This option only makes sense when |
|
2802 generating \s-1DWARF2\s0 debugging information with \fB\-gdwarf-2\fR. |
|
2803 .Ip "\fB\-p\fR" 4 |
|
2804 .IX Item "-p" |
|
2805 Generate extra code to write profile information suitable for the |
|
2806 analysis program \fBprof\fR. You must use this option when compiling |
|
2807 the source files you want data about, and you must also use it when |
|
2808 linking. |
|
2809 .Ip "\fB\-pg\fR" 4 |
|
2810 .IX Item "-pg" |
|
2811 Generate extra code to write profile information suitable for the |
|
2812 analysis program \fBgprof\fR. You must use this option when compiling |
|
2813 the source files you want data about, and you must also use it when |
|
2814 linking. |
|
2815 .Ip "\fB\-Q\fR" 4 |
|
2816 .IX Item "-Q" |
|
2817 Makes the compiler print out each function name as it is compiled, and |
|
2818 print some statistics about each pass when it finishes. |
|
2819 .Ip "\fB\-ftime-report\fR" 4 |
|
2820 .IX Item "-ftime-report" |
|
2821 Makes the compiler print some statistics about the time consumed by each |
|
2822 pass when it finishes. |
|
2823 .Ip "\fB\-fmem-report\fR" 4 |
|
2824 .IX Item "-fmem-report" |
|
2825 Makes the compiler print some statistics about permanent memory |
|
2826 allocation when it finishes. |
|
2827 .Ip "\fB\-fprofile-arcs\fR" 4 |
|
2828 .IX Item "-fprofile-arcs" |
|
2829 Add code so that program flow \fIarcs\fR are instrumented. During |
|
2830 execution the program records how many times each branch and call is |
|
2831 executed and how many times it is taken or returns. When the compiled |
|
2832 program exits it saves this data to a file called |
|
2833 \&\fI\fIauxname\fI.gcda\fR for each source file. The data may be used for |
|
2834 profile-directed optimizations (\fB\-fbranch-probabilities\fR), or for |
|
2835 test coverage analysis (\fB\-ftest-coverage\fR). Each object file's |
|
2836 \&\fIauxname\fR is generated from the name of the output file, if |
|
2837 explicitly specified and it is not the final executable, otherwise it is |
|
2838 the basename of the source file. In both cases any suffix is removed |
|
2839 (e.g. \fIfoo.gcda\fR for input file \fIdir/foo.c\fR, or |
|
2840 \&\fIdir/foo.gcda\fR for output file specified as \fB\-o dir/foo.o\fR). |
|
2841 .RS 4 |
|
2842 .Ip "@bullet" 4 |
|
2843 .IX Item "@bullet" |
|
2844 Compile the source files with \fB\-fprofile-arcs\fR plus optimization |
|
2845 and code generation options. For test coverage analysis, use the |
|
2846 additional \fB\-ftest-coverage\fR option. You do not need to profile |
|
2847 every source file in a program. |
|
2848 .Ip "@cvmmfu" 4 |
|
2849 .IX Item "@cvmmfu" |
|
2850 Link your object files with \fB\-lgcov\fR or \fB\-fprofile-arcs\fR |
|
2851 (the latter implies the former). |
|
2852 .Ip "@dwnngv" 4 |
|
2853 .IX Item "@dwnngv" |
|
2854 Run the program on a representative workload to generate the arc profile |
|
2855 information. This may be repeated any number of times. You can run |
|
2856 concurrent instances of your program, and provided that the file system |
|
2857 supports locking, the data files will be correctly updated. Also |
|
2858 \&\f(CW\*(C`fork\*(C'\fR calls are detected and correctly handled (double counting |
|
2859 will not happen). |
|
2860 .Ip "@exoohw" 4 |
|
2861 .IX Item "@exoohw" |
|
2862 For profile-directed optimizations, compile the source files again with |
|
2863 the same optimization and code generation options plus |
|
2864 \&\fB\-fbranch-probabilities\fR. |
|
2865 .Ip "@fyppix" 4 |
|
2866 .IX Item "@fyppix" |
|
2867 For test coverage analysis, use \fBgcov\fR to produce human readable |
|
2868 information from the \fI.gcno\fR and \fI.gcda\fR files. Refer to the |
|
2869 \&\fBgcov\fR documentation for further information. |
|
2870 .RE |
|
2871 .RS 4 |
|
2872 .Sp |
|
2873 With \fB\-fprofile-arcs\fR, for each function of your program \s-1GCC\s0 |
|
2874 creates a program flow graph, then finds a spanning tree for the graph. |
|
2875 Only arcs that are not on the spanning tree have to be instrumented: the |
|
2876 compiler adds code to count the number of times that these arcs are |
|
2877 executed. When an arc is the only exit or only entrance to a block, the |
|
2878 instrumentation code can be added to the block; otherwise, a new basic |
|
2879 block must be created to hold the instrumentation code. |
|
2880 .RE |
|
2881 .Ip "\fB\-ftest-coverage\fR" 4 |
|
2882 .IX Item "-ftest-coverage" |
|
2883 Produce a notes file that the \fBgcov\fR code-coverage utility can use to |
|
2884 show program coverage. Each source file's note file is called |
|
2885 \&\fI\fIauxname\fI.gcno\fR. Refer to the \fB\-fprofile-arcs\fR option |
|
2886 above for a description of \fIauxname\fR and instructions on how to |
|
2887 generate test coverage data. Coverage data will match the source files |
|
2888 more closely, if you do not optimize. |
|
2889 .Ip "\fB\-d\fR\fIletters\fR" 4 |
|
2890 .IX Item "-dletters" |
|
2891 Says to make debugging dumps during compilation at times specified by |
|
2892 \&\fIletters\fR. This is used for debugging the compiler. The file names |
|
2893 for most of the dumps are made by appending a pass number and a word to |
|
2894 the \fIdumpname\fR. \fIdumpname\fR is generated from the name of the |
|
2895 output file, if explicitly specified and it is not an executable, |
|
2896 otherwise it is the basename of the source file. In both cases any |
|
2897 suffix is removed (e.g. \fIfoo.01.rtl\fR or \fIfoo.02.sibling\fR). |
|
2898 Here are the possible letters for use in \fIletters\fR, and their |
|
2899 meanings: |
|
2900 .RS 4 |
|
2901 .Ip "\fBA\fR" 4 |
|
2902 .IX Item "A" |
|
2903 Annotate the assembler output with miscellaneous debugging information. |
|
2904 .Ip "\fBb\fR" 4 |
|
2905 .IX Item "b" |
|
2906 Dump after computing branch probabilities, to \fI\fIfile\fI.12.bp\fR. |
|
2907 .Ip "\fBB\fR" 4 |
|
2908 .IX Item "B" |
|
2909 Dump after block reordering, to \fI\fIfile\fI.31.bbro\fR. |
|
2910 .Ip "\fBc\fR" 4 |
|
2911 .IX Item "c" |
|
2912 Dump after instruction combination, to the file \fI\fIfile\fI.20.combine\fR. |
|
2913 .Ip "\fBC\fR" 4 |
|
2914 .IX Item "C" |
|
2915 Dump after the first if conversion, to the file \fI\fIfile\fI.14.ce1\fR. |
|
2916 Also dump after the second if conversion, to the file \fI\fIfile\fI.21.ce2\fR. |
|
2917 .Ip "\fBd\fR" 4 |
|
2918 .IX Item "d" |
|
2919 Dump after branch target load optimization, to to \fI\fIfile\fI.32.btl\fR. |
|
2920 Also dump after delayed branch scheduling, to \fI\fIfile\fI.36.dbr\fR. |
|
2921 .Ip "\fBD\fR" 4 |
|
2922 .IX Item "D" |
|
2923 Dump all macro definitions, at the end of preprocessing, in addition to |
|
2924 normal output. |
|
2925 .Ip "\fBE\fR" 4 |
|
2926 .IX Item "E" |
|
2927 Dump after the third if conversion, to \fI\fIfile\fI.30.ce3\fR. |
|
2928 .Ip "\fBf\fR" 4 |
|
2929 .IX Item "f" |
|
2930 Dump after control and data flow analysis, to \fI\fIfile\fI.11.cfg\fR. |
|
2931 Also dump after life analysis, to \fI\fIfile\fI.19.life\fR. |
|
2932 .Ip "\fBF\fR" 4 |
|
2933 .IX Item "F" |
|
2934 Dump after purging \f(CW\*(C`ADDRESSOF\*(C'\fR codes, to \fI\fIfile\fI.07.addressof\fR. |
|
2935 .Ip "\fBg\fR" 4 |
|
2936 .IX Item "g" |
|
2937 Dump after global register allocation, to \fI\fIfile\fI.25.greg\fR. |
|
2938 .Ip "\fBG\fR" 4 |
|
2939 .IX Item "G" |
|
2940 Dump after \s-1GCSE\s0, to \fI\fIfile\fI.08.gcse\fR. |
|
2941 Also dump after jump bypassing and control flow optimizations, to |
|
2942 \&\fI\fIfile\fI.10.bypass\fR. |
|
2943 .Ip "\fBh\fR" 4 |
|
2944 .IX Item "h" |
|
2945 Dump after finalization of \s-1EH\s0 handling code, to \fI\fIfile\fI.03.eh\fR. |
|
2946 .Ip "\fBi\fR" 4 |
|
2947 .IX Item "i" |
|
2948 Dump after sibling call optimizations, to \fI\fIfile\fI.02.sibling\fR. |
|
2949 .Ip "\fBj\fR" 4 |
|
2950 .IX Item "j" |
|
2951 Dump after the first jump optimization, to \fI\fIfile\fI.04.jump\fR. |
|
2952 .Ip "\fBk\fR" 4 |
|
2953 .IX Item "k" |
|
2954 Dump after conversion from registers to stack, to \fI\fIfile\fI.34.stack\fR. |
|
2955 .Ip "\fBl\fR" 4 |
|
2956 .IX Item "l" |
|
2957 Dump after local register allocation, to \fI\fIfile\fI.24.lreg\fR. |
|
2958 .Ip "\fBL\fR" 4 |
|
2959 .IX Item "L" |
|
2960 Dump after loop optimization passes, to \fI\fIfile\fI.09.loop\fR and |
|
2961 \&\fI\fIfile\fI.16.loop2\fR. |
|
2962 .Ip "\fBM\fR" 4 |
|
2963 .IX Item "M" |
|
2964 Dump after performing the machine dependent reorganization pass, to |
|
2965 \&\fI\fIfile\fI.35.mach\fR. |
|
2966 .Ip "\fBn\fR" 4 |
|
2967 .IX Item "n" |
|
2968 Dump after register renumbering, to \fI\fIfile\fI.29.rnreg\fR. |
|
2969 .Ip "\fBN\fR" 4 |
|
2970 .IX Item "N" |
|
2971 Dump after the register move pass, to \fI\fIfile\fI.22.regmove\fR. |
|
2972 .Ip "\fBo\fR" 4 |
|
2973 .IX Item "o" |
|
2974 Dump after post-reload optimizations, to \fI\fIfile\fI.26.postreload\fR. |
|
2975 .Ip "\fBr\fR" 4 |
|
2976 .IX Item "r" |
|
2977 Dump after \s-1RTL\s0 generation, to \fI\fIfile\fI.01.rtl\fR. |
|
2978 .Ip "\fBR\fR" 4 |
|
2979 .IX Item "R" |
|
2980 Dump after the second scheduling pass, to \fI\fIfile\fI.33.sched2\fR. |
|
2981 .Ip "\fBs\fR" 4 |
|
2982 .IX Item "s" |
|
2983 Dump after \s-1CSE\s0 (including the jump optimization that sometimes follows |
|
2984 \&\s-1CSE\s0), to \fI\fIfile\fI.06.cse\fR. |
|
2985 .Ip "\fBS\fR" 4 |
|
2986 .IX Item "S" |
|
2987 Dump after the first scheduling pass, to \fI\fIfile\fI.23.sched\fR. |
|
2988 .Ip "\fBt\fR" 4 |
|
2989 .IX Item "t" |
|
2990 Dump after the second \s-1CSE\s0 pass (including the jump optimization that |
|
2991 sometimes follows \s-1CSE\s0), to \fI\fIfile\fI.18.cse2\fR. |
|
2992 .Ip "\fBT\fR" 4 |
|
2993 .IX Item "T" |
|
2994 Dump after running tracer, to \fI\fIfile\fI.15.tracer\fR. |
|
2995 .Ip "\fBu\fR" 4 |
|
2996 .IX Item "u" |
|
2997 Dump after null pointer elimination pass to \fI\fIfile\fI.05.null\fR. |
|
2998 .Ip "\fBU\fR" 4 |
|
2999 .IX Item "U" |
|
3000 Dump callgraph and unit-at-a-time optimization \fI\fIfile\fI.00.unit\fR. |
|
3001 .Ip "\fBV\fR" 4 |
|
3002 .IX Item "V" |
|
3003 Dump after the value profile transformations, to \fI\fIfile\fI.13.vpt\fR. |
|
3004 .Ip "\fBw\fR" 4 |
|
3005 .IX Item "w" |
|
3006 Dump after the second flow pass, to \fI\fIfile\fI.27.flow2\fR. |
|
3007 .Ip "\fBz\fR" 4 |
|
3008 .IX Item "z" |
|
3009 Dump after the peephole pass, to \fI\fIfile\fI.28.peephole2\fR. |
|
3010 .Ip "\fBZ\fR" 4 |
|
3011 .IX Item "Z" |
|
3012 Dump after constructing the web, to \fI\fIfile\fI.17.web\fR. |
|
3013 .Ip "\fBa\fR" 4 |
|
3014 .IX Item "a" |
|
3015 Produce all the dumps listed above. |
|
3016 .Ip "\fBH\fR" 4 |
|
3017 .IX Item "H" |
|
3018 Produce a core dump whenever an error occurs. |
|
3019 .Ip "\fBm\fR" 4 |
|
3020 .IX Item "m" |
|
3021 Print statistics on memory usage, at the end of the run, to |
|
3022 standard error. |
|
3023 .Ip "\fBp\fR" 4 |
|
3024 .IX Item "p" |
|
3025 Annotate the assembler output with a comment indicating which |
|
3026 pattern and alternative was used. The length of each instruction is |
|
3027 also printed. |
|
3028 .Ip "\fBP\fR" 4 |
|
3029 .IX Item "P" |
|
3030 Dump the \s-1RTL\s0 in the assembler output as a comment before each instruction. |
|
3031 Also turns on \fB\-dp\fR annotation. |
|
3032 .Ip "\fBv\fR" 4 |
|
3033 .IX Item "v" |
|
3034 For each of the other indicated dump files (except for |
|
3035 \&\fI\fIfile\fI.01.rtl\fR), dump a representation of the control flow graph |
|
3036 suitable for viewing with \s-1VCG\s0 to \fI\fIfile\fI.\fIpass\fI.vcg\fR. |
|
3037 .Ip "\fBx\fR" 4 |
|
3038 .IX Item "x" |
|
3039 Just generate \s-1RTL\s0 for a function instead of compiling it. Usually used |
|
3040 with \fBr\fR. |
|
3041 .Ip "\fBy\fR" 4 |
|
3042 .IX Item "y" |
|
3043 Dump debugging information during parsing, to standard error. |
|
3044 .RE |
|
3045 .RS 4 |
|
3046 .RE |
|
3047 .Ip "\fB\-fdump-unnumbered\fR" 4 |
|
3048 .IX Item "-fdump-unnumbered" |
|
3049 When doing debugging dumps (see \fB\-d\fR option above), suppress instruction |
|
3050 numbers and line number note output. This makes it more feasible to |
|
3051 use diff on debugging dumps for compiler invocations with different |
|
3052 options, in particular with and without \fB\-g\fR. |
|
3053 .Ip "\fB\-fdump-translation-unit\fR (C and \*(C+ only)" 4 |
|
3054 .IX Item "-fdump-translation-unit (C and only)" |
|
3055 .PD 0 |
|
3056 .Ip "\fB\-fdump-translation-unit-\fR\fIoptions\fR\fB \fR(C and \*(C+ only)" 4 |
|
3057 .IX Item "-fdump-translation-unit-options (C and only)" |
|
3058 .PD |
|
3059 Dump a representation of the tree structure for the entire translation |
|
3060 unit to a file. The file name is made by appending \fI.tu\fR to the |
|
3061 source file name. If the \fB-\fR\fIoptions\fR form is used, \fIoptions\fR |
|
3062 controls the details of the dump as described for the |
|
3063 \&\fB\-fdump-tree\fR options. |
|
3064 .Ip "\fB\-fdump-class-hierarchy\fR (\*(C+ only)" 4 |
|
3065 .IX Item "-fdump-class-hierarchy ( only)" |
|
3066 .PD 0 |
|
3067 .Ip "\fB\-fdump-class-hierarchy-\fR\fIoptions\fR\fB \fR(\*(C+ only)" 4 |
|
3068 .IX Item "-fdump-class-hierarchy-options ( only)" |
|
3069 .PD |
|
3070 Dump a representation of each class's hierarchy and virtual function |
|
3071 table layout to a file. The file name is made by appending \fI.class\fR |
|
3072 to the source file name. If the \fB-\fR\fIoptions\fR form is used, |
|
3073 \&\fIoptions\fR controls the details of the dump as described for the |
|
3074 \&\fB\-fdump-tree\fR options. |
|
3075 .Ip "\fB\-fdump-tree-\fR\fIswitch\fR\fB \fR(\*(C+ only)" 4 |
|
3076 .IX Item "-fdump-tree-switch ( only)" |
|
3077 .PD 0 |
|
3078 .Ip "\fB\-fdump-tree-\fR\fIswitch\fR\fB-\fR\fIoptions\fR\fB \fR(\*(C+ only)" 4 |
|
3079 .IX Item "-fdump-tree-switch-options ( only)" |
|
3080 .PD |
|
3081 Control the dumping at various stages of processing the intermediate |
|
3082 language tree to a file. The file name is generated by appending a switch |
|
3083 specific suffix to the source file name. If the \fB-\fR\fIoptions\fR |
|
3084 form is used, \fIoptions\fR is a list of \fB-\fR separated options that |
|
3085 control the details of the dump. Not all options are applicable to all |
|
3086 dumps, those which are not meaningful will be ignored. The following |
|
3087 options are available |
|
3088 .RS 4 |
|
3089 .Ip "\fBaddress\fR" 4 |
|
3090 .IX Item "address" |
|
3091 Print the address of each node. Usually this is not meaningful as it |
|
3092 changes according to the environment and source file. Its primary use |
|
3093 is for tying up a dump file with a debug environment. |
|
3094 .Ip "\fBslim\fR" 4 |
|
3095 .IX Item "slim" |
|
3096 Inhibit dumping of members of a scope or body of a function merely |
|
3097 because that scope has been reached. Only dump such items when they |
|
3098 are directly reachable by some other path. |
|
3099 .Ip "\fBall\fR" 4 |
|
3100 .IX Item "all" |
|
3101 Turn on all options. |
|
3102 .RE |
|
3103 .RS 4 |
|
3104 .Sp |
|
3105 The following tree dumps are possible: |
|
3106 .RS 4 |
|
3107 .RE |
|
3108 .Ip "\fBoriginal\fR" 4 |
|
3109 .IX Item "original" |
|
3110 Dump before any tree based optimization, to \fI\fIfile\fI.original\fR. |
|
3111 .Ip "\fBoptimized\fR" 4 |
|
3112 .IX Item "optimized" |
|
3113 Dump after all tree based optimization, to \fI\fIfile\fI.optimized\fR. |
|
3114 .Ip "\fBinlined\fR" 4 |
|
3115 .IX Item "inlined" |
|
3116 Dump after function inlining, to \fI\fIfile\fI.inlined\fR. |
|
3117 .RE |
|
3118 .RS 4 |
|
3119 .RE |
|
3120 .Ip "\fB\-frandom-seed=\fR\fIstring\fR" 4 |
|
3121 .IX Item "-frandom-seed=string" |
|
3122 This option provides a seed that \s-1GCC\s0 uses when it would otherwise use |
|
3123 random numbers. It is used to generate certain symbol names |
|
3124 that have to be different in every compiled file. It is also used to |
|
3125 place unique stamps in coverage data files and the object files that |
|
3126 produce them. You can use the \fB\-frandom-seed\fR option to produce |
|
3127 reproducibly identical object files. |
|
3128 .Sp |
|
3129 The \fIstring\fR should be different for every file you compile. |
|
3130 .Ip "\fB\-fsched-verbose=\fR\fIn\fR" 4 |
|
3131 .IX Item "-fsched-verbose=n" |
|
3132 On targets that use instruction scheduling, this option controls the |
|
3133 amount of debugging output the scheduler prints. This information is |
|
3134 written to standard error, unless \fB\-dS\fR or \fB\-dR\fR is |
|
3135 specified, in which case it is output to the usual dump |
|
3136 listing file, \fI.sched\fR or \fI.sched2\fR respectively. However |
|
3137 for \fIn\fR greater than nine, the output is always printed to standard |
|
3138 error. |
|
3139 .Sp |
|
3140 For \fIn\fR greater than zero, \fB\-fsched-verbose\fR outputs the |
|
3141 same information as \fB\-dRS\fR. For \fIn\fR greater than one, it |
|
3142 also output basic block probabilities, detailed ready list information |
|
3143 and unit/insn info. For \fIn\fR greater than two, it includes \s-1RTL\s0 |
|
3144 at abort point, control-flow and regions info. And for \fIn\fR over |
|
3145 four, \fB\-fsched-verbose\fR also includes dependence info. |
|
3146 .Ip "\fB\-save-temps\fR" 4 |
|
3147 .IX Item "-save-temps" |
|
3148 Store the usual ``temporary'' intermediate files permanently; place them |
|
3149 in the current directory and name them based on the source file. Thus, |
|
3150 compiling \fIfoo.c\fR with \fB\-c \-save-temps\fR would produce files |
|
3151 \&\fIfoo.i\fR and \fIfoo.s\fR, as well as \fIfoo.o\fR. This creates a |
|
3152 preprocessed \fIfoo.i\fR output file even though the compiler now |
|
3153 normally uses an integrated preprocessor. |
|
3154 .Ip "\fB\-time\fR" 4 |
|
3155 .IX Item "-time" |
|
3156 Report the \s-1CPU\s0 time taken by each subprocess in the compilation |
|
3157 sequence. For C source files, this is the compiler proper and assembler |
|
3158 (plus the linker if linking is done). The output looks like this: |
|
3159 .Sp |
|
3160 .Vb 2 |
|
3161 \& # cc1 0.12 0.01 |
|
3162 \& # as 0.00 0.01 |
|
3163 .Ve |
|
3164 The first number on each line is the ``user time,'' that is time spent |
|
3165 executing the program itself. The second number is ``system time,'' |
|
3166 time spent executing operating system routines on behalf of the program. |
|
3167 Both numbers are in seconds. |
|
3168 .Ip "\fB\-print-file-name=\fR\fIlibrary\fR" 4 |
|
3169 .IX Item "-print-file-name=library" |
|
3170 Print the full absolute name of the library file \fIlibrary\fR that |
|
3171 would be used when linking\-\-\-and don't do anything else. With this |
|
3172 option, \s-1GCC\s0 does not compile or link anything; it just prints the |
|
3173 file name. |
|
3174 .Ip "\fB\-print-multi-directory\fR" 4 |
|
3175 .IX Item "-print-multi-directory" |
|
3176 Print the directory name corresponding to the multilib selected by any |
|
3177 other switches present in the command line. This directory is supposed |
|
3178 to exist in \fB\s-1GCC_EXEC_PREFIX\s0\fR. |
|
3179 .Ip "\fB\-print-multi-lib\fR" 4 |
|
3180 .IX Item "-print-multi-lib" |
|
3181 Print the mapping from multilib directory names to compiler switches |
|
3182 that enable them. The directory name is separated from the switches by |
|
3183 \&\fB;\fR, and each switch starts with an \fB@} instead of the |
|
3184 \&\f(CB@samp\fB{-\fR, without spaces between multiple switches. This is supposed to |
|
3185 ease shell-processing. |
|
3186 .Ip "\fB\-print-prog-name=\fR\fIprogram\fR" 4 |
|
3187 .IX Item "-print-prog-name=program" |
|
3188 Like \fB\-print-file-name\fR, but searches for a program such as \fBcpp\fR. |
|
3189 .Ip "\fB\-print-libgcc-file-name\fR" 4 |
|
3190 .IX Item "-print-libgcc-file-name" |
|
3191 Same as \fB\-print-file-name=libgcc.a\fR. |
|
3192 .Sp |
|
3193 This is useful when you use \fB\-nostdlib\fR or \fB\-nodefaultlibs\fR |
|
3194 but you do want to link with \fIlibgcc.a\fR. You can do |
|
3195 .Sp |
|
3196 .Vb 1 |
|
3197 \& gcc -nostdlib <files>... `gcc -print-libgcc-file-name` |
|
3198 .Ve |
|
3199 .Ip "\fB\-print-search-dirs\fR" 4 |
|
3200 .IX Item "-print-search-dirs" |
|
3201 Print the name of the configured installation directory and a list of |
|
3202 program and library directories \fBgcc\fR will search\-\-\-and don't do anything else. |
|
3203 .Sp |
|
3204 This is useful when \fBgcc\fR prints the error message |
|
3205 \&\fBinstallation problem, cannot exec cpp0: No such file or directory\fR. |
|
3206 To resolve this you either need to put \fIcpp0\fR and the other compiler |
|
3207 components where \fBgcc\fR expects to find them, or you can set the environment |
|
3208 variable \fB\s-1GCC_EXEC_PREFIX\s0\fR to the directory where you installed them. |
|
3209 Don't forget the trailing '/'. |
|
3210 .Ip "\fB\-dumpmachine\fR" 4 |
|
3211 .IX Item "-dumpmachine" |
|
3212 Print the compiler's target machine (for example, |
|
3213 \&\fBi686\-pc-linux-gnu\fR)\-\-\-and don't do anything else. |
|
3214 .Ip "\fB\-dumpversion\fR" 4 |
|
3215 .IX Item "-dumpversion" |
|
3216 Print the compiler version (for example, \fB3.0\fR)\-\-\-and don't do |
|
3217 anything else. |
|
3218 .Ip "\fB\-dumpspecs\fR" 4 |
|
3219 .IX Item "-dumpspecs" |
|
3220 Print the compiler's built-in specs\-\-\-and don't do anything else. (This |
|
3221 is used when \s-1GCC\s0 itself is being built.) |
|
3222 .Ip "\fB\-feliminate-unused-debug-types\fR" 4 |
|
3223 .IX Item "-feliminate-unused-debug-types" |
|
3224 Normally, when producing \s-1DWARF2\s0 output, \s-1GCC\s0 will emit debugging |
|
3225 information for all types declared in a compilation |
|
3226 unit, regardless of whether or not they are actually used |
|
3227 in that compilation unit. Sometimes this is useful, such as |
|
3228 if, in the debugger, you want to cast a value to a type that is |
|
3229 not actually used in your program (but is declared). More often, |
|
3230 however, this results in a significant amount of wasted space. |
|
3231 With this option, \s-1GCC\s0 will avoid producing debug symbol output |
|
3232 for types that are nowhere used in the source file being compiled. |
|
3233 .Sh "Options That Control Optimization" |
|
3234 .IX Subsection "Options That Control Optimization" |
|
3235 These options control various sorts of optimizations. |
|
3236 .PP |
|
3237 Without any optimization option, the compiler's goal is to reduce the |
|
3238 cost of compilation and to make debugging produce the expected |
|
3239 results. Statements are independent: if you stop the program with a |
|
3240 breakpoint between statements, you can then assign a new value to any |
|
3241 variable or change the program counter to any other statement in the |
|
3242 function and get exactly the results you would expect from the source |
|
3243 code. |
|
3244 .PP |
|
3245 Turning on optimization flags makes the compiler attempt to improve |
|
3246 the performance and/or code size at the expense of compilation time |
|
3247 and possibly the ability to debug the program. |
|
3248 .PP |
|
3249 The compiler performs optimization based on the knowledge it has of |
|
3250 the program. Using the \fB\-funit-at-a-time\fR flag will allow the |
|
3251 compiler to consider information gained from later functions in the |
|
3252 file when compiling a function. Compiling multiple files at once to a |
|
3253 single output file (and using \fB\-funit-at-a-time\fR) will allow |
|
3254 the compiler to use information gained from all of the files when |
|
3255 compiling each of them. |
|
3256 .PP |
|
3257 Not all optimizations are controlled directly by a flag. Only |
|
3258 optimizations that have a flag are listed. |
|
3259 .Ip "\fB\-O\fR" 4 |
|
3260 .IX Item "-O" |
|
3261 .PD 0 |
|
3262 .Ip "\fB\-O1\fR" 4 |
|
3263 .IX Item "-O1" |
|
3264 .PD |
|
3265 Optimize. Optimizing compilation takes somewhat more time, and a lot |
|
3266 more memory for a large function. |
|
3267 .Sp |
|
3268 With \fB\-O\fR, the compiler tries to reduce code size and execution |
|
3269 time, without performing any optimizations that take a great deal of |
|
3270 compilation time. |
|
3271 .Sp |
|
3272 \&\fB\-O\fR turns on the following optimization flags: |
|
3273 \&\fB\-fdefer-pop |
|
3274 \&\-fmerge-constants |
|
3275 \&\-fthread-jumps |
|
3276 \&\-floop-optimize |
|
3277 \&\-fif-conversion |
|
3278 \&\-fif-conversion2 |
|
3279 \&\-fdelayed-branch |
|
3280 \&\-fguess-branch-probability |
|
3281 \&\-fcprop-registers\fR |
|
3282 .Sp |
|
3283 \&\fB\-O\fR also turns on \fB\-fomit-frame-pointer\fR on machines |
|
3284 where doing so does not interfere with debugging. |
|
3285 .Ip "\fB\-O2\fR" 4 |
|
3286 .IX Item "-O2" |
|
3287 Optimize even more. \s-1GCC\s0 performs nearly all supported optimizations |
|
3288 that do not involve a space-speed tradeoff. The compiler does not |
|
3289 perform loop unrolling or function inlining when you specify \fB\-O2\fR. |
|
3290 As compared to \fB\-O\fR, this option increases both compilation time |
|
3291 and the performance of the generated code. |
|
3292 .Sp |
|
3293 \&\fB\-O2\fR turns on all optimization flags specified by \fB\-O\fR. It |
|
3294 also turns on the following optimization flags: |
|
3295 \&\fB\-fforce-mem |
|
3296 \&\-foptimize-sibling-calls |
|
3297 \&\-fstrength-reduce |
|
3298 \&\-fcse-follow-jumps \-fcse-skip-blocks |
|
3299 \&\-frerun-cse-after-loop \-frerun-loop-opt |
|
3300 \&\-fgcse \-fgcse-lm \-fgcse-sm \-fgcse-las |
|
3301 \&\-fdelete-null-pointer-checks |
|
3302 \&\-fexpensive-optimizations |
|
3303 \&\-fregmove |
|
3304 \&\-fschedule-insns \-fschedule-insns2 |
|
3305 \&\-fsched-interblock \-fsched-spec |
|
3306 \&\-fcaller-saves |
|
3307 \&\-fpeephole2 |
|
3308 \&\-freorder-blocks \-freorder-functions |
|
3309 \&\-fstrict-aliasing |
|
3310 \&\-funit-at-a-time |
|
3311 \&\-falign-functions \-falign-jumps |
|
3312 \&\-falign-loops \-falign-labels |
|
3313 \&\-fcrossjumping\fR |
|
3314 .Sp |
|
3315 Please note the warning under \fB\-fgcse\fR about |
|
3316 invoking \fB\-O2\fR on programs that use computed gotos. |
|
3317 .Ip "\fB\-O3\fR" 4 |
|
3318 .IX Item "-O3" |
|
3319 Optimize yet more. \fB\-O3\fR turns on all optimizations specified by |
|
3320 \&\fB\-O2\fR and also turns on the \fB\-finline-functions\fR, |
|
3321 \&\fB\-fweb\fR, \fB\-frename-registers\fR and \fB\-funswitch-loops\fR |
|
3322 options. |
|
3323 .Ip "\fB\-O0\fR" 4 |
|
3324 .IX Item "-O0" |
|
3325 Do not optimize. This is the default. |
|
3326 .Ip "\fB\-Os\fR" 4 |
|
3327 .IX Item "-Os" |
|
3328 Optimize for size. \fB\-Os\fR enables all \fB\-O2\fR optimizations that |
|
3329 do not typically increase code size. It also performs further |
|
3330 optimizations designed to reduce code size. |
|
3331 .Sp |
|
3332 \&\fB\-Os\fR disables the following optimization flags: |
|
3333 \&\fB\-falign-functions \-falign-jumps \-falign-loops |
|
3334 \&\-falign-labels \-freorder-blocks \-fprefetch-loop-arrays\fR |
|
3335 .Sp |
|
3336 If you use multiple \fB\-O\fR options, with or without level numbers, |
|
3337 the last such option is the one that is effective. |
|
3338 .PP |
|
3339 Options of the form \fB\-f\fR\fIflag\fR specify machine-independent |
|
3340 flags. Most flags have both positive and negative forms; the negative |
|
3341 form of \fB\-ffoo\fR would be \fB\-fno-foo\fR. In the table |
|
3342 below, only one of the forms is listed\-\-\-the one you typically will |
|
3343 use. You can figure out the other form by either removing \fBno-\fR |
|
3344 or adding it. |
|
3345 .PP |
|
3346 The following options control specific optimizations. They are either |
|
3347 activated by \fB\-O\fR options or are related to ones that are. You |
|
3348 can use the following flags in the rare cases when ``fine-tuning'' of |
|
3349 optimizations to be performed is desired. |
|
3350 .Ip "\fB\-fno-default-inline\fR" 4 |
|
3351 .IX Item "-fno-default-inline" |
|
3352 Do not make member functions inline by default merely because they are |
|
3353 defined inside the class scope (\*(C+ only). Otherwise, when you specify |
|
3354 \&\fB\-O\fR, member functions defined inside class scope are compiled |
|
3355 inline by default; i.e., you don't need to add \fBinline\fR in front of |
|
3356 the member function name. |
|
3357 .Ip "\fB\-fno-defer-pop\fR" 4 |
|
3358 .IX Item "-fno-defer-pop" |
|
3359 Always pop the arguments to each function call as soon as that function |
|
3360 returns. For machines which must pop arguments after a function call, |
|
3361 the compiler normally lets arguments accumulate on the stack for several |
|
3362 function calls and pops them all at once. |
|
3363 .Sp |
|
3364 Disabled at levels \fB\-O\fR, \fB\-O2\fR, \fB\-O3\fR, \fB\-Os\fR. |
|
3365 .Ip "\fB\-fforce-mem\fR" 4 |
|
3366 .IX Item "-fforce-mem" |
|
3367 Force memory operands to be copied into registers before doing |
|
3368 arithmetic on them. This produces better code by making all memory |
|
3369 references potential common subexpressions. When they are not common |
|
3370 subexpressions, instruction combination should eliminate the separate |
|
3371 register-load. |
|
3372 .Sp |
|
3373 Enabled at levels \fB\-O2\fR, \fB\-O3\fR, \fB\-Os\fR. |
|
3374 .Ip "\fB\-fforce-addr\fR" 4 |
|
3375 .IX Item "-fforce-addr" |
|
3376 Force memory address constants to be copied into registers before |
|
3377 doing arithmetic on them. This may produce better code just as |
|
3378 \&\fB\-fforce-mem\fR may. |
|
3379 .Ip "\fB\-fomit-frame-pointer\fR" 4 |
|
3380 .IX Item "-fomit-frame-pointer" |
|
3381 Don't keep the frame pointer in a register for functions that |
|
3382 don't need one. This avoids the instructions to save, set up and |
|
3383 restore frame pointers; it also makes an extra register available |
|
3384 in many functions. \fBIt also makes debugging impossible on |
|
3385 some machines.\fR |
|
3386 .Sp |
|
3387 On some machines, such as the \s-1VAX\s0, this flag has no effect, because |
|
3388 the standard calling sequence automatically handles the frame pointer |
|
3389 and nothing is saved by pretending it doesn't exist. The |
|
3390 machine-description macro \f(CW\*(C`FRAME_POINTER_REQUIRED\*(C'\fR controls |
|
3391 whether a target machine supports this flag. |
|
3392 .Sp |
|
3393 Enabled at levels \fB\-O\fR, \fB\-O2\fR, \fB\-O3\fR, \fB\-Os\fR. |
|
3394 .Ip "\fB\-foptimize-sibling-calls\fR" 4 |
|
3395 .IX Item "-foptimize-sibling-calls" |
|
3396 Optimize sibling and tail recursive calls. |
|
3397 .Sp |
|
3398 Enabled at levels \fB\-O2\fR, \fB\-O3\fR, \fB\-Os\fR. |
|
3399 .Ip "\fB\-fno-inline\fR" 4 |
|
3400 .IX Item "-fno-inline" |
|
3401 Don't pay attention to the \f(CW\*(C`inline\*(C'\fR keyword. Normally this option |
|
3402 is used to keep the compiler from expanding any functions inline. |
|
3403 Note that if you are not optimizing, no functions can be expanded inline. |
|
3404 .Ip "\fB\-finline-functions\fR" 4 |
|
3405 .IX Item "-finline-functions" |
|
3406 Integrate all simple functions into their callers. The compiler |
|
3407 heuristically decides which functions are simple enough to be worth |
|
3408 integrating in this way. |
|
3409 .Sp |
|
3410 If all calls to a given function are integrated, and the function is |
|
3411 declared \f(CW\*(C`static\*(C'\fR, then the function is normally not output as |
|
3412 assembler code in its own right. |
|
3413 .Sp |
|
3414 Enabled at level \fB\-O3\fR. |
|
3415 .Ip "\fB\-finline-limit=\fR\fIn\fR" 4 |
|
3416 .IX Item "-finline-limit=n" |
|
3417 By default, \s-1GCC\s0 limits the size of functions that can be inlined. This flag |
|
3418 allows the control of this limit for functions that are explicitly marked as |
|
3419 inline (i.e., marked with the inline keyword or defined within the class |
|
3420 definition in c++). \fIn\fR is the size of functions that can be inlined in |
|
3421 number of pseudo instructions (not counting parameter handling). The default |
|
3422 value of \fIn\fR is 600. |
|
3423 Increasing this value can result in more inlined code at |
|
3424 the cost of compilation time and memory consumption. Decreasing usually makes |
|
3425 the compilation faster and less code will be inlined (which presumably |
|
3426 means slower programs). This option is particularly useful for programs that |
|
3427 use inlining heavily such as those based on recursive templates with \*(C+. |
|
3428 .Sp |
|
3429 Inlining is actually controlled by a number of parameters, which may be |
|
3430 specified individually by using \fB\*(--param\fR \fIname\fR\fB=\fR\fIvalue\fR. |
|
3431 The \fB\-finline-limit=\fR\fIn\fR option sets some of these parameters |
|
3432 as follows: |
|
3433 .RS 4 |
|
3434 .Sp |
|
3435 .Vb 8 |
|
3436 \& @item max-inline-insns-single |
|
3437 \& is set to I<n>/2. |
|
3438 \& @item max-inline-insns-auto |
|
3439 \& is set to I<n>/2. |
|
3440 \& @item min-inline-insns |
|
3441 \& is set to 130 or I<n>/4, whichever is smaller. |
|
3442 \& @item max-inline-insns-rtl |
|
3443 \& is set to I<n>. |
|
3444 .Ve |
|
3445 .RE |
|
3446 .RS 4 |
|
3447 .Sp |
|
3448 See below for a documentation of the individual |
|
3449 parameters controlling inlining. |
|
3450 .Sp |
|
3451 \&\fINote:\fR pseudo instruction represents, in this particular context, an |
|
3452 abstract measurement of function's size. In no way, it represents a count |
|
3453 of assembly instructions and as such its exact meaning might change from one |
|
3454 release to an another. |
|
3455 .RE |
|
3456 .Ip "\fB\-fkeep-inline-functions\fR" 4 |
|
3457 .IX Item "-fkeep-inline-functions" |
|
3458 Even if all calls to a given function are integrated, and the function |
|
3459 is declared \f(CW\*(C`static\*(C'\fR, nevertheless output a separate run-time |
|
3460 callable version of the function. This switch does not affect |
|
3461 \&\f(CW\*(C`extern inline\*(C'\fR functions. |
|
3462 .Ip "\fB\-fkeep-static-consts\fR" 4 |
|
3463 .IX Item "-fkeep-static-consts" |
|
3464 Emit variables declared \f(CW\*(C`static const\*(C'\fR when optimization isn't turned |
|
3465 on, even if the variables aren't referenced. |
|
3466 .Sp |
|
3467 \&\s-1GCC\s0 enables this option by default. If you want to force the compiler to |
|
3468 check if the variable was referenced, regardless of whether or not |
|
3469 optimization is turned on, use the \fB\-fno-keep-static-consts\fR option. |
|
3470 .Ip "\fB\-fmerge-constants\fR" 4 |
|
3471 .IX Item "-fmerge-constants" |
|
3472 Attempt to merge identical constants (string constants and floating point |
|
3473 constants) across compilation units. |
|
3474 .Sp |
|
3475 This option is the default for optimized compilation if the assembler and |
|
3476 linker support it. Use \fB\-fno-merge-constants\fR to inhibit this |
|
3477 behavior. |
|
3478 .Sp |
|
3479 Enabled at levels \fB\-O\fR, \fB\-O2\fR, \fB\-O3\fR, \fB\-Os\fR. |
|
3480 .Ip "\fB\-fmerge-all-constants\fR" 4 |
|
3481 .IX Item "-fmerge-all-constants" |
|
3482 Attempt to merge identical constants and identical variables. |
|
3483 .Sp |
|
3484 This option implies \fB\-fmerge-constants\fR. In addition to |
|
3485 \&\fB\-fmerge-constants\fR this considers e.g. even constant initialized |
|
3486 arrays or initialized constant variables with integral or floating point |
|
3487 types. Languages like C or \*(C+ require each non-automatic variable to |
|
3488 have distinct location, so using this option will result in non-conforming |
|
3489 behavior. |
|
3490 .Ip "\fB\-fnew-ra\fR" 4 |
|
3491 .IX Item "-fnew-ra" |
|
3492 Use a graph coloring register allocator. Currently this option is meant |
|
3493 only for testing. Users should not specify this option, since it is not |
|
3494 yet ready for production use. |
|
3495 .Ip "\fB\-fno-branch-count-reg\fR" 4 |
|
3496 .IX Item "-fno-branch-count-reg" |
|
3497 Do not use ``decrement and branch'' instructions on a count register, |
|
3498 but instead generate a sequence of instructions that decrement a |
|
3499 register, compare it against zero, then branch based upon the result. |
|
3500 This option is only meaningful on architectures that support such |
|
3501 instructions, which include x86, PowerPC, \s-1IA-64\s0 and S/390. |
|
3502 .Sp |
|
3503 The default is \fB\-fbranch-count-reg\fR, enabled when |
|
3504 \&\fB\-fstrength-reduce\fR is enabled. |
|
3505 .Ip "\fB\-fno-function-cse\fR" 4 |
|
3506 .IX Item "-fno-function-cse" |
|
3507 Do not put function addresses in registers; make each instruction that |
|
3508 calls a constant function contain the function's address explicitly. |
|
3509 .Sp |
|
3510 This option results in less efficient code, but some strange hacks |
|
3511 that alter the assembler output may be confused by the optimizations |
|
3512 performed when this option is not used. |
|
3513 .Sp |
|
3514 The default is \fB\-ffunction-cse\fR |
|
3515 .Ip "\fB\-fno-zero-initialized-in-bss\fR" 4 |
|
3516 .IX Item "-fno-zero-initialized-in-bss" |
|
3517 If the target supports a \s-1BSS\s0 section, \s-1GCC\s0 by default puts variables that |
|
3518 are initialized to zero into \s-1BSS\s0. This can save space in the resulting |
|
3519 code. |
|
3520 .Sp |
|
3521 This option turns off this behavior because some programs explicitly |
|
3522 rely on variables going to the data section. E.g., so that the |
|
3523 resulting executable can find the beginning of that section and/or make |
|
3524 assumptions based on that. |
|
3525 .Sp |
|
3526 The default is \fB\-fzero-initialized-in-bss\fR. |
|
3527 .Ip "\fB\-fstrength-reduce\fR" 4 |
|
3528 .IX Item "-fstrength-reduce" |
|
3529 Perform the optimizations of loop strength reduction and |
|
3530 elimination of iteration variables. |
|
3531 .Sp |
|
3532 Enabled at levels \fB\-O2\fR, \fB\-O3\fR, \fB\-Os\fR. |
|
3533 .Ip "\fB\-fthread-jumps\fR" 4 |
|
3534 .IX Item "-fthread-jumps" |
|
3535 Perform optimizations where we check to see if a jump branches to a |
|
3536 location where another comparison subsumed by the first is found. If |
|
3537 so, the first branch is redirected to either the destination of the |
|
3538 second branch or a point immediately following it, depending on whether |
|
3539 the condition is known to be true or false. |
|
3540 .Sp |
|
3541 Enabled at levels \fB\-O\fR, \fB\-O2\fR, \fB\-O3\fR, \fB\-Os\fR. |
|
3542 .Ip "\fB\-fcse-follow-jumps\fR" 4 |
|
3543 .IX Item "-fcse-follow-jumps" |
|
3544 In common subexpression elimination, scan through jump instructions |
|
3545 when the target of the jump is not reached by any other path. For |
|
3546 example, when \s-1CSE\s0 encounters an \f(CW\*(C`if\*(C'\fR statement with an |
|
3547 \&\f(CW\*(C`else\*(C'\fR clause, \s-1CSE\s0 will follow the jump when the condition |
|
3548 tested is false. |
|
3549 .Sp |
|
3550 Enabled at levels \fB\-O2\fR, \fB\-O3\fR, \fB\-Os\fR. |
|
3551 .Ip "\fB\-fcse-skip-blocks\fR" 4 |
|
3552 .IX Item "-fcse-skip-blocks" |
|
3553 This is similar to \fB\-fcse-follow-jumps\fR, but causes \s-1CSE\s0 to |
|
3554 follow jumps which conditionally skip over blocks. When \s-1CSE\s0 |
|
3555 encounters a simple \f(CW\*(C`if\*(C'\fR statement with no else clause, |
|
3556 \&\fB\-fcse-skip-blocks\fR causes \s-1CSE\s0 to follow the jump around the |
|
3557 body of the \f(CW\*(C`if\*(C'\fR. |
|
3558 .Sp |
|
3559 Enabled at levels \fB\-O2\fR, \fB\-O3\fR, \fB\-Os\fR. |
|
3560 .Ip "\fB\-frerun-cse-after-loop\fR" 4 |
|
3561 .IX Item "-frerun-cse-after-loop" |
|
3562 Re-run common subexpression elimination after loop optimizations has been |
|
3563 performed. |
|
3564 .Sp |
|
3565 Enabled at levels \fB\-O2\fR, \fB\-O3\fR, \fB\-Os\fR. |
|
3566 .Ip "\fB\-frerun-loop-opt\fR" 4 |
|
3567 .IX Item "-frerun-loop-opt" |
|
3568 Run the loop optimizer twice. |
|
3569 .Sp |
|
3570 Enabled at levels \fB\-O2\fR, \fB\-O3\fR, \fB\-Os\fR. |
|
3571 .Ip "\fB\-fgcse\fR" 4 |
|
3572 .IX Item "-fgcse" |
|
3573 Perform a global common subexpression elimination pass. |
|
3574 This pass also performs global constant and copy propagation. |
|
3575 .Sp |
|
3576 \&\fINote:\fR When compiling a program using computed gotos, a \s-1GCC\s0 |
|
3577 extension, you may get better runtime performance if you disable |
|
3578 the global common subexpression elimination pass by adding |
|
3579 \&\fB\-fno-gcse\fR to the command line. |
|
3580 .Sp |
|
3581 Enabled at levels \fB\-O2\fR, \fB\-O3\fR, \fB\-Os\fR. |
|
3582 .Ip "\fB\-fgcse-lm\fR" 4 |
|
3583 .IX Item "-fgcse-lm" |
|
3584 When \fB\-fgcse-lm\fR is enabled, global common subexpression elimination will |
|
3585 attempt to move loads which are only killed by stores into themselves. This |
|
3586 allows a loop containing a load/store sequence to be changed to a load outside |
|
3587 the loop, and a copy/store within the loop. |
|
3588 .Sp |
|
3589 Enabled by default when gcse is enabled. |
|
3590 .Ip "\fB\-fgcse-sm\fR" 4 |
|
3591 .IX Item "-fgcse-sm" |
|
3592 When \fB\-fgcse-sm\fR is enabled, a store motion pass is run after |
|
3593 global common subexpression elimination. This pass will attempt to move |
|
3594 stores out of loops. When used in conjunction with \fB\-fgcse-lm\fR, |
|
3595 loops containing a load/store sequence can be changed to a load before |
|
3596 the loop and a store after the loop. |
|
3597 .Sp |
|
3598 Enabled by default when gcse is enabled. |
|
3599 .Ip "\fB\-fgcse-las\fR" 4 |
|
3600 .IX Item "-fgcse-las" |
|
3601 When \fB\-fgcse-las\fR is enabled, the global common subexpression |
|
3602 elimination pass eliminates redundant loads that come after stores to the |
|
3603 same memory location (both partial and full redundancies). |
|
3604 .Sp |
|
3605 Enabled by default when gcse is enabled. |
|
3606 .Ip "\fB\-floop-optimize\fR" 4 |
|
3607 .IX Item "-floop-optimize" |
|
3608 Perform loop optimizations: move constant expressions out of loops, simplify |
|
3609 exit test conditions and optionally do strength-reduction and loop unrolling as |
|
3610 well. |
|
3611 .Sp |
|
3612 Enabled at levels \fB\-O\fR, \fB\-O2\fR, \fB\-O3\fR, \fB\-Os\fR. |
|
3613 .Ip "\fB\-fcrossjumping\fR" 4 |
|
3614 .IX Item "-fcrossjumping" |
|
3615 Perform cross-jumping transformation. This transformation unifies equivalent code and save code size. The |
|
3616 resulting code may or may not perform better than without cross-jumping. |
|
3617 .Sp |
|
3618 Enabled at levels \fB\-O\fR, \fB\-O2\fR, \fB\-O3\fR, \fB\-Os\fR. |
|
3619 .Ip "\fB\-fif-conversion\fR" 4 |
|
3620 .IX Item "-fif-conversion" |
|
3621 Attempt to transform conditional jumps into branch-less equivalents. This |
|
3622 include use of conditional moves, min, max, set flags and abs instructions, and |
|
3623 some tricks doable by standard arithmetics. The use of conditional execution |
|
3624 on chips where it is available is controlled by \f(CW\*(C`if\-conversion2\*(C'\fR. |
|
3625 .Sp |
|
3626 Enabled at levels \fB\-O\fR, \fB\-O2\fR, \fB\-O3\fR, \fB\-Os\fR. |
|
3627 .Ip "\fB\-fif-conversion2\fR" 4 |
|
3628 .IX Item "-fif-conversion2" |
|
3629 Use conditional execution (where available) to transform conditional jumps into |
|
3630 branch-less equivalents. |
|
3631 .Sp |
|
3632 Enabled at levels \fB\-O\fR, \fB\-O2\fR, \fB\-O3\fR, \fB\-Os\fR. |
|
3633 .Ip "\fB\-fdelete-null-pointer-checks\fR" 4 |
|
3634 .IX Item "-fdelete-null-pointer-checks" |
|
3635 Use global dataflow analysis to identify and eliminate useless checks |
|
3636 for null pointers. The compiler assumes that dereferencing a null |
|
3637 pointer would have halted the program. If a pointer is checked after |
|
3638 it has already been dereferenced, it cannot be null. |
|
3639 .Sp |
|
3640 In some environments, this assumption is not true, and programs can |
|
3641 safely dereference null pointers. Use |
|
3642 \&\fB\-fno-delete-null-pointer-checks\fR to disable this optimization |
|
3643 for programs which depend on that behavior. |
|
3644 .Sp |
|
3645 Enabled at levels \fB\-O2\fR, \fB\-O3\fR, \fB\-Os\fR. |
|
3646 .Ip "\fB\-fexpensive-optimizations\fR" 4 |
|
3647 .IX Item "-fexpensive-optimizations" |
|
3648 Perform a number of minor optimizations that are relatively expensive. |
|
3649 .Sp |
|
3650 Enabled at levels \fB\-O2\fR, \fB\-O3\fR, \fB\-Os\fR. |
|
3651 .Ip "\fB\-foptimize-register-move\fR" 4 |
|
3652 .IX Item "-foptimize-register-move" |
|
3653 .PD 0 |
|
3654 .Ip "\fB\-fregmove\fR" 4 |
|
3655 .IX Item "-fregmove" |
|
3656 .PD |
|
3657 Attempt to reassign register numbers in move instructions and as |
|
3658 operands of other simple instructions in order to maximize the amount of |
|
3659 register tying. This is especially helpful on machines with two-operand |
|
3660 instructions. |
|
3661 .Sp |
|
3662 Note \fB\-fregmove\fR and \fB\-foptimize-register-move\fR are the same |
|
3663 optimization. |
|
3664 .Sp |
|
3665 Enabled at levels \fB\-O2\fR, \fB\-O3\fR, \fB\-Os\fR. |
|
3666 .Ip "\fB\-fdelayed-branch\fR" 4 |
|
3667 .IX Item "-fdelayed-branch" |
|
3668 If supported for the target machine, attempt to reorder instructions |
|
3669 to exploit instruction slots available after delayed branch |
|
3670 instructions. |
|
3671 .Sp |
|
3672 Enabled at levels \fB\-O\fR, \fB\-O2\fR, \fB\-O3\fR, \fB\-Os\fR. |
|
3673 .Ip "\fB\-fschedule-insns\fR" 4 |
|
3674 .IX Item "-fschedule-insns" |
|
3675 If supported for the target machine, attempt to reorder instructions to |
|
3676 eliminate execution stalls due to required data being unavailable. This |
|
3677 helps machines that have slow floating point or memory load instructions |
|
3678 by allowing other instructions to be issued until the result of the load |
|
3679 or floating point instruction is required. |
|
3680 .Sp |
|
3681 Enabled at levels \fB\-O2\fR, \fB\-O3\fR, \fB\-Os\fR. |
|
3682 .Ip "\fB\-fschedule-insns2\fR" 4 |
|
3683 .IX Item "-fschedule-insns2" |
|
3684 Similar to \fB\-fschedule-insns\fR, but requests an additional pass of |
|
3685 instruction scheduling after register allocation has been done. This is |
|
3686 especially useful on machines with a relatively small number of |
|
3687 registers and where memory load instructions take more than one cycle. |
|
3688 .Sp |
|
3689 Enabled at levels \fB\-O2\fR, \fB\-O3\fR, \fB\-Os\fR. |
|
3690 .Ip "\fB\-fno-sched-interblock\fR" 4 |
|
3691 .IX Item "-fno-sched-interblock" |
|
3692 Don't schedule instructions across basic blocks. This is normally |
|
3693 enabled by default when scheduling before register allocation, i.e. |
|
3694 with \fB\-fschedule-insns\fR or at \fB\-O2\fR or higher. |
|
3695 .Ip "\fB\-fno-sched-spec\fR" 4 |
|
3696 .IX Item "-fno-sched-spec" |
|
3697 Don't allow speculative motion of non-load instructions. This is normally |
|
3698 enabled by default when scheduling before register allocation, i.e. |
|
3699 with \fB\-fschedule-insns\fR or at \fB\-O2\fR or higher. |
|
3700 .Ip "\fB\-fsched-spec-load\fR" 4 |
|
3701 .IX Item "-fsched-spec-load" |
|
3702 Allow speculative motion of some load instructions. This only makes |
|
3703 sense when scheduling before register allocation, i.e. with |
|
3704 \&\fB\-fschedule-insns\fR or at \fB\-O2\fR or higher. |
|
3705 .Ip "\fB\-fsched-spec-load-dangerous\fR" 4 |
|
3706 .IX Item "-fsched-spec-load-dangerous" |
|
3707 Allow speculative motion of more load instructions. This only makes |
|
3708 sense when scheduling before register allocation, i.e. with |
|
3709 \&\fB\-fschedule-insns\fR or at \fB\-O2\fR or higher. |
|
3710 .Ip "\fB\-fsched-stalled-insns=\fR\fIn\fR" 4 |
|
3711 .IX Item "-fsched-stalled-insns=n" |
|
3712 Define how many insns (if any) can be moved prematurely from the queue |
|
3713 of stalled insns into the ready list, during the second scheduling pass. |
|
3714 .Ip "\fB\-fsched-stalled-insns-dep=\fR\fIn\fR" 4 |
|
3715 .IX Item "-fsched-stalled-insns-dep=n" |
|
3716 Define how many insn groups (cycles) will be examined for a dependency |
|
3717 on a stalled insn that is candidate for premature removal from the queue |
|
3718 of stalled insns. Has an effect only during the second scheduling pass, |
|
3719 and only if \fB\-fsched-stalled-insns\fR is used and its value is not zero. |
|
3720 .Ip "\fB\-fsched2\-use-superblocks\fR" 4 |
|
3721 .IX Item "-fsched2-use-superblocks" |
|
3722 When scheduling after register allocation, do use superblock scheduling |
|
3723 algorithm. Superblock scheduling allows motion across basic block boundaries |
|
3724 resulting on faster schedules. This option is experimental, as not all machine |
|
3725 descriptions used by \s-1GCC\s0 model the \s-1CPU\s0 closely enough to avoid unreliable |
|
3726 results from the algorithm. |
|
3727 .Sp |
|
3728 This only makes sense when scheduling after register allocation, i.e. with |
|
3729 \&\fB\-fschedule-insns2\fR or at \fB\-O2\fR or higher. |
|
3730 .Ip "\fB\-fsched2\-use-traces\fR" 4 |
|
3731 .IX Item "-fsched2-use-traces" |
|
3732 Use \fB\-fsched2\-use-superblocks\fR algorithm when scheduling after register |
|
3733 allocation and additionally perform code duplication in order to increase the |
|
3734 size of superblocks using tracer pass. See \fB\-ftracer\fR for details on |
|
3735 trace formation. |
|
3736 .Sp |
|
3737 This mode should produce faster but significantly longer programs. Also |
|
3738 without \f(CW\*(C`\-fbranch\-probabilities\*(C'\fR the traces constructed may not match the |
|
3739 reality and hurt the performance. This only makes |
|
3740 sense when scheduling after register allocation, i.e. with |
|
3741 \&\fB\-fschedule-insns2\fR or at \fB\-O2\fR or higher. |
|
3742 .Ip "\fB\-fcaller-saves\fR" 4 |
|
3743 .IX Item "-fcaller-saves" |
|
3744 Enable values to be allocated in registers that will be clobbered by |
|
3745 function calls, by emitting extra instructions to save and restore the |
|
3746 registers around such calls. Such allocation is done only when it |
|
3747 seems to result in better code than would otherwise be produced. |
|
3748 .Sp |
|
3749 This option is always enabled by default on certain machines, usually |
|
3750 those which have no call-preserved registers to use instead. |
|
3751 .Sp |
|
3752 Enabled at levels \fB\-O2\fR, \fB\-O3\fR, \fB\-Os\fR. |
|
3753 .Ip "\fB\-fmove-all-movables\fR" 4 |
|
3754 .IX Item "-fmove-all-movables" |
|
3755 Forces all invariant computations in loops to be moved |
|
3756 outside the loop. |
|
3757 .Ip "\fB\-freduce-all-givs\fR" 4 |
|
3758 .IX Item "-freduce-all-givs" |
|
3759 Forces all general-induction variables in loops to be |
|
3760 strength-reduced. |
|
3761 .Sp |
|
3762 \&\fINote:\fR When compiling programs written in Fortran, |
|
3763 \&\fB\-fmove-all-movables\fR and \fB\-freduce-all-givs\fR are enabled |
|
3764 by default when you use the optimizer. |
|
3765 .Sp |
|
3766 These options may generate better or worse code; results are highly |
|
3767 dependent on the structure of loops within the source code. |
|
3768 .Sp |
|
3769 These two options are intended to be removed someday, once |
|
3770 they have helped determine the efficacy of various |
|
3771 approaches to improving loop optimizations. |
|
3772 .Sp |
|
3773 Please contact <\fBgcc@gcc.gnu.org\fR>, and describe how use of |
|
3774 these options affects the performance of your production code. |
|
3775 Examples of code that runs \fIslower\fR when these options are |
|
3776 \&\fIenabled\fR are very valuable. |
|
3777 .Ip "\fB\-fno-peephole\fR" 4 |
|
3778 .IX Item "-fno-peephole" |
|
3779 .PD 0 |
|
3780 .Ip "\fB\-fno-peephole2\fR" 4 |
|
3781 .IX Item "-fno-peephole2" |
|
3782 .PD |
|
3783 Disable any machine-specific peephole optimizations. The difference |
|
3784 between \fB\-fno-peephole\fR and \fB\-fno-peephole2\fR is in how they |
|
3785 are implemented in the compiler; some targets use one, some use the |
|
3786 other, a few use both. |
|
3787 .Sp |
|
3788 \&\fB\-fpeephole\fR is enabled by default. |
|
3789 \&\fB\-fpeephole2\fR enabled at levels \fB\-O2\fR, \fB\-O3\fR, \fB\-Os\fR. |
|
3790 .Ip "\fB\-fno-guess-branch-probability\fR" 4 |
|
3791 .IX Item "-fno-guess-branch-probability" |
|
3792 Do not guess branch probabilities using a randomized model. |
|
3793 .Sp |
|
3794 Sometimes \s-1GCC\s0 will opt to use a randomized model to guess branch |
|
3795 probabilities, when none are available from either profiling feedback |
|
3796 (\fB\-fprofile-arcs\fR) or \fB_\|_builtin_expect\fR. This means that |
|
3797 different runs of the compiler on the same program may produce different |
|
3798 object code. |
|
3799 .Sp |
|
3800 In a hard real-time system, people don't want different runs of the |
|
3801 compiler to produce code that has different behavior; minimizing |
|
3802 non-determinism is of paramount import. This switch allows users to |
|
3803 reduce non-determinism, possibly at the expense of inferior |
|
3804 optimization. |
|
3805 .Sp |
|
3806 The default is \fB\-fguess-branch-probability\fR at levels |
|
3807 \&\fB\-O\fR, \fB\-O2\fR, \fB\-O3\fR, \fB\-Os\fR. |
|
3808 .Ip "\fB\-freorder-blocks\fR" 4 |
|
3809 .IX Item "-freorder-blocks" |
|
3810 Reorder basic blocks in the compiled function in order to reduce number of |
|
3811 taken branches and improve code locality. |
|
3812 .Sp |
|
3813 Enabled at levels \fB\-O2\fR, \fB\-O3\fR. |
|
3814 .Ip "\fB\-freorder-functions\fR" 4 |
|
3815 .IX Item "-freorder-functions" |
|
3816 Reorder basic blocks in the compiled function in order to reduce number of |
|
3817 taken branches and improve code locality. This is implemented by using special |
|
3818 subsections \f(CW\*(C`.text.hot\*(C'\fR for most frequently executed functions and |
|
3819 \&\f(CW\*(C`.text.unlikely\*(C'\fR for unlikely executed functions. Reordering is done by |
|
3820 the linker so object file format must support named sections and linker must |
|
3821 place them in a reasonable way. |
|
3822 .Sp |
|
3823 Also profile feedback must be available in to make this option effective. See |
|
3824 \&\fB\-fprofile-arcs\fR for details. |
|
3825 .Sp |
|
3826 Enabled at levels \fB\-O2\fR, \fB\-O3\fR, \fB\-Os\fR. |
|
3827 .Ip "\fB\-fstrict-aliasing\fR" 4 |
|
3828 .IX Item "-fstrict-aliasing" |
|
3829 Allows the compiler to assume the strictest aliasing rules applicable to |
|
3830 the language being compiled. For C (and \*(C+), this activates |
|
3831 optimizations based on the type of expressions. In particular, an |
|
3832 object of one type is assumed never to reside at the same address as an |
|
3833 object of a different type, unless the types are almost the same. For |
|
3834 example, an \f(CW\*(C`unsigned int\*(C'\fR can alias an \f(CW\*(C`int\*(C'\fR, but not a |
|
3835 \&\f(CW\*(C`void*\*(C'\fR or a \f(CW\*(C`double\*(C'\fR. A character type may alias any other |
|
3836 type. |
|
3837 .Sp |
|
3838 Pay special attention to code like this: |
|
3839 .Sp |
|
3840 .Vb 4 |
|
3841 \& union a_union { |
|
3842 \& int i; |
|
3843 \& double d; |
|
3844 \& }; |
|
3845 .Ve |
|
3846 .Vb 5 |
|
3847 \& int f() { |
|
3848 \& a_union t; |
|
3849 \& t.d = 3.0; |
|
3850 \& return t.i; |
|
3851 \& } |
|
3852 .Ve |
|
3853 The practice of reading from a different union member than the one most |
|
3854 recently written to (called ``type-punning'') is common. Even with |
|
3855 \&\fB\-fstrict-aliasing\fR, type-punning is allowed, provided the memory |
|
3856 is accessed through the union type. So, the code above will work as |
|
3857 expected. However, this code might not: |
|
3858 .Sp |
|
3859 .Vb 7 |
|
3860 \& int f() { |
|
3861 \& a_union t; |
|
3862 \& int* ip; |
|
3863 \& t.d = 3.0; |
|
3864 \& ip = &t.i; |
|
3865 \& return *ip; |
|
3866 \& } |
|
3867 .Ve |
|
3868 Every language that wishes to perform language-specific alias analysis |
|
3869 should define a function that computes, given an \f(CW\*(C`tree\*(C'\fR |
|
3870 node, an alias set for the node. Nodes in different alias sets are not |
|
3871 allowed to alias. For an example, see the C front-end function |
|
3872 \&\f(CW\*(C`c_get_alias_set\*(C'\fR. |
|
3873 .Sp |
|
3874 Enabled at levels \fB\-O2\fR, \fB\-O3\fR, \fB\-Os\fR. |
|
3875 .Ip "\fB\-falign-functions\fR" 4 |
|
3876 .IX Item "-falign-functions" |
|
3877 .PD 0 |
|
3878 .Ip "\fB\-falign-functions=\fR\fIn\fR" 4 |
|
3879 .IX Item "-falign-functions=n" |
|
3880 .PD |
|
3881 Align the start of functions to the next power-of-two greater than |
|
3882 \&\fIn\fR, skipping up to \fIn\fR bytes. For instance, |
|
3883 \&\fB\-falign-functions=32\fR aligns functions to the next 32\-byte |
|
3884 boundary, but \fB\-falign-functions=24\fR would align to the next |
|
3885 32\-byte boundary only if this can be done by skipping 23 bytes or less. |
|
3886 .Sp |
|
3887 \&\fB\-fno-align-functions\fR and \fB\-falign-functions=1\fR are |
|
3888 equivalent and mean that functions will not be aligned. |
|
3889 .Sp |
|
3890 Some assemblers only support this flag when \fIn\fR is a power of two; |
|
3891 in that case, it is rounded up. |
|
3892 .Sp |
|
3893 If \fIn\fR is not specified or is zero, use a machine-dependent default. |
|
3894 .Sp |
|
3895 Enabled at levels \fB\-O2\fR, \fB\-O3\fR. |
|
3896 .Ip "\fB\-falign-labels\fR" 4 |
|
3897 .IX Item "-falign-labels" |
|
3898 .PD 0 |
|
3899 .Ip "\fB\-falign-labels=\fR\fIn\fR" 4 |
|
3900 .IX Item "-falign-labels=n" |
|
3901 .PD |
|
3902 Align all branch targets to a power-of-two boundary, skipping up to |
|
3903 \&\fIn\fR bytes like \fB\-falign-functions\fR. This option can easily |
|
3904 make code slower, because it must insert dummy operations for when the |
|
3905 branch target is reached in the usual flow of the code. |
|
3906 .Sp |
|
3907 \&\fB\-fno-align-labels\fR and \fB\-falign-labels=1\fR are |
|
3908 equivalent and mean that labels will not be aligned. |
|
3909 .Sp |
|
3910 If \fB\-falign-loops\fR or \fB\-falign-jumps\fR are applicable and |
|
3911 are greater than this value, then their values are used instead. |
|
3912 .Sp |
|
3913 If \fIn\fR is not specified or is zero, use a machine-dependent default |
|
3914 which is very likely to be \fB1\fR, meaning no alignment. |
|
3915 .Sp |
|
3916 Enabled at levels \fB\-O2\fR, \fB\-O3\fR. |
|
3917 .Ip "\fB\-falign-loops\fR" 4 |
|
3918 .IX Item "-falign-loops" |
|
3919 .PD 0 |
|
3920 .Ip "\fB\-falign-loops=\fR\fIn\fR" 4 |
|
3921 .IX Item "-falign-loops=n" |
|
3922 .PD |
|
3923 Align loops to a power-of-two boundary, skipping up to \fIn\fR bytes |
|
3924 like \fB\-falign-functions\fR. The hope is that the loop will be |
|
3925 executed many times, which will make up for any execution of the dummy |
|
3926 operations. |
|
3927 .Sp |
|
3928 \&\fB\-fno-align-loops\fR and \fB\-falign-loops=1\fR are |
|
3929 equivalent and mean that loops will not be aligned. |
|
3930 .Sp |
|
3931 If \fIn\fR is not specified or is zero, use a machine-dependent default. |
|
3932 .Sp |
|
3933 Enabled at levels \fB\-O2\fR, \fB\-O3\fR. |
|
3934 .Ip "\fB\-falign-jumps\fR" 4 |
|
3935 .IX Item "-falign-jumps" |
|
3936 .PD 0 |
|
3937 .Ip "\fB\-falign-jumps=\fR\fIn\fR" 4 |
|
3938 .IX Item "-falign-jumps=n" |
|
3939 .PD |
|
3940 Align branch targets to a power-of-two boundary, for branch targets |
|
3941 where the targets can only be reached by jumping, skipping up to \fIn\fR |
|
3942 bytes like \fB\-falign-functions\fR. In this case, no dummy operations |
|
3943 need be executed. |
|
3944 .Sp |
|
3945 \&\fB\-fno-align-jumps\fR and \fB\-falign-jumps=1\fR are |
|
3946 equivalent and mean that loops will not be aligned. |
|
3947 .Sp |
|
3948 If \fIn\fR is not specified or is zero, use a machine-dependent default. |
|
3949 .Sp |
|
3950 Enabled at levels \fB\-O2\fR, \fB\-O3\fR. |
|
3951 .Ip "\fB\-frename-registers\fR" 4 |
|
3952 .IX Item "-frename-registers" |
|
3953 Attempt to avoid false dependencies in scheduled code by making use |
|
3954 of registers left over after register allocation. This optimization |
|
3955 will most benefit processors with lots of registers. It can, however, |
|
3956 make debugging impossible, since variables will no longer stay in |
|
3957 a ``home register''. |
|
3958 .Ip "\fB\-fweb\fR" 4 |
|
3959 .IX Item "-fweb" |
|
3960 Constructs webs as commonly used for register allocation purposes and assign |
|
3961 each web individual pseudo register. This allows the register allocation pass |
|
3962 to operate on pseudos directly, but also strengthens several other optimization |
|
3963 passes, such as \s-1CSE\s0, loop optimizer and trivial dead code remover. It can, |
|
3964 however, make debugging impossible, since variables will no longer stay in a |
|
3965 ``home register''. |
|
3966 .Sp |
|
3967 Enabled at levels \fB\-O3\fR. |
|
3968 .Ip "\fB\-fno-cprop-registers\fR" 4 |
|
3969 .IX Item "-fno-cprop-registers" |
|
3970 After register allocation and post-register allocation instruction splitting, |
|
3971 we perform a copy-propagation pass to try to reduce scheduling dependencies |
|
3972 and occasionally eliminate the copy. |
|
3973 .Sp |
|
3974 Disabled at levels \fB\-O\fR, \fB\-O2\fR, \fB\-O3\fR, \fB\-Os\fR. |
|
3975 .Ip "\fB\-fprofile-generate\fR" 4 |
|
3976 .IX Item "-fprofile-generate" |
|
3977 Enable options usually used for instrumenting application to produce |
|
3978 profile useful for later recompilation with profile feedback based |
|
3979 optimization. You must use \f(CW\*(C`\-fprofile\-generate\*(C'\fR both when |
|
3980 compiling and when linking your program. |
|
3981 .Sp |
|
3982 The following options are enabled: \f(CW\*(C`\-fprofile\-arcs\*(C'\fR, \f(CW\*(C`\-fprofile\-values\*(C'\fR, \f(CW\*(C`\-fvpt\*(C'\fR. |
|
3983 .Ip "\fB\-fprofile-use\fR" 4 |
|
3984 .IX Item "-fprofile-use" |
|
3985 Enable profile feedback directed optimizations, and optimizations |
|
3986 generally profitable only with profile feedback available. |
|
3987 .Sp |
|
3988 The following options are enabled: \f(CW\*(C`\-fbranch\-probabilities\*(C'\fR, |
|
3989 \&\f(CW\*(C`\-fvpt\*(C'\fR, \f(CW\*(C`\-funroll\-loops\*(C'\fR, \f(CW\*(C`\-fpeel\-loops\*(C'\fR, \f(CW\*(C`\-ftracer\*(C'\fR. |
|
3990 .PP |
|
3991 The following options control compiler behavior regarding floating |
|
3992 point arithmetic. These options trade off between speed and |
|
3993 correctness. All must be specifically enabled. |
|
3994 .Ip "\fB\-ffloat-store\fR" 4 |
|
3995 .IX Item "-ffloat-store" |
|
3996 Do not store floating point variables in registers, and inhibit other |
|
3997 options that might change whether a floating point value is taken from a |
|
3998 register or memory. |
|
3999 .Sp |
|
4000 This option prevents undesirable excess precision on machines such as |
|
4001 the 68000 where the floating registers (of the 68881) keep more |
|
4002 precision than a \f(CW\*(C`double\*(C'\fR is supposed to have. Similarly for the |
|
4003 x86 architecture. For most programs, the excess precision does only |
|
4004 good, but a few programs rely on the precise definition of \s-1IEEE\s0 floating |
|
4005 point. Use \fB\-ffloat-store\fR for such programs, after modifying |
|
4006 them to store all pertinent intermediate computations into variables. |
|
4007 .Ip "\fB\-ffast-math\fR" 4 |
|
4008 .IX Item "-ffast-math" |
|
4009 Sets \fB\-fno-math-errno\fR, \fB\-funsafe-math-optimizations\fR, \fB\-fno-trapping-math\fR, \fB\-ffinite-math-only\fR, |
|
4010 \&\fB\-fno-rounding-math\fR and \fB\-fno-signaling-nans\fR. |
|
4011 .Sp |
|
4012 This option causes the preprocessor macro \f(CW\*(C`_\|_FAST_MATH_\|_\*(C'\fR to be defined. |
|
4013 .Sp |
|
4014 This option should never be turned on by any \fB\-O\fR option since |
|
4015 it can result in incorrect output for programs which depend on |
|
4016 an exact implementation of \s-1IEEE\s0 or \s-1ISO\s0 rules/specifications for |
|
4017 math functions. |
|
4018 .Ip "\fB\-fno-math-errno\fR" 4 |
|
4019 .IX Item "-fno-math-errno" |
|
4020 Do not set \s-1ERRNO\s0 after calling math functions that are executed |
|
4021 with a single instruction, e.g., sqrt. A program that relies on |
|
4022 \&\s-1IEEE\s0 exceptions for math error handling may want to use this flag |
|
4023 for speed while maintaining \s-1IEEE\s0 arithmetic compatibility. |
|
4024 .Sp |
|
4025 This option should never be turned on by any \fB\-O\fR option since |
|
4026 it can result in incorrect output for programs which depend on |
|
4027 an exact implementation of \s-1IEEE\s0 or \s-1ISO\s0 rules/specifications for |
|
4028 math functions. |
|
4029 .Sp |
|
4030 The default is \fB\-fmath-errno\fR. |
|
4031 .Ip "\fB\-funsafe-math-optimizations\fR" 4 |
|
4032 .IX Item "-funsafe-math-optimizations" |
|
4033 Allow optimizations for floating-point arithmetic that (a) assume |
|
4034 that arguments and results are valid and (b) may violate \s-1IEEE\s0 or |
|
4035 \&\s-1ANSI\s0 standards. When used at link-time, it may include libraries |
|
4036 or startup files that change the default \s-1FPU\s0 control word or other |
|
4037 similar optimizations. |
|
4038 .Sp |
|
4039 This option should never be turned on by any \fB\-O\fR option since |
|
4040 it can result in incorrect output for programs which depend on |
|
4041 an exact implementation of \s-1IEEE\s0 or \s-1ISO\s0 rules/specifications for |
|
4042 math functions. |
|
4043 .Sp |
|
4044 The default is \fB\-fno-unsafe-math-optimizations\fR. |
|
4045 .Ip "\fB\-ffinite-math-only\fR" 4 |
|
4046 .IX Item "-ffinite-math-only" |
|
4047 Allow optimizations for floating-point arithmetic that assume |
|
4048 that arguments and results are not NaNs or +\-Infs. |
|
4049 .Sp |
|
4050 This option should never be turned on by any \fB\-O\fR option since |
|
4051 it can result in incorrect output for programs which depend on |
|
4052 an exact implementation of \s-1IEEE\s0 or \s-1ISO\s0 rules/specifications. |
|
4053 .Sp |
|
4054 The default is \fB\-fno-finite-math-only\fR. |
|
4055 .Ip "\fB\-fno-trapping-math\fR" 4 |
|
4056 .IX Item "-fno-trapping-math" |
|
4057 Compile code assuming that floating-point operations cannot generate |
|
4058 user-visible traps. These traps include division by zero, overflow, |
|
4059 underflow, inexact result and invalid operation. This option implies |
|
4060 \&\fB\-fno-signaling-nans\fR. Setting this option may allow faster |
|
4061 code if one relies on ``non-stop'' \s-1IEEE\s0 arithmetic, for example. |
|
4062 .Sp |
|
4063 This option should never be turned on by any \fB\-O\fR option since |
|
4064 it can result in incorrect output for programs which depend on |
|
4065 an exact implementation of \s-1IEEE\s0 or \s-1ISO\s0 rules/specifications for |
|
4066 math functions. |
|
4067 .Sp |
|
4068 The default is \fB\-ftrapping-math\fR. |
|
4069 .Ip "\fB\-frounding-math\fR" 4 |
|
4070 .IX Item "-frounding-math" |
|
4071 Disable transformations and optimizations that assume default floating |
|
4072 point rounding behavior. This is round-to-zero for all floating point |
|
4073 to integer conversions, and round-to-nearest for all other arithmetic |
|
4074 truncations. This option should be specified for programs that change |
|
4075 the \s-1FP\s0 rounding mode dynamically, or that may be executed with a |
|
4076 non-default rounding mode. This option disables constant folding of |
|
4077 floating point expressions at compile-time (which may be affected by |
|
4078 rounding mode) and arithmetic transformations that are unsafe in the |
|
4079 presence of sign-dependent rounding modes. |
|
4080 .Sp |
|
4081 The default is \fB\-fno-rounding-math\fR. |
|
4082 .Sp |
|
4083 This option is experimental and does not currently guarantee to |
|
4084 disable all \s-1GCC\s0 optimizations that are affected by rounding mode. |
|
4085 Future versions of \s-1GCC\s0 may provide finer control of this setting |
|
4086 using C99's \f(CW\*(C`FENV_ACCESS\*(C'\fR pragma. This command line option |
|
4087 will be used to specify the default state for \f(CW\*(C`FENV_ACCESS\*(C'\fR. |
|
4088 .Ip "\fB\-fsignaling-nans\fR" 4 |
|
4089 .IX Item "-fsignaling-nans" |
|
4090 Compile code assuming that \s-1IEEE\s0 signaling NaNs may generate user-visible |
|
4091 traps during floating-point operations. Setting this option disables |
|
4092 optimizations that may change the number of exceptions visible with |
|
4093 signaling NaNs. This option implies \fB\-ftrapping-math\fR. |
|
4094 .Sp |
|
4095 This option causes the preprocessor macro \f(CW\*(C`_\|_SUPPORT_SNAN_\|_\*(C'\fR to |
|
4096 be defined. |
|
4097 .Sp |
|
4098 The default is \fB\-fno-signaling-nans\fR. |
|
4099 .Sp |
|
4100 This option is experimental and does not currently guarantee to |
|
4101 disable all \s-1GCC\s0 optimizations that affect signaling NaN behavior. |
|
4102 .Ip "\fB\-fsingle-precision-constant\fR" 4 |
|
4103 .IX Item "-fsingle-precision-constant" |
|
4104 Treat floating point constant as single precision constant instead of |
|
4105 implicitly converting it to double precision constant. |
|
4106 .PP |
|
4107 The following options control optimizations that may improve |
|
4108 performance, but are not enabled by any \fB\-O\fR options. This |
|
4109 section includes experimental options that may produce broken code. |
|
4110 .Ip "\fB\-fbranch-probabilities\fR" 4 |
|
4111 .IX Item "-fbranch-probabilities" |
|
4112 After running a program compiled with \fB\-fprofile-arcs\fR, you can compile it a second time using |
|
4113 \&\fB\-fbranch-probabilities\fR, to improve optimizations based on |
|
4114 the number of times each branch was taken. When the program |
|
4115 compiled with \fB\-fprofile-arcs\fR exits it saves arc execution |
|
4116 counts to a file called \fI\fIsourcename\fI.gcda\fR for each source |
|
4117 file The information in this data file is very dependent on the |
|
4118 structure of the generated code, so you must use the same source code |
|
4119 and the same optimization options for both compilations. |
|
4120 .Sp |
|
4121 With \fB\-fbranch-probabilities\fR, \s-1GCC\s0 puts a |
|
4122 \&\fB\s-1REG_BR_PROB\s0\fR note on each \fB\s-1JUMP_INSN\s0\fR and \fB\s-1CALL_INSN\s0\fR. |
|
4123 These can be used to improve optimization. Currently, they are only |
|
4124 used in one place: in \fIreorg.c\fR, instead of guessing which path a |
|
4125 branch is mostly to take, the \fB\s-1REG_BR_PROB\s0\fR values are used to |
|
4126 exactly determine which path is taken more often. |
|
4127 .Ip "\fB\-fprofile-values\fR" 4 |
|
4128 .IX Item "-fprofile-values" |
|
4129 If combined with \fB\-fprofile-arcs\fR, it adds code so that some |
|
4130 data about values of expressions in the program is gathered. |
|
4131 .Sp |
|
4132 With \fB\-fbranch-probabilities\fR, it reads back the data gathered |
|
4133 from profiling values of expressions and adds \fB\s-1REG_VALUE_PROFILE\s0\fR |
|
4134 notes to instructions for their later usage in optimizations. |
|
4135 .Ip "\fB\-fvpt\fR" 4 |
|
4136 .IX Item "-fvpt" |
|
4137 If combined with \fB\-fprofile-arcs\fR, it instructs the compiler to add |
|
4138 a code to gather information about values of expressions. |
|
4139 .Sp |
|
4140 With \fB\-fbranch-probabilities\fR, it reads back the data gathered |
|
4141 and actually performs the optimizations based on them. |
|
4142 Currently the optimizations include specialization of division operation |
|
4143 using the knowledge about the value of the denominator. |
|
4144 .Ip "\fB\-fnew-ra\fR" 4 |
|
4145 .IX Item "-fnew-ra" |
|
4146 Use a graph coloring register allocator. Currently this option is meant |
|
4147 for testing, so we are interested to hear about miscompilations with |
|
4148 \&\fB\-fnew-ra\fR. |
|
4149 .Ip "\fB\-ftracer\fR" 4 |
|
4150 .IX Item "-ftracer" |
|
4151 Perform tail duplication to enlarge superblock size. This transformation |
|
4152 simplifies the control flow of the function allowing other optimizations to do |
|
4153 better job. |
|
4154 .Ip "\fB\-funit-at-a-time\fR" 4 |
|
4155 .IX Item "-funit-at-a-time" |
|
4156 Parse the whole compilation unit before starting to produce code. |
|
4157 This allows some extra optimizations to take place but consumes more |
|
4158 memory. |
|
4159 .Ip "\fB\-funroll-loops\fR" 4 |
|
4160 .IX Item "-funroll-loops" |
|
4161 Unroll loops whose number of iterations can be determined at compile time or |
|
4162 upon entry to the loop. \fB\-funroll-loops\fR implies |
|
4163 \&\fB\-frerun-cse-after-loop\fR. It also turns on complete loop peeling |
|
4164 (i.e. complete removal of loops with small constant number of iterations). |
|
4165 This option makes code larger, and may or may not make it run faster. |
|
4166 .Ip "\fB\-funroll-all-loops\fR" 4 |
|
4167 .IX Item "-funroll-all-loops" |
|
4168 Unroll all loops, even if their number of iterations is uncertain when |
|
4169 the loop is entered. This usually makes programs run more slowly. |
|
4170 \&\fB\-funroll-all-loops\fR implies the same options as |
|
4171 \&\fB\-funroll-loops\fR. |
|
4172 .Ip "\fB\-fpeel-loops\fR" 4 |
|
4173 .IX Item "-fpeel-loops" |
|
4174 Peels the loops for that there is enough information that they do not |
|
4175 roll much (from profile feedback). It also turns on complete loop peeling |
|
4176 (i.e. complete removal of loops with small constant number of iterations). |
|
4177 .Ip "\fB\-funswitch-loops\fR" 4 |
|
4178 .IX Item "-funswitch-loops" |
|
4179 Move branches with loop invariant conditions out of the loop, with duplicates |
|
4180 of the loop on both branches (modified according to result of the condition). |
|
4181 .Ip "\fB\-fold-unroll-loops\fR" 4 |
|
4182 .IX Item "-fold-unroll-loops" |
|
4183 Unroll loops whose number of iterations can be determined at compile |
|
4184 time or upon entry to the loop, using the old loop unroller whose loop |
|
4185 recognition is based on notes from frontend. \fB\-fold-unroll-loops\fR implies |
|
4186 both \fB\-fstrength-reduce\fR and \fB\-frerun-cse-after-loop\fR. This |
|
4187 option makes code larger, and may or may not make it run faster. |
|
4188 .Ip "\fB\-fold-unroll-all-loops\fR" 4 |
|
4189 .IX Item "-fold-unroll-all-loops" |
|
4190 Unroll all loops, even if their number of iterations is uncertain when |
|
4191 the loop is entered. This is done using the old loop unroller whose loop |
|
4192 recognition is based on notes from frontend. This usually makes programs run more slowly. |
|
4193 \&\fB\-fold-unroll-all-loops\fR implies the same options as |
|
4194 \&\fB\-fold-unroll-loops\fR. |
|
4195 .Ip "\fB\-funswitch-loops\fR" 4 |
|
4196 .IX Item "-funswitch-loops" |
|
4197 Move branches with loop invariant conditions out of the loop, with duplicates |
|
4198 of the loop on both branches (modified according to result of the condition). |
|
4199 .Ip "\fB\-funswitch-loops\fR" 4 |
|
4200 .IX Item "-funswitch-loops" |
|
4201 Move branches with loop invariant conditions out of the loop, with duplicates |
|
4202 of the loop on both branches (modified according to result of the condition). |
|
4203 .Ip "\fB\-fprefetch-loop-arrays\fR" 4 |
|
4204 .IX Item "-fprefetch-loop-arrays" |
|
4205 If supported by the target machine, generate instructions to prefetch |
|
4206 memory to improve the performance of loops that access large arrays. |
|
4207 .Sp |
|
4208 Disabled at level \fB\-Os\fR. |
|
4209 .Ip "\fB\-ffunction-sections\fR" 4 |
|
4210 .IX Item "-ffunction-sections" |
|
4211 .PD 0 |
|
4212 .Ip "\fB\-fdata-sections\fR" 4 |
|
4213 .IX Item "-fdata-sections" |
|
4214 .PD |
|
4215 Place each function or data item into its own section in the output |
|
4216 file if the target supports arbitrary sections. The name of the |
|
4217 function or the name of the data item determines the section's name |
|
4218 in the output file. |
|
4219 .Sp |
|
4220 Use these options on systems where the linker can perform optimizations |
|
4221 to improve locality of reference in the instruction space. Most systems |
|
4222 using the \s-1ELF\s0 object format and \s-1SPARC\s0 processors running Solaris 2 have |
|
4223 linkers with such optimizations. \s-1AIX\s0 may have these optimizations in |
|
4224 the future. |
|
4225 .Sp |
|
4226 Only use these options when there are significant benefits from doing |
|
4227 so. When you specify these options, the assembler and linker will |
|
4228 create larger object and executable files and will also be slower. |
|
4229 You will not be able to use \f(CW\*(C`gprof\*(C'\fR on all systems if you |
|
4230 specify this option and you may have problems with debugging if |
|
4231 you specify both this option and \fB\-g\fR. |
|
4232 .Ip "\fB\-fbranch-target-load-optimize\fR" 4 |
|
4233 .IX Item "-fbranch-target-load-optimize" |
|
4234 Perform branch target register load optimization before prologue / epilogue |
|
4235 threading. |
|
4236 The use of target registers can typically be exposed only during reload, |
|
4237 thus hoisting loads out of loops and doing inter-block scheduling needs |
|
4238 a separate optimization pass. |
|
4239 .Ip "\fB\-fbranch-target-load-optimize2\fR" 4 |
|
4240 .IX Item "-fbranch-target-load-optimize2" |
|
4241 Perform branch target register load optimization after prologue / epilogue |
|
4242 threading. |
|
4243 .Ip "\fB\*(--param\fR \fIname\fR\fB=\fR\fIvalue\fR" 4 |
|
4244 .IX Item "param name=value" |
|
4245 In some places, \s-1GCC\s0 uses various constants to control the amount of |
|
4246 optimization that is done. For example, \s-1GCC\s0 will not inline functions |
|
4247 that contain more that a certain number of instructions. You can |
|
4248 control some of these constants on the command-line using the |
|
4249 \&\fB\*(--param\fR option. |
|
4250 .Sp |
|
4251 The names of specific parameters, and the meaning of the values, are |
|
4252 tied to the internals of the compiler, and are subject to change |
|
4253 without notice in future releases. |
|
4254 .Sp |
|
4255 In each case, the \fIvalue\fR is an integer. The allowable choices for |
|
4256 \&\fIname\fR are given in the following table: |
|
4257 .RS 4 |
|
4258 .Ip "\fBmax-crossjump-edges\fR" 4 |
|
4259 .IX Item "max-crossjump-edges" |
|
4260 The maximum number of incoming edges to consider for crossjumping. |
|
4261 The algorithm used by \fB\-fcrossjumping\fR is O(N^2) in |
|
4262 the number of edges incoming to each block. Increasing values mean |
|
4263 more aggressive optimization, making the compile time increase with |
|
4264 probably small improvement in executable size. |
|
4265 .Ip "\fBmax-delay-slot-insn-search\fR" 4 |
|
4266 .IX Item "max-delay-slot-insn-search" |
|
4267 The maximum number of instructions to consider when looking for an |
|
4268 instruction to fill a delay slot. If more than this arbitrary number of |
|
4269 instructions is searched, the time savings from filling the delay slot |
|
4270 will be minimal so stop searching. Increasing values mean more |
|
4271 aggressive optimization, making the compile time increase with probably |
|
4272 small improvement in executable run time. |
|
4273 .Ip "\fBmax-delay-slot-live-search\fR" 4 |
|
4274 .IX Item "max-delay-slot-live-search" |
|
4275 When trying to fill delay slots, the maximum number of instructions to |
|
4276 consider when searching for a block with valid live register |
|
4277 information. Increasing this arbitrarily chosen value means more |
|
4278 aggressive optimization, increasing the compile time. This parameter |
|
4279 should be removed when the delay slot code is rewritten to maintain the |
|
4280 control-flow graph. |
|
4281 .Ip "\fBmax-gcse-memory\fR" 4 |
|
4282 .IX Item "max-gcse-memory" |
|
4283 The approximate maximum amount of memory that will be allocated in |
|
4284 order to perform the global common subexpression elimination |
|
4285 optimization. If more memory than specified is required, the |
|
4286 optimization will not be done. |
|
4287 .Ip "\fBmax-gcse-passes\fR" 4 |
|
4288 .IX Item "max-gcse-passes" |
|
4289 The maximum number of passes of \s-1GCSE\s0 to run. |
|
4290 .Ip "\fBmax-pending-list-length\fR" 4 |
|
4291 .IX Item "max-pending-list-length" |
|
4292 The maximum number of pending dependencies scheduling will allow |
|
4293 before flushing the current state and starting over. Large functions |
|
4294 with few branches or calls can create excessively large lists which |
|
4295 needlessly consume memory and resources. |
|
4296 .Ip "\fBmax-inline-insns-single\fR" 4 |
|
4297 .IX Item "max-inline-insns-single" |
|
4298 Several parameters control the tree inliner used in gcc. |
|
4299 This number sets the maximum number of instructions (counted in \s-1GCC\s0's |
|
4300 internal representation) in a single function that the tree inliner |
|
4301 will consider for inlining. This only affects functions declared |
|
4302 inline and methods implemented in a class declaration (\*(C+). |
|
4303 The default value is 500. |
|
4304 .Ip "\fBmax-inline-insns-auto\fR" 4 |
|
4305 .IX Item "max-inline-insns-auto" |
|
4306 When you use \fB\-finline-functions\fR (included in \fB\-O3\fR), |
|
4307 a lot of functions that would otherwise not be considered for inlining |
|
4308 by the compiler will be investigated. To those functions, a different |
|
4309 (more restrictive) limit compared to functions declared inline can |
|
4310 be applied. |
|
4311 The default value is 100. |
|
4312 .Ip "\fBlarge-function-insns\fR" 4 |
|
4313 .IX Item "large-function-insns" |
|
4314 The limit specifying really large functions. For functions greater than this |
|
4315 limit inlining is constrained by \fB\*(--param large-function-growth\fR. |
|
4316 This parameter is useful primarily to avoid extreme compilation time caused by non-linear |
|
4317 algorithms used by the backend. |
|
4318 This parameter is ignored when \fB\-funit-at-a-time\fR is not used. |
|
4319 The default value is 3000. |
|
4320 .Ip "\fBlarge-function-growth\fR" 4 |
|
4321 .IX Item "large-function-growth" |
|
4322 Specifies maximal growth of large function caused by inlining in percents. |
|
4323 This parameter is ignored when \fB\-funit-at-a-time\fR is not used. |
|
4324 The default value is 200. |
|
4325 .Ip "\fBinline-unit-growth\fR" 4 |
|
4326 .IX Item "inline-unit-growth" |
|
4327 Specifies maximal overall growth of the compilation unit caused by inlining. |
|
4328 This parameter is ignored when \fB\-funit-at-a-time\fR is not used. |
|
4329 The default value is 150. |
|
4330 .Ip "\fBmax-inline-insns-rtl\fR" 4 |
|
4331 .IX Item "max-inline-insns-rtl" |
|
4332 For languages that use the \s-1RTL\s0 inliner (this happens at a later stage |
|
4333 than tree inlining), you can set the maximum allowable size (counted |
|
4334 in \s-1RTL\s0 instructions) for the \s-1RTL\s0 inliner with this parameter. |
|
4335 The default value is 600. |
|
4336 .Ip "\fBmax-unrolled-insns\fR" 4 |
|
4337 .IX Item "max-unrolled-insns" |
|
4338 The maximum number of instructions that a loop should have if that loop |
|
4339 is unrolled, and if the loop is unrolled, it determines how many times |
|
4340 the loop code is unrolled. |
|
4341 .Ip "\fBmax-average-unrolled-insns\fR" 4 |
|
4342 .IX Item "max-average-unrolled-insns" |
|
4343 The maximum number of instructions biased by probabilities of their execution |
|
4344 that a loop should have if that loop is unrolled, and if the loop is unrolled, |
|
4345 it determines how many times the loop code is unrolled. |
|
4346 .Ip "\fBmax-unroll-times\fR" 4 |
|
4347 .IX Item "max-unroll-times" |
|
4348 The maximum number of unrollings of a single loop. |
|
4349 .Ip "\fBmax-peeled-insns\fR" 4 |
|
4350 .IX Item "max-peeled-insns" |
|
4351 The maximum number of instructions that a loop should have if that loop |
|
4352 is peeled, and if the loop is peeled, it determines how many times |
|
4353 the loop code is peeled. |
|
4354 .Ip "\fBmax-peel-times\fR" 4 |
|
4355 .IX Item "max-peel-times" |
|
4356 The maximum number of peelings of a single loop. |
|
4357 .Ip "\fBmax-completely-peeled-insns\fR" 4 |
|
4358 .IX Item "max-completely-peeled-insns" |
|
4359 The maximum number of insns of a completely peeled loop. |
|
4360 .Ip "\fBmax-completely-peel-times\fR" 4 |
|
4361 .IX Item "max-completely-peel-times" |
|
4362 The maximum number of iterations of a loop to be suitable for complete peeling. |
|
4363 .Ip "\fBmax-unswitch-insns\fR" 4 |
|
4364 .IX Item "max-unswitch-insns" |
|
4365 The maximum number of insns of an unswitched loop. |
|
4366 .Ip "\fBmax-unswitch-level\fR" 4 |
|
4367 .IX Item "max-unswitch-level" |
|
4368 The maximum number of branches unswitched in a single loop. |
|
4369 .Ip "\fBhot-bb-count-fraction\fR" 4 |
|
4370 .IX Item "hot-bb-count-fraction" |
|
4371 Select fraction of the maximal count of repetitions of basic block in program |
|
4372 given basic block needs to have to be considered hot. |
|
4373 .Ip "\fBhot-bb-frequency-fraction\fR" 4 |
|
4374 .IX Item "hot-bb-frequency-fraction" |
|
4375 Select fraction of the maximal frequency of executions of basic block in |
|
4376 function given basic block needs to have to be considered hot |
|
4377 .Ip "\fBtracer-dynamic-coverage\fR" 4 |
|
4378 .IX Item "tracer-dynamic-coverage" |
|
4379 .PD 0 |
|
4380 .Ip "\fBtracer-dynamic-coverage-feedback\fR" 4 |
|
4381 .IX Item "tracer-dynamic-coverage-feedback" |
|
4382 .PD |
|
4383 This value is used to limit superblock formation once the given percentage of |
|
4384 executed instructions is covered. This limits unnecessary code size |
|
4385 expansion. |
|
4386 .Sp |
|
4387 The \fBtracer-dynamic-coverage-feedback\fR is used only when profile |
|
4388 feedback is available. The real profiles (as opposed to statically estimated |
|
4389 ones) are much less balanced allowing the threshold to be larger value. |
|
4390 .Ip "\fBtracer-max-code-growth\fR" 4 |
|
4391 .IX Item "tracer-max-code-growth" |
|
4392 Stop tail duplication once code growth has reached given percentage. This is |
|
4393 rather hokey argument, as most of the duplicates will be eliminated later in |
|
4394 cross jumping, so it may be set to much higher values than is the desired code |
|
4395 growth. |
|
4396 .Ip "\fBtracer-min-branch-ratio\fR" 4 |
|
4397 .IX Item "tracer-min-branch-ratio" |
|
4398 Stop reverse growth when the reverse probability of best edge is less than this |
|
4399 threshold (in percent). |
|
4400 .Ip "\fBtracer-min-branch-ratio\fR" 4 |
|
4401 .IX Item "tracer-min-branch-ratio" |
|
4402 .PD 0 |
|
4403 .Ip "\fBtracer-min-branch-ratio-feedback\fR" 4 |
|
4404 .IX Item "tracer-min-branch-ratio-feedback" |
|
4405 .PD |
|
4406 Stop forward growth if the best edge do have probability lower than this |
|
4407 threshold. |
|
4408 .Sp |
|
4409 Similarly to \fBtracer-dynamic-coverage\fR two values are present, one for |
|
4410 compilation for profile feedback and one for compilation without. The value |
|
4411 for compilation with profile feedback needs to be more conservative (higher) in |
|
4412 order to make tracer effective. |
|
4413 .Ip "\fBmax-cse-path-length\fR" 4 |
|
4414 .IX Item "max-cse-path-length" |
|
4415 Maximum number of basic blocks on path that cse considers. |
|
4416 .Ip "\fBmax-last-value-rtl\fR" 4 |
|
4417 .IX Item "max-last-value-rtl" |
|
4418 The maximum size measured as number of RTLs that can be recorded in an |
|
4419 expression in combiner for a pseudo register as last known value of that |
|
4420 register. The default is 10000. |
|
4421 .Ip "\fBggc-min-expand\fR" 4 |
|
4422 .IX Item "ggc-min-expand" |
|
4423 \&\s-1GCC\s0 uses a garbage collector to manage its own memory allocation. This |
|
4424 parameter specifies the minimum percentage by which the garbage |
|
4425 collector's heap should be allowed to expand between collections. |
|
4426 Tuning this may improve compilation speed; it has no effect on code |
|
4427 generation. |
|
4428 .Sp |
|
4429 The default is 30% + 70% * (\s-1RAM/1GB\s0) with an upper bound of 100% when |
|
4430 \&\s-1RAM\s0 >= 1GB. If \f(CW\*(C`getrlimit\*(C'\fR is available, the notion of \*(L"\s-1RAM\s0\*(R" is |
|
4431 the smallest of actual \s-1RAM\s0, \s-1RLIMIT_RSS\s0, \s-1RLIMIT_DATA\s0 and \s-1RLIMIT_AS\s0. If |
|
4432 \&\s-1GCC\s0 is not able to calculate \s-1RAM\s0 on a particular platform, the lower |
|
4433 bound of 30% is used. Setting this parameter and |
|
4434 \&\fBggc-min-heapsize\fR to zero causes a full collection to occur at |
|
4435 every opportunity. This is extremely slow, but can be useful for |
|
4436 debugging. |
|
4437 .Ip "\fBggc-min-heapsize\fR" 4 |
|
4438 .IX Item "ggc-min-heapsize" |
|
4439 Minimum size of the garbage collector's heap before it begins bothering |
|
4440 to collect garbage. The first collection occurs after the heap expands |
|
4441 by \fBggc-min-expand\fR% beyond \fBggc-min-heapsize\fR. Again, |
|
4442 tuning this may improve compilation speed, and has no effect on code |
|
4443 generation. |
|
4444 .Sp |
|
4445 The default is \s-1RAM/8\s0, with a lower bound of 4096 (four megabytes) and an |
|
4446 upper bound of 131072 (128 megabytes). If \f(CW\*(C`getrlimit\*(C'\fR is |
|
4447 available, the notion of \*(L"\s-1RAM\s0\*(R" is the smallest of actual \s-1RAM\s0, |
|
4448 \&\s-1RLIMIT_RSS\s0, \s-1RLIMIT_DATA\s0 and \s-1RLIMIT_AS\s0. If \s-1GCC\s0 is not able to calculate |
|
4449 \&\s-1RAM\s0 on a particular platform, the lower bound is used. Setting this |
|
4450 parameter very large effectively disables garbage collection. Setting |
|
4451 this parameter and \fBggc-min-expand\fR to zero causes a full |
|
4452 collection to occur at every opportunity. |
|
4453 .Ip "\fBmax-reload-search-insns\fR" 4 |
|
4454 .IX Item "max-reload-search-insns" |
|
4455 The maximum number of instruction reload should look backward for equivalent |
|
4456 register. Increasing values mean more aggressive optimization, making the |
|
4457 compile time increase with probably slightly better performance. The default |
|
4458 value is 100. |
|
4459 .Ip "\fBmax-cselib-memory-location\fR" 4 |
|
4460 .IX Item "max-cselib-memory-location" |
|
4461 The maximum number of memory locations cselib should take into acount. |
|
4462 Increasing values mean more aggressive optimization, making the compile time |
|
4463 increase with probably slightly better performance. The default value is 500. |
|
4464 .Ip "\fBreorder-blocks-duplicate\fR" 4 |
|
4465 .IX Item "reorder-blocks-duplicate" |
|
4466 .PD 0 |
|
4467 .Ip "\fBreorder-blocks-duplicate-feedback\fR" 4 |
|
4468 .IX Item "reorder-blocks-duplicate-feedback" |
|
4469 .PD |
|
4470 Used by basic block reordering pass to decide whether to use unconditional |
|
4471 branch or duplicate the code on its destination. Code is duplicated when its |
|
4472 estimated size is smaller than this value multiplied by the estimated size of |
|
4473 unconditional jump in the hot spots of the program. |
|
4474 .Sp |
|
4475 The \fBreorder-block-duplicate-feedback\fR is used only when profile |
|
4476 feedback is available and may be set to higher values than |
|
4477 \&\fBreorder-block-duplicate\fR since information about the hot spots is more |
|
4478 accurate. |
|
4479 .RE |
|
4480 .RS 4 |
|
4481 .RE |
|
4482 .Sh "Options Controlling the Preprocessor" |
|
4483 .IX Subsection "Options Controlling the Preprocessor" |
|
4484 These options control the C preprocessor, which is run on each C source |
|
4485 file before actual compilation. |
|
4486 .PP |
|
4487 If you use the \fB\-E\fR option, nothing is done except preprocessing. |
|
4488 Some of these options make sense only together with \fB\-E\fR because |
|
4489 they cause the preprocessor output to be unsuitable for actual |
|
4490 compilation. |
|
4491 .Sp |
|
4492 You can use \fB\-Wp,\fR\fIoption\fR to bypass the compiler driver |
|
4493 and pass \fIoption\fR directly through to the preprocessor. If |
|
4494 \&\fIoption\fR contains commas, it is split into multiple options at the |
|
4495 commas. However, many options are modified, translated or interpreted |
|
4496 by the compiler driver before being passed to the preprocessor, and |
|
4497 \&\fB\-Wp\fR forcibly bypasses this phase. The preprocessor's direct |
|
4498 interface is undocumented and subject to change, so whenever possible |
|
4499 you should avoid using \fB\-Wp\fR and let the driver handle the |
|
4500 options instead. |
|
4501 .Ip "\fB\-Xpreprocessor\fR \fIoption\fR" 4 |
|
4502 .IX Item "-Xpreprocessor option" |
|
4503 Pass \fIoption\fR as an option to the preprocessor. You can use this to |
|
4504 supply system-specific preprocessor options which \s-1GCC\s0 does not know how to |
|
4505 recognize. |
|
4506 .Sp |
|
4507 If you want to pass an option that takes an argument, you must use |
|
4508 \&\fB\-Xpreprocessor\fR twice, once for the option and once for the argument. |
|
4509 .Ip "\fB\-D\fR \fIname\fR" 4 |
|
4510 .IX Item "-D name" |
|
4511 Predefine \fIname\fR as a macro, with definition \f(CW\*(C`1\*(C'\fR. |
|
4512 .Ip "\fB\-D\fR \fIname\fR\fB=\fR\fIdefinition\fR" 4 |
|
4513 .IX Item "-D name=definition" |
|
4514 Predefine \fIname\fR as a macro, with definition \fIdefinition\fR. |
|
4515 The contents of \fIdefinition\fR are tokenized and processed as if |
|
4516 they appeared during translation phase three in a \fB#define\fR |
|
4517 directive. In particular, the definition will be truncated by |
|
4518 embedded newline characters. |
|
4519 .Sp |
|
4520 If you are invoking the preprocessor from a shell or shell-like |
|
4521 program you may need to use the shell's quoting syntax to protect |
|
4522 characters such as spaces that have a meaning in the shell syntax. |
|
4523 .Sp |
|
4524 If you wish to define a function-like macro on the command line, write |
|
4525 its argument list with surrounding parentheses before the equals sign |
|
4526 (if any). Parentheses are meaningful to most shells, so you will need |
|
4527 to quote the option. With \fBsh\fR and \fBcsh\fR, |
|
4528 \&\fB\-D'\fR\fIname\fR\fB(\fR\fIargs...\fR\fB)=\fR\fIdefinition\fR\fB'\fR works. |
|
4529 .Sp |
|
4530 \&\fB\-D\fR and \fB\-U\fR options are processed in the order they |
|
4531 are given on the command line. All \fB\-imacros\fR \fIfile\fR and |
|
4532 \&\fB\-include\fR \fIfile\fR options are processed after all |
|
4533 \&\fB\-D\fR and \fB\-U\fR options. |
|
4534 .Ip "\fB\-U\fR \fIname\fR" 4 |
|
4535 .IX Item "-U name" |
|
4536 Cancel any previous definition of \fIname\fR, either built in or |
|
4537 provided with a \fB\-D\fR option. |
|
4538 .Ip "\fB\-undef\fR" 4 |
|
4539 .IX Item "-undef" |
|
4540 Do not predefine any system-specific or GCC-specific macros. The |
|
4541 standard predefined macros remain defined. |
|
4542 .Ip "\fB\-I\fR \fIdir\fR" 4 |
|
4543 .IX Item "-I dir" |
|
4544 Add the directory \fIdir\fR to the list of directories to be searched |
|
4545 for header files. |
|
4546 Directories named by \fB\-I\fR are searched before the standard |
|
4547 system include directories. If the directory \fIdir\fR is a standard |
|
4548 system include directory, the option is ignored to ensure that the |
|
4549 default search order for system directories and the special treatment |
|
4550 of system headers are not defeated |
|
4551 \&. |
|
4552 .Ip "\fB\-o\fR \fIfile\fR" 4 |
|
4553 .IX Item "-o file" |
|
4554 Write output to \fIfile\fR. This is the same as specifying \fIfile\fR |
|
4555 as the second non-option argument to \fBcpp\fR. \fBgcc\fR has a |
|
4556 different interpretation of a second non-option argument, so you must |
|
4557 use \fB\-o\fR to specify the output file. |
|
4558 .Ip "\fB\-Wall\fR" 4 |
|
4559 .IX Item "-Wall" |
|
4560 Turns on all optional warnings which are desirable for normal code. |
|
4561 At present this is \fB\-Wcomment\fR, \fB\-Wtrigraphs\fR, |
|
4562 \&\fB\-Wmultichar\fR and a warning about integer promotion causing a |
|
4563 change of sign in \f(CW\*(C`#if\*(C'\fR expressions. Note that many of the |
|
4564 preprocessor's warnings are on by default and have no options to |
|
4565 control them. |
|
4566 .Ip "\fB\-Wcomment\fR" 4 |
|
4567 .IX Item "-Wcomment" |
|
4568 .PD 0 |
|
4569 .Ip "\fB\-Wcomments\fR" 4 |
|
4570 .IX Item "-Wcomments" |
|
4571 .PD |
|
4572 Warn whenever a comment-start sequence \fB/*\fR appears in a \fB/*\fR |
|
4573 comment, or whenever a backslash-newline appears in a \fB//\fR comment. |
|
4574 (Both forms have the same effect.) |
|
4575 .Ip "\fB\-Wtrigraphs\fR" 4 |
|
4576 .IX Item "-Wtrigraphs" |
|
4577 @anchor{Wtrigraphs} |
|
4578 Most trigraphs in comments cannot affect the meaning of the program. |
|
4579 However, a trigraph that would form an escaped newline (\fB??/\fR at |
|
4580 the end of a line) can, by changing where the comment begins or ends. |
|
4581 Therefore, only trigraphs that would form escaped newlines produce |
|
4582 warnings inside a comment. |
|
4583 .Sp |
|
4584 This option is implied by \fB\-Wall\fR. If \fB\-Wall\fR is not |
|
4585 given, this option is still enabled unless trigraphs are enabled. To |
|
4586 get trigraph conversion without warnings, but get the other |
|
4587 \&\fB\-Wall\fR warnings, use \fB\-trigraphs \-Wall \-Wno-trigraphs\fR. |
|
4588 .Ip "\fB\-Wtraditional\fR" 4 |
|
4589 .IX Item "-Wtraditional" |
|
4590 Warn about certain constructs that behave differently in traditional and |
|
4591 \&\s-1ISO\s0 C. Also warn about \s-1ISO\s0 C constructs that have no traditional C |
|
4592 equivalent, and problematic constructs which should be avoided. |
|
4593 .Ip "\fB\-Wimport\fR" 4 |
|
4594 .IX Item "-Wimport" |
|
4595 Warn the first time \fB#import\fR is used. |
|
4596 .Ip "\fB\-Wundef\fR" 4 |
|
4597 .IX Item "-Wundef" |
|
4598 Warn whenever an identifier which is not a macro is encountered in an |
|
4599 \&\fB#if\fR directive, outside of \fBdefined\fR. Such identifiers are |
|
4600 replaced with zero. |
|
4601 .Ip "\fB\-Wunused-macros\fR" 4 |
|
4602 .IX Item "-Wunused-macros" |
|
4603 Warn about macros defined in the main file that are unused. A macro |
|
4604 is \fIused\fR if it is expanded or tested for existence at least once. |
|
4605 The preprocessor will also warn if the macro has not been used at the |
|
4606 time it is redefined or undefined. |
|
4607 .Sp |
|
4608 Built-in macros, macros defined on the command line, and macros |
|
4609 defined in include files are not warned about. |
|
4610 .Sp |
|
4611 \&\fBNote:\fR If a macro is actually used, but only used in skipped |
|
4612 conditional blocks, then \s-1CPP\s0 will report it as unused. To avoid the |
|
4613 warning in such a case, you might improve the scope of the macro's |
|
4614 definition by, for example, moving it into the first skipped block. |
|
4615 Alternatively, you could provide a dummy use with something like: |
|
4616 .Sp |
|
4617 .Vb 2 |
|
4618 \& #if defined the_macro_causing_the_warning |
|
4619 \& #endif |
|
4620 .Ve |
|
4621 .Ip "\fB\-Wendif-labels\fR" 4 |
|
4622 .IX Item "-Wendif-labels" |
|
4623 Warn whenever an \fB#else\fR or an \fB#endif\fR are followed by text. |
|
4624 This usually happens in code of the form |
|
4625 .Sp |
|
4626 .Vb 5 |
|
4627 \& #if FOO |
|
4628 \& ... |
|
4629 \& #else FOO |
|
4630 \& ... |
|
4631 \& #endif FOO |
|
4632 .Ve |
|
4633 The second and third \f(CW\*(C`FOO\*(C'\fR should be in comments, but often are not |
|
4634 in older programs. This warning is on by default. |
|
4635 .Ip "\fB\-Werror\fR" 4 |
|
4636 .IX Item "-Werror" |
|
4637 Make all warnings into hard errors. Source code which triggers warnings |
|
4638 will be rejected. |
|
4639 .Ip "\fB\-Wsystem-headers\fR" 4 |
|
4640 .IX Item "-Wsystem-headers" |
|
4641 Issue warnings for code in system headers. These are normally unhelpful |
|
4642 in finding bugs in your own code, therefore suppressed. If you are |
|
4643 responsible for the system library, you may want to see them. |
|
4644 .Ip "\fB\-w\fR" 4 |
|
4645 .IX Item "-w" |
|
4646 Suppress all warnings, including those which \s-1GNU\s0 \s-1CPP\s0 issues by default. |
|
4647 .Ip "\fB\-pedantic\fR" 4 |
|
4648 .IX Item "-pedantic" |
|
4649 Issue all the mandatory diagnostics listed in the C standard. Some of |
|
4650 them are left out by default, since they trigger frequently on harmless |
|
4651 code. |
|
4652 .Ip "\fB\-pedantic-errors\fR" 4 |
|
4653 .IX Item "-pedantic-errors" |
|
4654 Issue all the mandatory diagnostics, and make all mandatory diagnostics |
|
4655 into errors. This includes mandatory diagnostics that \s-1GCC\s0 issues |
|
4656 without \fB\-pedantic\fR but treats as warnings. |
|
4657 .Ip "\fB\-M\fR" 4 |
|
4658 .IX Item "-M" |
|
4659 Instead of outputting the result of preprocessing, output a rule |
|
4660 suitable for \fBmake\fR describing the dependencies of the main |
|
4661 source file. The preprocessor outputs one \fBmake\fR rule containing |
|
4662 the object file name for that source file, a colon, and the names of all |
|
4663 the included files, including those coming from \fB\-include\fR or |
|
4664 \&\fB\-imacros\fR command line options. |
|
4665 .Sp |
|
4666 Unless specified explicitly (with \fB\-MT\fR or \fB\-MQ\fR), the |
|
4667 object file name consists of the basename of the source file with any |
|
4668 suffix replaced with object file suffix. If there are many included |
|
4669 files then the rule is split into several lines using \fB\e\fR\-newline. |
|
4670 The rule has no commands. |
|
4671 .Sp |
|
4672 This option does not suppress the preprocessor's debug output, such as |
|
4673 \&\fB\-dM\fR. To avoid mixing such debug output with the dependency |
|
4674 rules you should explicitly specify the dependency output file with |
|
4675 \&\fB\-MF\fR, or use an environment variable like |
|
4676 \&\fB\s-1DEPENDENCIES_OUTPUT\s0\fR. Debug output |
|
4677 will still be sent to the regular output stream as normal. |
|
4678 .Sp |
|
4679 Passing \fB\-M\fR to the driver implies \fB\-E\fR, and suppresses |
|
4680 warnings with an implicit \fB\-w\fR. |
|
4681 .Ip "\fB\-MM\fR" 4 |
|
4682 .IX Item "-MM" |
|
4683 Like \fB\-M\fR but do not mention header files that are found in |
|
4684 system header directories, nor header files that are included, |
|
4685 directly or indirectly, from such a header. |
|
4686 .Sp |
|
4687 This implies that the choice of angle brackets or double quotes in an |
|
4688 \&\fB#include\fR directive does not in itself determine whether that |
|
4689 header will appear in \fB\-MM\fR dependency output. This is a |
|
4690 slight change in semantics from \s-1GCC\s0 versions 3.0 and earlier. |
|
4691 .Sp |
|
4692 @anchor{dashMF} |
|
4693 .Ip "\fB\-MF\fR \fIfile\fR" 4 |
|
4694 .IX Item "-MF file" |
|
4695 When used with \fB\-M\fR or \fB\-MM\fR, specifies a |
|
4696 file to write the dependencies to. If no \fB\-MF\fR switch is given |
|
4697 the preprocessor sends the rules to the same place it would have sent |
|
4698 preprocessed output. |
|
4699 .Sp |
|
4700 When used with the driver options \fB\-MD\fR or \fB\-MMD\fR, |
|
4701 \&\fB\-MF\fR overrides the default dependency output file. |
|
4702 .Ip "\fB\-MG\fR" 4 |
|
4703 .IX Item "-MG" |
|
4704 In conjunction with an option such as \fB\-M\fR requesting |
|
4705 dependency generation, \fB\-MG\fR assumes missing header files are |
|
4706 generated files and adds them to the dependency list without raising |
|
4707 an error. The dependency filename is taken directly from the |
|
4708 \&\f(CW\*(C`#include\*(C'\fR directive without prepending any path. \fB\-MG\fR |
|
4709 also suppresses preprocessed output, as a missing header file renders |
|
4710 this useless. |
|
4711 .Sp |
|
4712 This feature is used in automatic updating of makefiles. |
|
4713 .Ip "\fB\-MP\fR" 4 |
|
4714 .IX Item "-MP" |
|
4715 This option instructs \s-1CPP\s0 to add a phony target for each dependency |
|
4716 other than the main file, causing each to depend on nothing. These |
|
4717 dummy rules work around errors \fBmake\fR gives if you remove header |
|
4718 files without updating the \fIMakefile\fR to match. |
|
4719 .Sp |
|
4720 This is typical output: |
|
4721 .Sp |
|
4722 .Vb 1 |
|
4723 \& test.o: test.c test.h |
|
4724 .Ve |
|
4725 .Vb 1 |
|
4726 \& test.h: |
|
4727 .Ve |
|
4728 .Ip "\fB\-MT\fR \fItarget\fR" 4 |
|
4729 .IX Item "-MT target" |
|
4730 Change the target of the rule emitted by dependency generation. By |
|
4731 default \s-1CPP\s0 takes the name of the main input file, including any path, |
|
4732 deletes any file suffix such as \fB.c\fR, and appends the platform's |
|
4733 usual object suffix. The result is the target. |
|
4734 .Sp |
|
4735 An \fB\-MT\fR option will set the target to be exactly the string you |
|
4736 specify. If you want multiple targets, you can specify them as a single |
|
4737 argument to \fB\-MT\fR, or use multiple \fB\-MT\fR options. |
|
4738 .Sp |
|
4739 For example, \fB\-MT\ '$(objpfx)foo.o'\fR might give |
|
4740 .Sp |
|
4741 .Vb 1 |
|
4742 \& $(objpfx)foo.o: foo.c |
|
4743 .Ve |
|
4744 .Ip "\fB\-MQ\fR \fItarget\fR" 4 |
|
4745 .IX Item "-MQ target" |
|
4746 Same as \fB\-MT\fR, but it quotes any characters which are special to |
|
4747 Make. \fB\-MQ\ '$(objpfx)foo.o'\fR gives |
|
4748 .Sp |
|
4749 .Vb 1 |
|
4750 \& $$(objpfx)foo.o: foo.c |
|
4751 .Ve |
|
4752 The default target is automatically quoted, as if it were given with |
|
4753 \&\fB\-MQ\fR. |
|
4754 .Ip "\fB\-MD\fR" 4 |
|
4755 .IX Item "-MD" |
|
4756 \&\fB\-MD\fR is equivalent to \fB\-M \-MF\fR \fIfile\fR, except that |
|
4757 \&\fB\-E\fR is not implied. The driver determines \fIfile\fR based on |
|
4758 whether an \fB\-o\fR option is given. If it is, the driver uses its |
|
4759 argument but with a suffix of \fI.d\fR, otherwise it take the |
|
4760 basename of the input file and applies a \fI.d\fR suffix. |
|
4761 .Sp |
|
4762 If \fB\-MD\fR is used in conjunction with \fB\-E\fR, any |
|
4763 \&\fB\-o\fR switch is understood to specify the dependency output file |
|
4764 (but \f(CW@pxref\fR{dashMF,,\-MF}), but if used without \fB\-E\fR, each \fB\-o\fR |
|
4765 is understood to specify a target object file. |
|
4766 .Sp |
|
4767 Since \fB\-E\fR is not implied, \fB\-MD\fR can be used to generate |
|
4768 a dependency output file as a side-effect of the compilation process. |
|
4769 .Ip "\fB\-MMD\fR" 4 |
|
4770 .IX Item "-MMD" |
|
4771 Like \fB\-MD\fR except mention only user header files, not system |
|
4772 \&\-header files. |
|
4773 .Ip "\fB\-fpch-deps\fR" 4 |
|
4774 .IX Item "-fpch-deps" |
|
4775 When using precompiled headers, this flag |
|
4776 will cause the dependency-output flags to also list the files from the |
|
4777 precompiled header's dependencies. If not specified only the |
|
4778 precompiled header would be listed and not the files that were used to |
|
4779 create it because those files are not consulted when a precompiled |
|
4780 header is used. |
|
4781 .Ip "\fB\-x c\fR" 4 |
|
4782 .IX Item "-x c" |
|
4783 .PD 0 |
|
4784 .Ip "\fB\-x c++\fR" 4 |
|
4785 .IX Item "-x c++" |
|
4786 .Ip "\fB\-x objective-c\fR" 4 |
|
4787 .IX Item "-x objective-c" |
|
4788 .Ip "\fB\-x assembler-with-cpp\fR" 4 |
|
4789 .IX Item "-x assembler-with-cpp" |
|
4790 .PD |
|
4791 Specify the source language: C, \*(C+, Objective-C, or assembly. This has |
|
4792 nothing to do with standards conformance or extensions; it merely |
|
4793 selects which base syntax to expect. If you give none of these options, |
|
4794 cpp will deduce the language from the extension of the source file: |
|
4795 \&\fB.c\fR, \fB.cc\fR, \fB.m\fR, or \fB.S\fR. Some other common |
|
4796 extensions for \*(C+ and assembly are also recognized. If cpp does not |
|
4797 recognize the extension, it will treat the file as C; this is the most |
|
4798 generic mode. |
|
4799 .Sp |
|
4800 \&\fBNote:\fR Previous versions of cpp accepted a \fB\-lang\fR option |
|
4801 which selected both the language and the standards conformance level. |
|
4802 This option has been removed, because it conflicts with the \fB\-l\fR |
|
4803 option. |
|
4804 .Ip "\fB\-std=\fR\fIstandard\fR" 4 |
|
4805 .IX Item "-std=standard" |
|
4806 .PD 0 |
|
4807 .Ip "\fB\-ansi\fR" 4 |
|
4808 .IX Item "-ansi" |
|
4809 .PD |
|
4810 Specify the standard to which the code should conform. Currently \s-1CPP\s0 |
|
4811 knows about C and \*(C+ standards; others may be added in the future. |
|
4812 .Sp |
|
4813 \&\fIstandard\fR |
|
4814 may be one of: |
|
4815 .RS 4 |
|
4816 .if n .Ip "\f(CW""""iso9899:1990""""\fR" 4 |
|
4817 .el .Ip "\f(CWiso9899:1990\fR" 4 |
|
4818 .IX Item "iso9899:1990" |
|
4819 .PD 0 |
|
4820 .if n .Ip "\f(CW""""c89""""\fR" 4 |
|
4821 .el .Ip "\f(CWc89\fR" 4 |
|
4822 .IX Item "c89" |
|
4823 .PD |
|
4824 The \s-1ISO\s0 C standard from 1990. \fBc89\fR is the customary shorthand for |
|
4825 this version of the standard. |
|
4826 .Sp |
|
4827 The \fB\-ansi\fR option is equivalent to \fB\-std=c89\fR. |
|
4828 .if n .Ip "\f(CW""""iso9899:199409""""\fR" 4 |
|
4829 .el .Ip "\f(CWiso9899:199409\fR" 4 |
|
4830 .IX Item "iso9899:199409" |
|
4831 The 1990 C standard, as amended in 1994. |
|
4832 .if n .Ip "\f(CW""""iso9899:1999""""\fR" 4 |
|
4833 .el .Ip "\f(CWiso9899:1999\fR" 4 |
|
4834 .IX Item "iso9899:1999" |
|
4835 .PD 0 |
|
4836 .if n .Ip "\f(CW""""c99""""\fR" 4 |
|
4837 .el .Ip "\f(CWc99\fR" 4 |
|
4838 .IX Item "c99" |
|
4839 .if n .Ip "\f(CW""""iso9899:199x""""\fR" 4 |
|
4840 .el .Ip "\f(CWiso9899:199x\fR" 4 |
|
4841 .IX Item "iso9899:199x" |
|
4842 .if n .Ip "\f(CW""""c9x""""\fR" 4 |
|
4843 .el .Ip "\f(CWc9x\fR" 4 |
|
4844 .IX Item "c9x" |
|
4845 .PD |
|
4846 The revised \s-1ISO\s0 C standard, published in December 1999. Before |
|
4847 publication, this was known as C9X. |
|
4848 .if n .Ip "\f(CW""""gnu89""""\fR" 4 |
|
4849 .el .Ip "\f(CWgnu89\fR" 4 |
|
4850 .IX Item "gnu89" |
|
4851 The 1990 C standard plus \s-1GNU\s0 extensions. This is the default. |
|
4852 .if n .Ip "\f(CW""""gnu99""""\fR" 4 |
|
4853 .el .Ip "\f(CWgnu99\fR" 4 |
|
4854 .IX Item "gnu99" |
|
4855 .PD 0 |
|
4856 .if n .Ip "\f(CW""""gnu9x""""\fR" 4 |
|
4857 .el .Ip "\f(CWgnu9x\fR" 4 |
|
4858 .IX Item "gnu9x" |
|
4859 .PD |
|
4860 The 1999 C standard plus \s-1GNU\s0 extensions. |
|
4861 .if n .Ip "\f(CW""""c++98""""\fR" 4 |
|
4862 .el .Ip "\f(CWc++98\fR" 4 |
|
4863 .IX Item "c++98" |
|
4864 The 1998 \s-1ISO\s0 \*(C+ standard plus amendments. |
|
4865 .if n .Ip "\f(CW""""gnu++98""""\fR" 4 |
|
4866 .el .Ip "\f(CWgnu++98\fR" 4 |
|
4867 .IX Item "gnu++98" |
|
4868 The same as \fB\-std=c++98\fR plus \s-1GNU\s0 extensions. This is the |
|
4869 default for \*(C+ code. |
|
4870 .RE |
|
4871 .RS 4 |
|
4872 .RE |
|
4873 .Ip "\fB\-I-\fR" 4 |
|
4874 .IX Item "-I-" |
|
4875 Split the include path. Any directories specified with \fB\-I\fR |
|
4876 options before \fB\-I-\fR are searched only for headers requested with |
|
4877 \&\f(CW\*(C`#include\ "\f(CIfile\f(CW"\*(C'\fR; they are not searched for |
|
4878 \&\f(CW\*(C`#include\ <\f(CIfile\f(CW>\*(C'\fR. If additional directories are |
|
4879 specified with \fB\-I\fR options after the \fB\-I-\fR, those |
|
4880 directories are searched for all \fB#include\fR directives. |
|
4881 .Sp |
|
4882 In addition, \fB\-I-\fR inhibits the use of the directory of the current |
|
4883 file directory as the first search directory for \f(CW\*(C`#include\ "\f(CIfile\f(CW"\*(C'\fR. |
|
4884 .Ip "\fB\-nostdinc\fR" 4 |
|
4885 .IX Item "-nostdinc" |
|
4886 Do not search the standard system directories for header files. |
|
4887 Only the directories you have specified with \fB\-I\fR options |
|
4888 (and the directory of the current file, if appropriate) are searched. |
|
4889 .Ip "\fB\-nostdinc++\fR" 4 |
|
4890 .IX Item "-nostdinc++" |
|
4891 Do not search for header files in the \*(C+\-specific standard directories, |
|
4892 but do still search the other standard directories. (This option is |
|
4893 used when building the \*(C+ library.) |
|
4894 .Ip "\fB\-include\fR \fIfile\fR" 4 |
|
4895 .IX Item "-include file" |
|
4896 Process \fIfile\fR as if \f(CW\*(C`#include "file"\*(C'\fR appeared as the first |
|
4897 line of the primary source file. However, the first directory searched |
|
4898 for \fIfile\fR is the preprocessor's working directory \fIinstead of\fR |
|
4899 the directory containing the main source file. If not found there, it |
|
4900 is searched for in the remainder of the \f(CW\*(C`#include "..."\*(C'\fR search |
|
4901 chain as normal. |
|
4902 .Sp |
|
4903 If multiple \fB\-include\fR options are given, the files are included |
|
4904 in the order they appear on the command line. |
|
4905 .Ip "\fB\-imacros\fR \fIfile\fR" 4 |
|
4906 .IX Item "-imacros file" |
|
4907 Exactly like \fB\-include\fR, except that any output produced by |
|
4908 scanning \fIfile\fR is thrown away. Macros it defines remain defined. |
|
4909 This allows you to acquire all the macros from a header without also |
|
4910 processing its declarations. |
|
4911 .Sp |
|
4912 All files specified by \fB\-imacros\fR are processed before all files |
|
4913 specified by \fB\-include\fR. |
|
4914 .Ip "\fB\-idirafter\fR \fIdir\fR" 4 |
|
4915 .IX Item "-idirafter dir" |
|
4916 Search \fIdir\fR for header files, but do it \fIafter\fR all |
|
4917 directories specified with \fB\-I\fR and the standard system directories |
|
4918 have been exhausted. \fIdir\fR is treated as a system include directory. |
|
4919 .Ip "\fB\-iprefix\fR \fIprefix\fR" 4 |
|
4920 .IX Item "-iprefix prefix" |
|
4921 Specify \fIprefix\fR as the prefix for subsequent \fB\-iwithprefix\fR |
|
4922 options. If the prefix represents a directory, you should include the |
|
4923 final \fB/\fR. |
|
4924 .Ip "\fB\-iwithprefix\fR \fIdir\fR" 4 |
|
4925 .IX Item "-iwithprefix dir" |
|
4926 .PD 0 |
|
4927 .Ip "\fB\-iwithprefixbefore\fR \fIdir\fR" 4 |
|
4928 .IX Item "-iwithprefixbefore dir" |
|
4929 .PD |
|
4930 Append \fIdir\fR to the prefix specified previously with |
|
4931 \&\fB\-iprefix\fR, and add the resulting directory to the include search |
|
4932 path. \fB\-iwithprefixbefore\fR puts it in the same place \fB\-I\fR |
|
4933 would; \fB\-iwithprefix\fR puts it where \fB\-idirafter\fR would. |
|
4934 .Ip "\fB\-isystem\fR \fIdir\fR" 4 |
|
4935 .IX Item "-isystem dir" |
|
4936 Search \fIdir\fR for header files, after all directories specified by |
|
4937 \&\fB\-I\fR but before the standard system directories. Mark it |
|
4938 as a system directory, so that it gets the same special treatment as |
|
4939 is applied to the standard system directories. |
|
4940 .Ip "\fB\-fdollars-in-identifiers\fR" 4 |
|
4941 .IX Item "-fdollars-in-identifiers" |
|
4942 @anchor{fdollars-in-identifiers} |
|
4943 Accept \fB$\fR in identifiers. |
|
4944 .Ip "\fB\-fpreprocessed\fR" 4 |
|
4945 .IX Item "-fpreprocessed" |
|
4946 Indicate to the preprocessor that the input file has already been |
|
4947 preprocessed. This suppresses things like macro expansion, trigraph |
|
4948 conversion, escaped newline splicing, and processing of most directives. |
|
4949 The preprocessor still recognizes and removes comments, so that you can |
|
4950 pass a file preprocessed with \fB\-C\fR to the compiler without |
|
4951 problems. In this mode the integrated preprocessor is little more than |
|
4952 a tokenizer for the front ends. |
|
4953 .Sp |
|
4954 \&\fB\-fpreprocessed\fR is implicit if the input file has one of the |
|
4955 extensions \fB.i\fR, \fB.ii\fR or \fB.mi\fR. These are the |
|
4956 extensions that \s-1GCC\s0 uses for preprocessed files created by |
|
4957 \&\fB\-save-temps\fR. |
|
4958 .Ip "\fB\-ftabstop=\fR\fIwidth\fR" 4 |
|
4959 .IX Item "-ftabstop=width" |
|
4960 Set the distance between tab stops. This helps the preprocessor report |
|
4961 correct column numbers in warnings or errors, even if tabs appear on the |
|
4962 line. If the value is less than 1 or greater than 100, the option is |
|
4963 ignored. The default is 8. |
|
4964 .Ip "\fB\-fexec-charset=\fR\fIcharset\fR" 4 |
|
4965 .IX Item "-fexec-charset=charset" |
|
4966 Set the execution character set, used for string and character |
|
4967 constants. The default is \s-1UTF-8\s0. \fIcharset\fR can be any encoding |
|
4968 supported by the system's \f(CW\*(C`iconv\*(C'\fR library routine. |
|
4969 .Ip "\fB\-fwide-exec-charset=\fR\fIcharset\fR" 4 |
|
4970 .IX Item "-fwide-exec-charset=charset" |
|
4971 Set the wide execution character set, used for wide string and |
|
4972 character constants. The default is \s-1UTF-32\s0 or \s-1UTF-16\s0, whichever |
|
4973 corresponds to the width of \f(CW\*(C`wchar_t\*(C'\fR. As with |
|
4974 \&\fB\-ftarget-charset\fR, \fIcharset\fR can be any encoding supported |
|
4975 by the system's \f(CW\*(C`iconv\*(C'\fR library routine; however, you will have |
|
4976 problems with encodings that do not fit exactly in \f(CW\*(C`wchar_t\*(C'\fR. |
|
4977 .Ip "\fB\-finput-charset=\fR\fIcharset\fR" 4 |
|
4978 .IX Item "-finput-charset=charset" |
|
4979 Set the input character set, used for translation from the character |
|
4980 set of the input file to the source character set used by \s-1GCC\s0. If the |
|
4981 locale does not specify, or \s-1GCC\s0 cannot get this information from the |
|
4982 locale, the default is \s-1UTF-8\s0. This can be overridden by either the locale |
|
4983 or this command line option. Currently the command line option takes |
|
4984 precedence if there's a conflict. \fIcharset\fR can be any encoding |
|
4985 supported by the system's \f(CW\*(C`iconv\*(C'\fR library routine. |
|
4986 .Ip "\fB\-fworking-directory\fR" 4 |
|
4987 .IX Item "-fworking-directory" |
|
4988 Enable generation of linemarkers in the preprocessor output that will |
|
4989 let the compiler know the current working directory at the time of |
|
4990 preprocessing. When this option is enabled, the preprocessor will |
|
4991 emit, after the initial linemarker, a second linemarker with the |
|
4992 current working directory followed by two slashes. \s-1GCC\s0 will use this |
|
4993 directory, when it's present in the preprocessed input, as the |
|
4994 directory emitted as the current working directory in some debugging |
|
4995 information formats. This option is implicitly enabled if debugging |
|
4996 information is enabled, but this can be inhibited with the negated |
|
4997 form \fB\-fno-working-directory\fR. If the \fB\-P\fR flag is |
|
4998 present in the command line, this option has no effect, since no |
|
4999 \&\f(CW\*(C`#line\*(C'\fR directives are emitted whatsoever. |
|
5000 .Ip "\fB\-fno-show-column\fR" 4 |
|
5001 .IX Item "-fno-show-column" |
|
5002 Do not print column numbers in diagnostics. This may be necessary if |
|
5003 diagnostics are being scanned by a program that does not understand the |
|
5004 column numbers, such as \fBdejagnu\fR. |
|
5005 .Ip "\fB\-A\fR \fIpredicate\fR\fB=\fR\fIanswer\fR" 4 |
|
5006 .IX Item "-A predicate=answer" |
|
5007 Make an assertion with the predicate \fIpredicate\fR and answer |
|
5008 \&\fIanswer\fR. This form is preferred to the older form \fB\-A\fR |
|
5009 \&\fIpredicate\fR\fB(\fR\fIanswer\fR\fB)\fR, which is still supported, because |
|
5010 it does not use shell special characters. |
|
5011 .Ip "\fB\-A -\fR\fIpredicate\fR\fB=\fR\fIanswer\fR" 4 |
|
5012 .IX Item "-A -predicate=answer" |
|
5013 Cancel an assertion with the predicate \fIpredicate\fR and answer |
|
5014 \&\fIanswer\fR. |
|
5015 .Ip "\fB\-dCHARS\fR" 4 |
|
5016 .IX Item "-dCHARS" |
|
5017 \&\fI\s-1CHARS\s0\fR is a sequence of one or more of the following characters, |
|
5018 and must not be preceded by a space. Other characters are interpreted |
|
5019 by the compiler proper, or reserved for future versions of \s-1GCC\s0, and so |
|
5020 are silently ignored. If you specify characters whose behavior |
|
5021 conflicts, the result is undefined. |
|
5022 .RS 4 |
|
5023 .Ip "\fBM\fR" 4 |
|
5024 .IX Item "M" |
|
5025 Instead of the normal output, generate a list of \fB#define\fR |
|
5026 directives for all the macros defined during the execution of the |
|
5027 preprocessor, including predefined macros. This gives you a way of |
|
5028 finding out what is predefined in your version of the preprocessor. |
|
5029 Assuming you have no file \fIfoo.h\fR, the command |
|
5030 .Sp |
|
5031 .Vb 1 |
|
5032 \& touch foo.h; cpp -dM foo.h |
|
5033 .Ve |
|
5034 will show all the predefined macros. |
|
5035 .Ip "\fBD\fR" 4 |
|
5036 .IX Item "D" |
|
5037 Like \fBM\fR except in two respects: it does \fInot\fR include the |
|
5038 predefined macros, and it outputs \fIboth\fR the \fB#define\fR |
|
5039 directives and the result of preprocessing. Both kinds of output go to |
|
5040 the standard output file. |
|
5041 .Ip "\fBN\fR" 4 |
|
5042 .IX Item "N" |
|
5043 Like \fBD\fR, but emit only the macro names, not their expansions. |
|
5044 .Ip "\fBI\fR" 4 |
|
5045 .IX Item "I" |
|
5046 Output \fB#include\fR directives in addition to the result of |
|
5047 preprocessing. |
|
5048 .RE |
|
5049 .RS 4 |
|
5050 .RE |
|
5051 .Ip "\fB\-P\fR" 4 |
|
5052 .IX Item "-P" |
|
5053 Inhibit generation of linemarkers in the output from the preprocessor. |
|
5054 This might be useful when running the preprocessor on something that is |
|
5055 not C code, and will be sent to a program which might be confused by the |
|
5056 linemarkers. |
|
5057 .Ip "\fB\-C\fR" 4 |
|
5058 .IX Item "-C" |
|
5059 Do not discard comments. All comments are passed through to the output |
|
5060 file, except for comments in processed directives, which are deleted |
|
5061 along with the directive. |
|
5062 .Sp |
|
5063 You should be prepared for side effects when using \fB\-C\fR; it |
|
5064 causes the preprocessor to treat comments as tokens in their own right. |
|
5065 For example, comments appearing at the start of what would be a |
|
5066 directive line have the effect of turning that line into an ordinary |
|
5067 source line, since the first token on the line is no longer a \fB#\fR. |
|
5068 .Ip "\fB\-CC\fR" 4 |
|
5069 .IX Item "-CC" |
|
5070 Do not discard comments, including during macro expansion. This is |
|
5071 like \fB\-C\fR, except that comments contained within macros are |
|
5072 also passed through to the output file where the macro is expanded. |
|
5073 .Sp |
|
5074 In addition to the side-effects of the \fB\-C\fR option, the |
|
5075 \&\fB\-CC\fR option causes all \*(C+\-style comments inside a macro |
|
5076 to be converted to C-style comments. This is to prevent later use |
|
5077 of that macro from inadvertently commenting out the remainder of |
|
5078 the source line. |
|
5079 .Sp |
|
5080 The \fB\-CC\fR option is generally used to support lint comments. |
|
5081 .Ip "\fB\-traditional-cpp\fR" 4 |
|
5082 .IX Item "-traditional-cpp" |
|
5083 Try to imitate the behavior of old-fashioned C preprocessors, as |
|
5084 opposed to \s-1ISO\s0 C preprocessors. |
|
5085 .Ip "\fB\-trigraphs\fR" 4 |
|
5086 .IX Item "-trigraphs" |
|
5087 Process trigraph sequences. |
|
5088 These are three-character sequences, all starting with \fB??\fR, that |
|
5089 are defined by \s-1ISO\s0 C to stand for single characters. For example, |
|
5090 \&\fB??/\fR stands for \fB\e\fR, so \fB'??/n'\fR is a character |
|
5091 constant for a newline. By default, \s-1GCC\s0 ignores trigraphs, but in |
|
5092 standard-conforming modes it converts them. See the \fB\-std\fR and |
|
5093 \&\fB\-ansi\fR options. |
|
5094 .Sp |
|
5095 The nine trigraphs and their replacements are |
|
5096 .Sp |
|
5097 .Vb 2 |
|
5098 \& Trigraph: ??( ??) ??< ??> ??= ??/ ??' ??! ??- |
|
5099 \& Replacement: [ ] { } # \e ^ | ~ |
|
5100 .Ve |
|
5101 .Ip "\fB\-remap\fR" 4 |
|
5102 .IX Item "-remap" |
|
5103 Enable special code to work around file systems which only permit very |
|
5104 short file names, such as \s-1MS-DOS\s0. |
|
5105 .Ip "\fB\*(--help\fR" 4 |
|
5106 .IX Item "help" |
|
5107 .PD 0 |
|
5108 .Ip "\fB\*(--target-help\fR" 4 |
|
5109 .IX Item "target-help" |
|
5110 .PD |
|
5111 Print text describing all the command line options instead of |
|
5112 preprocessing anything. |
|
5113 .Ip "\fB\-v\fR" 4 |
|
5114 .IX Item "-v" |
|
5115 Verbose mode. Print out \s-1GNU\s0 \s-1CPP\s0's version number at the beginning of |
|
5116 execution, and report the final form of the include path. |
|
5117 .Ip "\fB\-H\fR" 4 |
|
5118 .IX Item "-H" |
|
5119 Print the name of each header file used, in addition to other normal |
|
5120 activities. Each name is indented to show how deep in the |
|
5121 \&\fB#include\fR stack it is. Precompiled header files are also |
|
5122 printed, even if they are found to be invalid; an invalid precompiled |
|
5123 header file is printed with \fB...x\fR and a valid one with \fB...!\fR . |
|
5124 .Ip "\fB\-version\fR" 4 |
|
5125 .IX Item "-version" |
|
5126 .PD 0 |
|
5127 .Ip "\fB\*(--version\fR" 4 |
|
5128 .IX Item "version" |
|
5129 .PD |
|
5130 Print out \s-1GNU\s0 \s-1CPP\s0's version number. With one dash, proceed to |
|
5131 preprocess as normal. With two dashes, exit immediately. |
|
5132 .Sh "Passing Options to the Assembler" |
|
5133 .IX Subsection "Passing Options to the Assembler" |
|
5134 You can pass options to the assembler. |
|
5135 .Ip "\fB\-Wa,\fR\fIoption\fR" 4 |
|
5136 .IX Item "-Wa,option" |
|
5137 Pass \fIoption\fR as an option to the assembler. If \fIoption\fR |
|
5138 contains commas, it is split into multiple options at the commas. |
|
5139 .Ip "\fB\-Xassembler\fR \fIoption\fR" 4 |
|
5140 .IX Item "-Xassembler option" |
|
5141 Pass \fIoption\fR as an option to the assembler. You can use this to |
|
5142 supply system-specific assembler options which \s-1GCC\s0 does not know how to |
|
5143 recognize. |
|
5144 .Sp |
|
5145 If you want to pass an option that takes an argument, you must use |
|
5146 \&\fB\-Xassembler\fR twice, once for the option and once for the argument. |
|
5147 .Sh "Options for Linking" |
|
5148 .IX Subsection "Options for Linking" |
|
5149 These options come into play when the compiler links object files into |
|
5150 an executable output file. They are meaningless if the compiler is |
|
5151 not doing a link step. |
|
5152 .Ip "\fIobject-file-name\fR" 4 |
|
5153 .IX Item "object-file-name" |
|
5154 A file name that does not end in a special recognized suffix is |
|
5155 considered to name an object file or library. (Object files are |
|
5156 distinguished from libraries by the linker according to the file |
|
5157 contents.) If linking is done, these object files are used as input |
|
5158 to the linker. |
|
5159 .Ip "\fB\-c\fR" 4 |
|
5160 .IX Item "-c" |
|
5161 .PD 0 |
|
5162 .Ip "\fB\-S\fR" 4 |
|
5163 .IX Item "-S" |
|
5164 .Ip "\fB\-E\fR" 4 |
|
5165 .IX Item "-E" |
|
5166 .PD |
|
5167 If any of these options is used, then the linker is not run, and |
|
5168 object file names should not be used as arguments. |
|
5169 .Ip "\fB\-l\fR\fIlibrary\fR" 4 |
|
5170 .IX Item "-llibrary" |
|
5171 .PD 0 |
|
5172 .Ip "\fB\-l\fR \fIlibrary\fR" 4 |
|
5173 .IX Item "-l library" |
|
5174 .PD |
|
5175 Search the library named \fIlibrary\fR when linking. (The second |
|
5176 alternative with the library as a separate argument is only for |
|
5177 \&\s-1POSIX\s0 compliance and is not recommended.) |
|
5178 .Sp |
|
5179 It makes a difference where in the command you write this option; the |
|
5180 linker searches and processes libraries and object files in the order they |
|
5181 are specified. Thus, \fBfoo.o \-lz bar.o\fR searches library \fBz\fR |
|
5182 after file \fIfoo.o\fR but before \fIbar.o\fR. If \fIbar.o\fR refers |
|
5183 to functions in \fBz\fR, those functions may not be loaded. |
|
5184 .Sp |
|
5185 The linker searches a standard list of directories for the library, |
|
5186 which is actually a file named \fIlib\fIlibrary\fI.a\fR. The linker |
|
5187 then uses this file as if it had been specified precisely by name. |
|
5188 .Sp |
|
5189 The directories searched include several standard system directories |
|
5190 plus any that you specify with \fB\-L\fR. |
|
5191 .Sp |
|
5192 Normally the files found this way are library files\-\-\-archive files |
|
5193 whose members are object files. The linker handles an archive file by |
|
5194 scanning through it for members which define symbols that have so far |
|
5195 been referenced but not defined. But if the file that is found is an |
|
5196 ordinary object file, it is linked in the usual fashion. The only |
|
5197 difference between using an \fB\-l\fR option and specifying a file name |
|
5198 is that \fB\-l\fR surrounds \fIlibrary\fR with \fBlib\fR and \fB.a\fR |
|
5199 and searches several directories. |
|
5200 .Ip "\fB\-lobjc\fR" 4 |
|
5201 .IX Item "-lobjc" |
|
5202 You need this special case of the \fB\-l\fR option in order to |
|
5203 link an Objective-C program. |
|
5204 .Ip "\fB\-nostartfiles\fR" 4 |
|
5205 .IX Item "-nostartfiles" |
|
5206 Do not use the standard system startup files when linking. |
|
5207 The standard system libraries are used normally, unless \fB\-nostdlib\fR |
|
5208 or \fB\-nodefaultlibs\fR is used. |
|
5209 .Ip "\fB\-nodefaultlibs\fR" 4 |
|
5210 .IX Item "-nodefaultlibs" |
|
5211 Do not use the standard system libraries when linking. |
|
5212 Only the libraries you specify will be passed to the linker. |
|
5213 The standard startup files are used normally, unless \fB\-nostartfiles\fR |
|
5214 is used. The compiler may generate calls to memcmp, memset, and memcpy |
|
5215 for System V (and \s-1ISO\s0 C) environments or to bcopy and bzero for |
|
5216 \&\s-1BSD\s0 environments. These entries are usually resolved by entries in |
|
5217 libc. These entry points should be supplied through some other |
|
5218 mechanism when this option is specified. |
|
5219 .Ip "\fB\-nostdlib\fR" 4 |
|
5220 .IX Item "-nostdlib" |
|
5221 Do not use the standard system startup files or libraries when linking. |
|
5222 No startup files and only the libraries you specify will be passed to |
|
5223 the linker. The compiler may generate calls to memcmp, memset, and memcpy |
|
5224 for System V (and \s-1ISO\s0 C) environments or to bcopy and bzero for |
|
5225 \&\s-1BSD\s0 environments. These entries are usually resolved by entries in |
|
5226 libc. These entry points should be supplied through some other |
|
5227 mechanism when this option is specified. |
|
5228 .Sp |
|
5229 One of the standard libraries bypassed by \fB\-nostdlib\fR and |
|
5230 \&\fB\-nodefaultlibs\fR is \fIlibgcc.a\fR, a library of internal subroutines |
|
5231 that \s-1GCC\s0 uses to overcome shortcomings of particular machines, or special |
|
5232 needs for some languages. |
|
5233 .Sp |
|
5234 In most cases, you need \fIlibgcc.a\fR even when you want to avoid |
|
5235 other standard libraries. In other words, when you specify \fB\-nostdlib\fR |
|
5236 or \fB\-nodefaultlibs\fR you should usually specify \fB\-lgcc\fR as well. |
|
5237 This ensures that you have no unresolved references to internal \s-1GCC\s0 |
|
5238 library subroutines. (For example, \fB_\|_main\fR, used to ensure \*(C+ |
|
5239 constructors will be called.) |
|
5240 .Ip "\fB\-pie\fR" 4 |
|
5241 .IX Item "-pie" |
|
5242 Produce a position independent executable on targets which support it. |
|
5243 For predictable results, you must also specify the same set of options |
|
5244 that were used to generate code (\fB\-fpie\fR, \fB\-fPIE\fR, |
|
5245 or model suboptions) when you specify this option. |
|
5246 .Ip "\fB\-s\fR" 4 |
|
5247 .IX Item "-s" |
|
5248 Remove all symbol table and relocation information from the executable. |
|
5249 .Ip "\fB\-static\fR" 4 |
|
5250 .IX Item "-static" |
|
5251 On systems that support dynamic linking, this prevents linking with the shared |
|
5252 libraries. On other systems, this option has no effect. |
|
5253 .Ip "\fB\-shared\fR" 4 |
|
5254 .IX Item "-shared" |
|
5255 Produce a shared object which can then be linked with other objects to |
|
5256 form an executable. Not all systems support this option. For predictable |
|
5257 results, you must also specify the same set of options that were used to |
|
5258 generate code (\fB\-fpic\fR, \fB\-fPIC\fR, or model suboptions) |
|
5259 when you specify this option.[1] |
|
5260 .Ip "\fB\-shared-libgcc\fR" 4 |
|
5261 .IX Item "-shared-libgcc" |
|
5262 .PD 0 |
|
5263 .Ip "\fB\-static-libgcc\fR" 4 |
|
5264 .IX Item "-static-libgcc" |
|
5265 .PD |
|
5266 On systems that provide \fIlibgcc\fR as a shared library, these options |
|
5267 force the use of either the shared or static version respectively. |
|
5268 If no shared version of \fIlibgcc\fR was built when the compiler was |
|
5269 configured, these options have no effect. |
|
5270 .Sp |
|
5271 There are several situations in which an application should use the |
|
5272 shared \fIlibgcc\fR instead of the static version. The most common |
|
5273 of these is when the application wishes to throw and catch exceptions |
|
5274 across different shared libraries. In that case, each of the libraries |
|
5275 as well as the application itself should use the shared \fIlibgcc\fR. |
|
5276 .Sp |
|
5277 Therefore, the G++ and \s-1GCJ\s0 drivers automatically add |
|
5278 \&\fB\-shared-libgcc\fR whenever you build a shared library or a main |
|
5279 executable, because \*(C+ and Java programs typically use exceptions, so |
|
5280 this is the right thing to do. |
|
5281 .Sp |
|
5282 If, instead, you use the \s-1GCC\s0 driver to create shared libraries, you may |
|
5283 find that they will not always be linked with the shared \fIlibgcc\fR. |
|
5284 If \s-1GCC\s0 finds, at its configuration time, that you have a non-GNU linker |
|
5285 or a \s-1GNU\s0 linker that does not support option \fB\*(--eh-frame-hdr\fR, |
|
5286 it will link the shared version of \fIlibgcc\fR into shared libraries |
|
5287 by default. Otherwise, it will take advantage of the linker and optimize |
|
5288 away the linking with the shared version of \fIlibgcc\fR, linking with |
|
5289 the static version of libgcc by default. This allows exceptions to |
|
5290 propagate through such shared libraries, without incurring relocation |
|
5291 costs at library load time. |
|
5292 .Sp |
|
5293 However, if a library or main executable is supposed to throw or catch |
|
5294 exceptions, you must link it using the G++ or \s-1GCJ\s0 driver, as appropriate |
|
5295 for the languages used in the program, or using the option |
|
5296 \&\fB\-shared-libgcc\fR, such that it is linked with the shared |
|
5297 \&\fIlibgcc\fR. |
|
5298 .Ip "\fB\-symbolic\fR" 4 |
|
5299 .IX Item "-symbolic" |
|
5300 Bind references to global symbols when building a shared object. Warn |
|
5301 about any unresolved references (unless overridden by the link editor |
|
5302 option \fB\-Xlinker \-z \-Xlinker defs\fR). Only a few systems support |
|
5303 this option. |
|
5304 .Ip "\fB\-Xlinker\fR \fIoption\fR" 4 |
|
5305 .IX Item "-Xlinker option" |
|
5306 Pass \fIoption\fR as an option to the linker. You can use this to |
|
5307 supply system-specific linker options which \s-1GCC\s0 does not know how to |
|
5308 recognize. |
|
5309 .Sp |
|
5310 If you want to pass an option that takes an argument, you must use |
|
5311 \&\fB\-Xlinker\fR twice, once for the option and once for the argument. |
|
5312 For example, to pass \fB\-assert definitions\fR, you must write |
|
5313 \&\fB\-Xlinker \-assert \-Xlinker definitions\fR. It does not work to write |
|
5314 \&\fB\-Xlinker \*(L"\-assert definitions\*(R"\fR, because this passes the entire |
|
5315 string as a single argument, which is not what the linker expects. |
|
5316 .Ip "\fB\-Wl,\fR\fIoption\fR" 4 |
|
5317 .IX Item "-Wl,option" |
|
5318 Pass \fIoption\fR as an option to the linker. If \fIoption\fR contains |
|
5319 commas, it is split into multiple options at the commas. |
|
5320 .Ip "\fB\-u\fR \fIsymbol\fR" 4 |
|
5321 .IX Item "-u symbol" |
|
5322 Pretend the symbol \fIsymbol\fR is undefined, to force linking of |
|
5323 library modules to define it. You can use \fB\-u\fR multiple times with |
|
5324 different symbols to force loading of additional library modules. |
|
5325 .Sh "Options for Directory Search" |
|
5326 .IX Subsection "Options for Directory Search" |
|
5327 These options specify directories to search for header files, for |
|
5328 libraries and for parts of the compiler: |
|
5329 .Ip "\fB\-I\fR\fIdir\fR" 4 |
|
5330 .IX Item "-Idir" |
|
5331 Add the directory \fIdir\fR to the head of the list of directories to be |
|
5332 searched for header files. This can be used to override a system header |
|
5333 file, substituting your own version, since these directories are |
|
5334 searched before the system header file directories. However, you should |
|
5335 not use this option to add directories that contain vendor-supplied |
|
5336 system header files (use \fB\-isystem\fR for that). If you use more than |
|
5337 one \fB\-I\fR option, the directories are scanned in left-to-right |
|
5338 order; the standard system directories come after. |
|
5339 .Sp |
|
5340 If a standard system include directory, or a directory specified with |
|
5341 \&\fB\-isystem\fR, is also specified with \fB\-I\fR, the \fB\-I\fR |
|
5342 option will be ignored. The directory will still be searched but as a |
|
5343 system directory at its normal position in the system include chain. |
|
5344 This is to ensure that \s-1GCC\s0's procedure to fix buggy system headers and |
|
5345 the ordering for the include_next directive are not inadvertently changed. |
|
5346 If you really need to change the search order for system directories, |
|
5347 use the \fB\-nostdinc\fR and/or \fB\-isystem\fR options. |
|
5348 .Ip "\fB\-I-\fR" 4 |
|
5349 .IX Item "-I-" |
|
5350 Any directories you specify with \fB\-I\fR options before the \fB\-I-\fR |
|
5351 option are searched only for the case of \fB#include "\fR\fIfile\fR\fB"\fR; |
|
5352 they are not searched for \fB#include <\fR\fIfile\fR\fB>\fR. |
|
5353 .Sp |
|
5354 If additional directories are specified with \fB\-I\fR options after |
|
5355 the \fB\-I-\fR, these directories are searched for all \fB#include\fR |
|
5356 directives. (Ordinarily \fIall\fR \fB\-I\fR directories are used |
|
5357 this way.) |
|
5358 .Sp |
|
5359 In addition, the \fB\-I-\fR option inhibits the use of the current |
|
5360 directory (where the current input file came from) as the first search |
|
5361 directory for \fB#include "\fR\fIfile\fR\fB"\fR. There is no way to |
|
5362 override this effect of \fB\-I-\fR. With \fB\-I.\fR you can specify |
|
5363 searching the directory which was current when the compiler was |
|
5364 invoked. That is not exactly the same as what the preprocessor does |
|
5365 by default, but it is often satisfactory. |
|
5366 .Sp |
|
5367 \&\fB\-I-\fR does not inhibit the use of the standard system directories |
|
5368 for header files. Thus, \fB\-I-\fR and \fB\-nostdinc\fR are |
|
5369 independent. |
|
5370 .Ip "\fB\-L\fR\fIdir\fR" 4 |
|
5371 .IX Item "-Ldir" |
|
5372 Add directory \fIdir\fR to the list of directories to be searched |
|
5373 for \fB\-l\fR. |
|
5374 .Ip "\fB\-B\fR\fIprefix\fR" 4 |
|
5375 .IX Item "-Bprefix" |
|
5376 This option specifies where to find the executables, libraries, |
|
5377 include files, and data files of the compiler itself. |
|
5378 .Sp |
|
5379 The compiler driver program runs one or more of the subprograms |
|
5380 \&\fIcpp\fR, \fIcc1\fR, \fIas\fR and \fIld\fR. It tries |
|
5381 \&\fIprefix\fR as a prefix for each program it tries to run, both with and |
|
5382 without \fImachine\fR\fB/\fR\fIversion\fR\fB/\fR. |
|
5383 .Sp |
|
5384 For each subprogram to be run, the compiler driver first tries the |
|
5385 \&\fB\-B\fR prefix, if any. If that name is not found, or if \fB\-B\fR |
|
5386 was not specified, the driver tries two standard prefixes, which are |
|
5387 \&\fI/usr/lib/gcc/\fR and \fI/usr/local/lib/gcc/\fR. If neither of |
|
5388 those results in a file name that is found, the unmodified program |
|
5389 name is searched for using the directories specified in your |
|
5390 \&\fB\s-1PATH\s0\fR environment variable. |
|
5391 .Sp |
|
5392 The compiler will check to see if the path provided by the \fB\-B\fR |
|
5393 refers to a directory, and if necessary it will add a directory |
|
5394 separator character at the end of the path. |
|
5395 .Sp |
|
5396 \&\fB\-B\fR prefixes that effectively specify directory names also apply |
|
5397 to libraries in the linker, because the compiler translates these |
|
5398 options into \fB\-L\fR options for the linker. They also apply to |
|
5399 includes files in the preprocessor, because the compiler translates these |
|
5400 options into \fB\-isystem\fR options for the preprocessor. In this case, |
|
5401 the compiler appends \fBinclude\fR to the prefix. |
|
5402 .Sp |
|
5403 The run-time support file \fIlibgcc.a\fR can also be searched for using |
|
5404 the \fB\-B\fR prefix, if needed. If it is not found there, the two |
|
5405 standard prefixes above are tried, and that is all. The file is left |
|
5406 out of the link if it is not found by those means. |
|
5407 .Sp |
|
5408 Another way to specify a prefix much like the \fB\-B\fR prefix is to use |
|
5409 the environment variable \fB\s-1GCC_EXEC_PREFIX\s0\fR. |
|
5410 .Sp |
|
5411 As a special kludge, if the path provided by \fB\-B\fR is |
|
5412 \&\fI[dir/]stage\fIN\fI/\fR, where \fIN\fR is a number in the range 0 to |
|
5413 9, then it will be replaced by \fI[dir/]include\fR. This is to help |
|
5414 with boot-strapping the compiler. |
|
5415 .Ip "\fB\-specs=\fR\fIfile\fR" 4 |
|
5416 .IX Item "-specs=file" |
|
5417 Process \fIfile\fR after the compiler reads in the standard \fIspecs\fR |
|
5418 file, in order to override the defaults that the \fIgcc\fR driver |
|
5419 program uses when determining what switches to pass to \fIcc1\fR, |
|
5420 \&\fIcc1plus\fR, \fIas\fR, \fIld\fR, etc. More than one |
|
5421 \&\fB\-specs=\fR\fIfile\fR can be specified on the command line, and they |
|
5422 are processed in order, from left to right. |
|
5423 .Sh "Specifying Target Machine and Compiler Version" |
|
5424 .IX Subsection "Specifying Target Machine and Compiler Version" |
|
5425 The usual way to run \s-1GCC\s0 is to run the executable called \fIgcc\fR, or |
|
5426 \&\fI<machine>\-gcc\fR when cross-compiling, or |
|
5427 \&\fI<machine>\-gcc-<version>\fR to run a version other than the one that |
|
5428 was installed last. Sometimes this is inconvenient, so \s-1GCC\s0 provides |
|
5429 options that will switch to another cross-compiler or version. |
|
5430 .Ip "\fB\-b\fR \fImachine\fR" 4 |
|
5431 .IX Item "-b machine" |
|
5432 The argument \fImachine\fR specifies the target machine for compilation. |
|
5433 .Sp |
|
5434 The value to use for \fImachine\fR is the same as was specified as the |
|
5435 machine type when configuring \s-1GCC\s0 as a cross-compiler. For |
|
5436 example, if a cross-compiler was configured with \fBconfigure |
|
5437 i386v\fR, meaning to compile for an 80386 running System V, then you |
|
5438 would specify \fB\-b i386v\fR to run that cross compiler. |
|
5439 .Ip "\fB\-V\fR \fIversion\fR" 4 |
|
5440 .IX Item "-V version" |
|
5441 The argument \fIversion\fR specifies which version of \s-1GCC\s0 to run. |
|
5442 This is useful when multiple versions are installed. For example, |
|
5443 \&\fIversion\fR might be \fB2.0\fR, meaning to run \s-1GCC\s0 version 2.0. |
|
5444 .PP |
|
5445 The \fB\-V\fR and \fB\-b\fR options work by running the |
|
5446 \&\fI<machine>\-gcc-<version>\fR executable, so there's no real reason to |
|
5447 use them if you can just run that directly. |
|
5448 .Sh "Hardware Models and Configurations" |
|
5449 .IX Subsection "Hardware Models and Configurations" |
|
5450 Earlier we discussed the standard option \fB\-b\fR which chooses among |
|
5451 different installed compilers for completely different target |
|
5452 machines, such as \s-1VAX\s0 vs. 68000 vs. 80386. |
|
5453 .PP |
|
5454 In addition, each of these target machine types can have its own |
|
5455 special options, starting with \fB\-m\fR, to choose among various |
|
5456 hardware models or configurations\-\-\-for example, 68010 vs 68020, |
|
5457 floating coprocessor or none. A single installed version of the |
|
5458 compiler can compile for any model or configuration, according to the |
|
5459 options specified. |
|
5460 .PP |
|
5461 Some configurations of the compiler also support additional special |
|
5462 options, usually for compatibility with other compilers on the same |
|
5463 platform. |
|
5464 .PP |
|
5465 These options are defined by the macro \f(CW\*(C`TARGET_SWITCHES\*(C'\fR in the |
|
5466 machine description. The default for the options is also defined by |
|
5467 that macro, which enables you to change the defaults. |
|
5468 .PP |
|
5469 .I "M680x0 Options" |
|
5470 .IX Subsection "M680x0 Options" |
|
5471 .PP |
|
5472 These are the \fB\-m\fR options defined for the 68000 series. The default |
|
5473 values for these options depends on which style of 68000 was selected when |
|
5474 the compiler was configured; the defaults for the most common choices are |
|
5475 given below. |
|
5476 .Ip "\fB\-m68000\fR" 4 |
|
5477 .IX Item "-m68000" |
|
5478 .PD 0 |
|
5479 .Ip "\fB\-mc68000\fR" 4 |
|
5480 .IX Item "-mc68000" |
|
5481 .PD |
|
5482 Generate output for a 68000. This is the default |
|
5483 when the compiler is configured for 68000\-based systems. |
|
5484 .Sp |
|
5485 Use this option for microcontrollers with a 68000 or \s-1EC000\s0 core, |
|
5486 including the 68008, 68302, 68306, 68307, 68322, 68328 and 68356. |
|
5487 .Ip "\fB\-m68020\fR" 4 |
|
5488 .IX Item "-m68020" |
|
5489 .PD 0 |
|
5490 .Ip "\fB\-mc68020\fR" 4 |
|
5491 .IX Item "-mc68020" |
|
5492 .PD |
|
5493 Generate output for a 68020. This is the default |
|
5494 when the compiler is configured for 68020\-based systems. |
|
5495 .Ip "\fB\-m68881\fR" 4 |
|
5496 .IX Item "-m68881" |
|
5497 Generate output containing 68881 instructions for floating point. |
|
5498 This is the default for most 68020 systems unless \fB\*(--nfp\fR was |
|
5499 specified when the compiler was configured. |
|
5500 .Ip "\fB\-m68030\fR" 4 |
|
5501 .IX Item "-m68030" |
|
5502 Generate output for a 68030. This is the default when the compiler is |
|
5503 configured for 68030\-based systems. |
|
5504 .Ip "\fB\-m68040\fR" 4 |
|
5505 .IX Item "-m68040" |
|
5506 Generate output for a 68040. This is the default when the compiler is |
|
5507 configured for 68040\-based systems. |
|
5508 .Sp |
|
5509 This option inhibits the use of 68881/68882 instructions that have to be |
|
5510 emulated by software on the 68040. Use this option if your 68040 does not |
|
5511 have code to emulate those instructions. |
|
5512 .Ip "\fB\-m68060\fR" 4 |
|
5513 .IX Item "-m68060" |
|
5514 Generate output for a 68060. This is the default when the compiler is |
|
5515 configured for 68060\-based systems. |
|
5516 .Sp |
|
5517 This option inhibits the use of 68020 and 68881/68882 instructions that |
|
5518 have to be emulated by software on the 68060. Use this option if your 68060 |
|
5519 does not have code to emulate those instructions. |
|
5520 .Ip "\fB\-mcpu32\fR" 4 |
|
5521 .IX Item "-mcpu32" |
|
5522 Generate output for a \s-1CPU32\s0. This is the default |
|
5523 when the compiler is configured for CPU32\-based systems. |
|
5524 .Sp |
|
5525 Use this option for microcontrollers with a |
|
5526 \&\s-1CPU32\s0 or \s-1CPU32+\s0 core, including the 68330, 68331, 68332, 68333, 68334, |
|
5527 68336, 68340, 68341, 68349 and 68360. |
|
5528 .Ip "\fB\-m5200\fR" 4 |
|
5529 .IX Item "-m5200" |
|
5530 Generate output for a 520X ``coldfire'' family cpu. This is the default |
|
5531 when the compiler is configured for 520X-based systems. |
|
5532 .Sp |
|
5533 Use this option for microcontroller with a 5200 core, including |
|
5534 the \s-1MCF5202\s0, \s-1MCF5203\s0, \s-1MCF5204\s0 and \s-1MCF5202\s0. |
|
5535 .Ip "\fB\-m68020\-40\fR" 4 |
|
5536 .IX Item "-m68020-40" |
|
5537 Generate output for a 68040, without using any of the new instructions. |
|
5538 This results in code which can run relatively efficiently on either a |
|
5539 68020/68881 or a 68030 or a 68040. The generated code does use the |
|
5540 68881 instructions that are emulated on the 68040. |
|
5541 .Ip "\fB\-m68020\-60\fR" 4 |
|
5542 .IX Item "-m68020-60" |
|
5543 Generate output for a 68060, without using any of the new instructions. |
|
5544 This results in code which can run relatively efficiently on either a |
|
5545 68020/68881 or a 68030 or a 68040. The generated code does use the |
|
5546 68881 instructions that are emulated on the 68060. |
|
5547 .Ip "\fB\-msoft-float\fR" 4 |
|
5548 .IX Item "-msoft-float" |
|
5549 Generate output containing library calls for floating point. |
|
5550 \&\fBWarning:\fR the requisite libraries are not available for all m68k |
|
5551 targets. Normally the facilities of the machine's usual C compiler are |
|
5552 used, but this can't be done directly in cross-compilation. You must |
|
5553 make your own arrangements to provide suitable library functions for |
|
5554 cross-compilation. The embedded targets \fBm68k-*\-aout\fR and |
|
5555 \&\fBm68k-*\-coff\fR do provide software floating point support. |
|
5556 .Ip "\fB\-mshort\fR" 4 |
|
5557 .IX Item "-mshort" |
|
5558 Consider type \f(CW\*(C`int\*(C'\fR to be 16 bits wide, like \f(CW\*(C`short int\*(C'\fR. |
|
5559 .Ip "\fB\-mnobitfield\fR" 4 |
|
5560 .IX Item "-mnobitfield" |
|
5561 Do not use the bit-field instructions. The \fB\-m68000\fR, \fB\-mcpu32\fR |
|
5562 and \fB\-m5200\fR options imply \fB\-mnobitfield\fR. |
|
5563 .Ip "\fB\-mbitfield\fR" 4 |
|
5564 .IX Item "-mbitfield" |
|
5565 Do use the bit-field instructions. The \fB\-m68020\fR option implies |
|
5566 \&\fB\-mbitfield\fR. This is the default if you use a configuration |
|
5567 designed for a 68020. |
|
5568 .Ip "\fB\-mrtd\fR" 4 |
|
5569 .IX Item "-mrtd" |
|
5570 Use a different function-calling convention, in which functions |
|
5571 that take a fixed number of arguments return with the \f(CW\*(C`rtd\*(C'\fR |
|
5572 instruction, which pops their arguments while returning. This |
|
5573 saves one instruction in the caller since there is no need to pop |
|
5574 the arguments there. |
|
5575 .Sp |
|
5576 \&\fBWarning:\fR this calling convention is incompatible with the |
|
5577 one normally used on Unix or with \s-1GCC\s0, so you cannot use it if you |
|
5578 need to call libraries compiled with the Unix compiler or with \s-1GCC\s0 |
|
5579 without the switch. |
|
5580 .Sp |
|
5581 Also, you must provide function prototypes for all functions that |
|
5582 take variable numbers of arguments (including \f(CW\*(C`printf\*(C'\fR); |
|
5583 otherwise incorrect code will be generated for calls to those |
|
5584 functions. |
|
5585 .Sp |
|
5586 In addition, seriously incorrect code will result if you call a |
|
5587 function with too many arguments. (Normally, extra arguments are |
|
5588 harmlessly ignored.) |
|
5589 .Sp |
|
5590 The \f(CW\*(C`rtd\*(C'\fR instruction is supported by the 68010, 68020, 68030, |
|
5591 68040, 68060 and \s-1CPU32\s0 processors, but not by the 68000 or 5200. |
|
5592 .Ip "\fB\-malign-int\fR" 4 |
|
5593 .IX Item "-malign-int" |
|
5594 .PD 0 |
|
5595 .Ip "\fB\-mno-align-int\fR" 4 |
|
5596 .IX Item "-mno-align-int" |
|
5597 .PD |
|
5598 Control whether \s-1GCC\s0 aligns \f(CW\*(C`int\*(C'\fR, \f(CW\*(C`long\*(C'\fR, \f(CW\*(C`long long\*(C'\fR, |
|
5599 \&\f(CW\*(C`float\*(C'\fR, \f(CW\*(C`double\*(C'\fR, and \f(CW\*(C`long double\*(C'\fR variables on a 32\-bit |
|
5600 boundary (\fB\-malign-int\fR) or a 16\-bit boundary (\fB\-mno-align-int\fR). |
|
5601 Aligning variables on 32\-bit boundaries produces code that runs somewhat |
|
5602 faster on processors with 32\-bit busses at the expense of more memory. |
|
5603 .Sp |
|
5604 \&\fBWarning:\fR if you use the \fB\-malign-int\fR switch, \s-1GCC\s0 will |
|
5605 align structures containing the above types differently than |
|
5606 most published application binary interface specifications for the m68k. |
|
5607 .Ip "\fB\-mpcrel\fR" 4 |
|
5608 .IX Item "-mpcrel" |
|
5609 Use the pc-relative addressing mode of the 68000 directly, instead of |
|
5610 using a global offset table. At present, this option implies \fB\-fpic\fR, |
|
5611 allowing at most a 16\-bit offset for pc-relative addressing. \fB\-fPIC\fR is |
|
5612 not presently supported with \fB\-mpcrel\fR, though this could be supported for |
|
5613 68020 and higher processors. |
|
5614 .Ip "\fB\-mno-strict-align\fR" 4 |
|
5615 .IX Item "-mno-strict-align" |
|
5616 .PD 0 |
|
5617 .Ip "\fB\-mstrict-align\fR" 4 |
|
5618 .IX Item "-mstrict-align" |
|
5619 .PD |
|
5620 Do not (do) assume that unaligned memory references will be handled by |
|
5621 the system. |
|
5622 .Ip "\fB\-msep-data\fR" 4 |
|
5623 .IX Item "-msep-data" |
|
5624 Generate code that allows the data segment to be located in a different |
|
5625 area of memory from the text segment. This allows for execute in place in |
|
5626 an environment without virtual memory management. This option implies \-fPIC. |
|
5627 .Ip "\fB\-mno-sep-data\fR" 4 |
|
5628 .IX Item "-mno-sep-data" |
|
5629 Generate code that assumes that the data segment follows the text segment. |
|
5630 This is the default. |
|
5631 .Ip "\fB\-mid-shared-library\fR" 4 |
|
5632 .IX Item "-mid-shared-library" |
|
5633 Generate code that supports shared libraries via the library \s-1ID\s0 method. |
|
5634 This allows for execute in place and shared libraries in an environment |
|
5635 without virtual memory management. This option implies \-fPIC. |
|
5636 .Ip "\fB\-mno-id-shared-library\fR" 4 |
|
5637 .IX Item "-mno-id-shared-library" |
|
5638 Generate code that doesn't assume \s-1ID\s0 based shared libraries are being used. |
|
5639 This is the default. |
|
5640 .Ip "\fB\-mshared-library-id=n\fR" 4 |
|
5641 .IX Item "-mshared-library-id=n" |
|
5642 Specified the identification number of the \s-1ID\s0 based shared library being |
|
5643 compiled. Specifying a value of 0 will generate more compact code, specifying |
|
5644 other values will force the allocation of that number to the current |
|
5645 library but is no more space or time efficient than omitting this option. |
|
5646 .PP |
|
5647 .I "M68hc1x Options" |
|
5648 .IX Subsection "M68hc1x Options" |
|
5649 .PP |
|
5650 These are the \fB\-m\fR options defined for the 68hc11 and 68hc12 |
|
5651 microcontrollers. The default values for these options depends on |
|
5652 which style of microcontroller was selected when the compiler was configured; |
|
5653 the defaults for the most common choices are given below. |
|
5654 .Ip "\fB\-m6811\fR" 4 |
|
5655 .IX Item "-m6811" |
|
5656 .PD 0 |
|
5657 .Ip "\fB\-m68hc11\fR" 4 |
|
5658 .IX Item "-m68hc11" |
|
5659 .PD |
|
5660 Generate output for a 68HC11. This is the default |
|
5661 when the compiler is configured for 68HC11\-based systems. |
|
5662 .Ip "\fB\-m6812\fR" 4 |
|
5663 .IX Item "-m6812" |
|
5664 .PD 0 |
|
5665 .Ip "\fB\-m68hc12\fR" 4 |
|
5666 .IX Item "-m68hc12" |
|
5667 .PD |
|
5668 Generate output for a 68HC12. This is the default |
|
5669 when the compiler is configured for 68HC12\-based systems. |
|
5670 .Ip "\fB\-m68S12\fR" 4 |
|
5671 .IX Item "-m68S12" |
|
5672 .PD 0 |
|
5673 .Ip "\fB\-m68hcs12\fR" 4 |
|
5674 .IX Item "-m68hcs12" |
|
5675 .PD |
|
5676 Generate output for a 68HCS12. |
|
5677 .Ip "\fB\-mauto-incdec\fR" 4 |
|
5678 .IX Item "-mauto-incdec" |
|
5679 Enable the use of 68HC12 pre and post auto-increment and auto-decrement |
|
5680 addressing modes. |
|
5681 .Ip "\fB\-minmax\fR" 4 |
|
5682 .IX Item "-minmax" |
|
5683 .PD 0 |
|
5684 .Ip "\fB\-nominmax\fR" 4 |
|
5685 .IX Item "-nominmax" |
|
5686 .PD |
|
5687 Enable the use of 68HC12 min and max instructions. |
|
5688 .Ip "\fB\-mlong-calls\fR" 4 |
|
5689 .IX Item "-mlong-calls" |
|
5690 .PD 0 |
|
5691 .Ip "\fB\-mno-long-calls\fR" 4 |
|
5692 .IX Item "-mno-long-calls" |
|
5693 .PD |
|
5694 Treat all calls as being far away (near). If calls are assumed to be |
|
5695 far away, the compiler will use the \f(CW\*(C`call\*(C'\fR instruction to |
|
5696 call a function and the \f(CW\*(C`rtc\*(C'\fR instruction for returning. |
|
5697 .Ip "\fB\-mshort\fR" 4 |
|
5698 .IX Item "-mshort" |
|
5699 Consider type \f(CW\*(C`int\*(C'\fR to be 16 bits wide, like \f(CW\*(C`short int\*(C'\fR. |
|
5700 .Ip "\fB\-msoft-reg-count=\fR\fIcount\fR" 4 |
|
5701 .IX Item "-msoft-reg-count=count" |
|
5702 Specify the number of pseudo-soft registers which are used for the |
|
5703 code generation. The maximum number is 32. Using more pseudo-soft |
|
5704 register may or may not result in better code depending on the program. |
|
5705 The default is 4 for 68HC11 and 2 for 68HC12. |
|
5706 .PP |
|
5707 .I "\s-1VAX\s0 Options" |
|
5708 .IX Subsection "VAX Options" |
|
5709 .PP |
|
5710 These \fB\-m\fR options are defined for the \s-1VAX:\s0 |
|
5711 .Ip "\fB\-munix\fR" 4 |
|
5712 .IX Item "-munix" |
|
5713 Do not output certain jump instructions (\f(CW\*(C`aobleq\*(C'\fR and so on) |
|
5714 that the Unix assembler for the \s-1VAX\s0 cannot handle across long |
|
5715 ranges. |
|
5716 .Ip "\fB\-mgnu\fR" 4 |
|
5717 .IX Item "-mgnu" |
|
5718 Do output those jump instructions, on the assumption that you |
|
5719 will assemble with the \s-1GNU\s0 assembler. |
|
5720 .Ip "\fB\-mg\fR" 4 |
|
5721 .IX Item "-mg" |
|
5722 Output code for g-format floating point numbers instead of d-format. |
|
5723 .PP |
|
5724 .I "\s-1SPARC\s0 Options" |
|
5725 .IX Subsection "SPARC Options" |
|
5726 .PP |
|
5727 These \fB\-m\fR options are supported on the \s-1SPARC:\s0 |
|
5728 .Ip "\fB\-mno-app-regs\fR" 4 |
|
5729 .IX Item "-mno-app-regs" |
|
5730 .PD 0 |
|
5731 .Ip "\fB\-mapp-regs\fR" 4 |
|
5732 .IX Item "-mapp-regs" |
|
5733 .PD |
|
5734 Specify \fB\-mapp-regs\fR to generate output using the global registers |
|
5735 2 through 4, which the \s-1SPARC\s0 \s-1SVR4\s0 \s-1ABI\s0 reserves for applications. This |
|
5736 is the default, except on Solaris. |
|
5737 .Sp |
|
5738 To be fully \s-1SVR4\s0 \s-1ABI\s0 compliant at the cost of some performance loss, |
|
5739 specify \fB\-mno-app-regs\fR. You should compile libraries and system |
|
5740 software with this option. |
|
5741 .Ip "\fB\-mfpu\fR" 4 |
|
5742 .IX Item "-mfpu" |
|
5743 .PD 0 |
|
5744 .Ip "\fB\-mhard-float\fR" 4 |
|
5745 .IX Item "-mhard-float" |
|
5746 .PD |
|
5747 Generate output containing floating point instructions. This is the |
|
5748 default. |
|
5749 .Ip "\fB\-mno-fpu\fR" 4 |
|
5750 .IX Item "-mno-fpu" |
|
5751 .PD 0 |
|
5752 .Ip "\fB\-msoft-float\fR" 4 |
|
5753 .IX Item "-msoft-float" |
|
5754 .PD |
|
5755 Generate output containing library calls for floating point. |
|
5756 \&\fBWarning:\fR the requisite libraries are not available for all \s-1SPARC\s0 |
|
5757 targets. Normally the facilities of the machine's usual C compiler are |
|
5758 used, but this cannot be done directly in cross-compilation. You must make |
|
5759 your own arrangements to provide suitable library functions for |
|
5760 cross-compilation. The embedded targets \fBsparc-*\-aout\fR and |
|
5761 \&\fBsparclite-*\-*\fR do provide software floating point support. |
|
5762 .Sp |
|
5763 \&\fB\-msoft-float\fR changes the calling convention in the output file; |
|
5764 therefore, it is only useful if you compile \fIall\fR of a program with |
|
5765 this option. In particular, you need to compile \fIlibgcc.a\fR, the |
|
5766 library that comes with \s-1GCC\s0, with \fB\-msoft-float\fR in order for |
|
5767 this to work. |
|
5768 .Ip "\fB\-mhard-quad-float\fR" 4 |
|
5769 .IX Item "-mhard-quad-float" |
|
5770 Generate output containing quad-word (long double) floating point |
|
5771 instructions. |
|
5772 .Ip "\fB\-msoft-quad-float\fR" 4 |
|
5773 .IX Item "-msoft-quad-float" |
|
5774 Generate output containing library calls for quad-word (long double) |
|
5775 floating point instructions. The functions called are those specified |
|
5776 in the \s-1SPARC\s0 \s-1ABI\s0. This is the default. |
|
5777 .Sp |
|
5778 As of this writing, there are no \s-1SPARC\s0 implementations that have hardware |
|
5779 support for the quad-word floating point instructions. They all invoke |
|
5780 a trap handler for one of these instructions, and then the trap handler |
|
5781 emulates the effect of the instruction. Because of the trap handler overhead, |
|
5782 this is much slower than calling the \s-1ABI\s0 library routines. Thus the |
|
5783 \&\fB\-msoft-quad-float\fR option is the default. |
|
5784 .Ip "\fB\-mno-flat\fR" 4 |
|
5785 .IX Item "-mno-flat" |
|
5786 .PD 0 |
|
5787 .Ip "\fB\-mflat\fR" 4 |
|
5788 .IX Item "-mflat" |
|
5789 .PD |
|
5790 With \fB\-mflat\fR, the compiler does not generate save/restore instructions |
|
5791 and will use a ``flat'' or single register window calling convention. |
|
5792 This model uses \f(CW%i7\fR as the frame pointer and is compatible with the normal |
|
5793 register window model. Code from either may be intermixed. |
|
5794 The local registers and the input registers (0\*(--5) are still treated as |
|
5795 ``call saved'' registers and will be saved on the stack as necessary. |
|
5796 .Sp |
|
5797 With \fB\-mno-flat\fR (the default), the compiler emits save/restore |
|
5798 instructions (except for leaf functions) and is the normal mode of operation. |
|
5799 .Sp |
|
5800 These options are deprecated and will be deleted in a future \s-1GCC\s0 release. |
|
5801 .Ip "\fB\-mno-unaligned-doubles\fR" 4 |
|
5802 .IX Item "-mno-unaligned-doubles" |
|
5803 .PD 0 |
|
5804 .Ip "\fB\-munaligned-doubles\fR" 4 |
|
5805 .IX Item "-munaligned-doubles" |
|
5806 .PD |
|
5807 Assume that doubles have 8 byte alignment. This is the default. |
|
5808 .Sp |
|
5809 With \fB\-munaligned-doubles\fR, \s-1GCC\s0 assumes that doubles have 8 byte |
|
5810 alignment only if they are contained in another type, or if they have an |
|
5811 absolute address. Otherwise, it assumes they have 4 byte alignment. |
|
5812 Specifying this option avoids some rare compatibility problems with code |
|
5813 generated by other compilers. It is not the default because it results |
|
5814 in a performance loss, especially for floating point code. |
|
5815 .Ip "\fB\-mno-faster-structs\fR" 4 |
|
5816 .IX Item "-mno-faster-structs" |
|
5817 .PD 0 |
|
5818 .Ip "\fB\-mfaster-structs\fR" 4 |
|
5819 .IX Item "-mfaster-structs" |
|
5820 .PD |
|
5821 With \fB\-mfaster-structs\fR, the compiler assumes that structures |
|
5822 should have 8 byte alignment. This enables the use of pairs of |
|
5823 \&\f(CW\*(C`ldd\*(C'\fR and \f(CW\*(C`std\*(C'\fR instructions for copies in structure |
|
5824 assignment, in place of twice as many \f(CW\*(C`ld\*(C'\fR and \f(CW\*(C`st\*(C'\fR pairs. |
|
5825 However, the use of this changed alignment directly violates the \s-1SPARC\s0 |
|
5826 \&\s-1ABI\s0. Thus, it's intended only for use on targets where the developer |
|
5827 acknowledges that their resulting code will not be directly in line with |
|
5828 the rules of the \s-1ABI\s0. |
|
5829 .Ip "\fB\-mimpure-text\fR" 4 |
|
5830 .IX Item "-mimpure-text" |
|
5831 \&\fB\-mimpure-text\fR, used in addition to \fB\-shared\fR, tells |
|
5832 the compiler to not pass \fB\-z text\fR to the linker when linking a |
|
5833 shared object. Using this option, you can link position-dependent |
|
5834 code into a shared object. |
|
5835 .Sp |
|
5836 \&\fB\-mimpure-text\fR suppresses the ``relocations remain against |
|
5837 allocatable but non-writable sections'' linker error message. |
|
5838 However, the necessary relocations will trigger copy-on-write, and the |
|
5839 shared object is not actually shared across processes. Instead of |
|
5840 using \fB\-mimpure-text\fR, you should compile all source code with |
|
5841 \&\fB\-fpic\fR or \fB\-fPIC\fR. |
|
5842 .Sp |
|
5843 This option is only available on SunOS and Solaris. |
|
5844 .Ip "\fB\-mv8\fR" 4 |
|
5845 .IX Item "-mv8" |
|
5846 .PD 0 |
|
5847 .Ip "\fB\-msparclite\fR" 4 |
|
5848 .IX Item "-msparclite" |
|
5849 .PD |
|
5850 These two options select variations on the \s-1SPARC\s0 architecture. |
|
5851 These options are deprecated and will be deleted in a future \s-1GCC\s0 release. |
|
5852 They have been replaced with \fB\-mcpu=xxx\fR. |
|
5853 .Ip "\fB\-mcypress\fR" 4 |
|
5854 .IX Item "-mcypress" |
|
5855 .PD 0 |
|
5856 .Ip "\fB\-msupersparc\fR" 4 |
|
5857 .IX Item "-msupersparc" |
|
5858 .Ip "\fB\-mf930\fR" 4 |
|
5859 .IX Item "-mf930" |
|
5860 .Ip "\fB\-mf934\fR" 4 |
|
5861 .IX Item "-mf934" |
|
5862 .PD |
|
5863 These four options select the processor for which the code is optimized. |
|
5864 These options are deprecated and will be deleted in a future \s-1GCC\s0 release. |
|
5865 They have been replaced with \fB\-mcpu=xxx\fR. |
|
5866 .Ip "\fB\-mcpu=\fR\fIcpu_type\fR" 4 |
|
5867 .IX Item "-mcpu=cpu_type" |
|
5868 Set the instruction set, register set, and instruction scheduling parameters |
|
5869 for machine type \fIcpu_type\fR. Supported values for \fIcpu_type\fR are |
|
5870 \&\fBv7\fR, \fBcypress\fR, \fBv8\fR, \fBsupersparc\fR, \fBsparclite\fR, |
|
5871 \&\fBf930\fR, \fBf934\fR, \fBhypersparc\fR, \fBsparclite86x\fR, |
|
5872 \&\fBsparclet\fR, \fBtsc701\fR, \fBv9\fR, \fBultrasparc\fR, and |
|
5873 \&\fBultrasparc3\fR. |
|
5874 .Sp |
|
5875 Default instruction scheduling parameters are used for values that select |
|
5876 an architecture and not an implementation. These are \fBv7\fR, \fBv8\fR, |
|
5877 \&\fBsparclite\fR, \fBsparclet\fR, \fBv9\fR. |
|
5878 .Sp |
|
5879 Here is a list of each supported architecture and their supported |
|
5880 implementations. |
|
5881 .Sp |
|
5882 .Vb 5 |
|
5883 \& v7: cypress |
|
5884 \& v8: supersparc, hypersparc |
|
5885 \& sparclite: f930, f934, sparclite86x |
|
5886 \& sparclet: tsc701 |
|
5887 \& v9: ultrasparc, ultrasparc3 |
|
5888 .Ve |
|
5889 By default (unless configured otherwise), \s-1GCC\s0 generates code for the V7 |
|
5890 variant of the \s-1SPARC\s0 architecture. With \fB\-mcpu=cypress\fR, the compiler |
|
5891 additionally optimizes it for the Cypress \s-1CY7C602\s0 chip, as used in the |
|
5892 SPARCStation/SPARCServer 3xx series. This is also appropriate for the older |
|
5893 SPARCStation 1, 2, \s-1IPX\s0 etc. |
|
5894 .Sp |
|
5895 With \fB\-mcpu=v8\fR, \s-1GCC\s0 generates code for the V8 variant of the \s-1SPARC\s0 |
|
5896 architecture. The only difference from V7 code is that the compiler emits |
|
5897 the integer multiply and integer divide instructions which exist in \s-1SPARC-V8\s0 |
|
5898 but not in \s-1SPARC-V7\s0. With \fB\-mcpu=supersparc\fR, the compiler additionally |
|
5899 optimizes it for the SuperSPARC chip, as used in the SPARCStation 10, 1000 and |
|
5900 2000 series. |
|
5901 .Sp |
|
5902 With \fB\-mcpu=sparclite\fR, \s-1GCC\s0 generates code for the SPARClite variant of |
|
5903 the \s-1SPARC\s0 architecture. This adds the integer multiply, integer divide step |
|
5904 and scan (\f(CW\*(C`ffs\*(C'\fR) instructions which exist in SPARClite but not in \s-1SPARC-V7\s0. |
|
5905 With \fB\-mcpu=f930\fR, the compiler additionally optimizes it for the |
|
5906 Fujitsu \s-1MB86930\s0 chip, which is the original SPARClite, with no \s-1FPU\s0. With |
|
5907 \&\fB\-mcpu=f934\fR, the compiler additionally optimizes it for the Fujitsu |
|
5908 \&\s-1MB86934\s0 chip, which is the more recent SPARClite with \s-1FPU\s0. |
|
5909 .Sp |
|
5910 With \fB\-mcpu=sparclet\fR, \s-1GCC\s0 generates code for the SPARClet variant of |
|
5911 the \s-1SPARC\s0 architecture. This adds the integer multiply, multiply/accumulate, |
|
5912 integer divide step and scan (\f(CW\*(C`ffs\*(C'\fR) instructions which exist in SPARClet |
|
5913 but not in \s-1SPARC-V7\s0. With \fB\-mcpu=tsc701\fR, the compiler additionally |
|
5914 optimizes it for the \s-1TEMIC\s0 SPARClet chip. |
|
5915 .Sp |
|
5916 With \fB\-mcpu=v9\fR, \s-1GCC\s0 generates code for the V9 variant of the \s-1SPARC\s0 |
|
5917 architecture. This adds 64\-bit integer and floating-point move instructions, |
|
5918 3 additional floating-point condition code registers and conditional move |
|
5919 instructions. With \fB\-mcpu=ultrasparc\fR, the compiler additionally |
|
5920 optimizes it for the Sun UltraSPARC I/II chips. With |
|
5921 \&\fB\-mcpu=ultrasparc3\fR, the compiler additionally optimizes it for the |
|
5922 Sun UltraSPARC \s-1III\s0 chip. |
|
5923 .Ip "\fB\-mtune=\fR\fIcpu_type\fR" 4 |
|
5924 .IX Item "-mtune=cpu_type" |
|
5925 Set the instruction scheduling parameters for machine type |
|
5926 \&\fIcpu_type\fR, but do not set the instruction set or register set that the |
|
5927 option \fB\-mcpu=\fR\fIcpu_type\fR would. |
|
5928 .Sp |
|
5929 The same values for \fB\-mcpu=\fR\fIcpu_type\fR can be used for |
|
5930 \&\fB\-mtune=\fR\fIcpu_type\fR, but the only useful values are those |
|
5931 that select a particular cpu implementation. Those are \fBcypress\fR, |
|
5932 \&\fBsupersparc\fR, \fBhypersparc\fR, \fBf930\fR, \fBf934\fR, |
|
5933 \&\fBsparclite86x\fR, \fBtsc701\fR, \fBultrasparc\fR, and |
|
5934 \&\fBultrasparc3\fR. |
|
5935 .Ip "\fB\-mv8plus\fR" 4 |
|
5936 .IX Item "-mv8plus" |
|
5937 .PD 0 |
|
5938 .Ip "\fB\-mno-v8plus\fR" 4 |
|
5939 .IX Item "-mno-v8plus" |
|
5940 .PD |
|
5941 With \fB\-mv8plus\fR, \s-1GCC\s0 generates code for the \s-1SPARC-V8+\s0 \s-1ABI\s0. The |
|
5942 difference from the V8 \s-1ABI\s0 is that the global and out registers are |
|
5943 considered 64\-bit wide. This is enabled by default on Solaris in 32\-bit |
|
5944 mode for all \s-1SPARC-V9\s0 processors. |
|
5945 .Ip "\fB\-mvis\fR" 4 |
|
5946 .IX Item "-mvis" |
|
5947 .PD 0 |
|
5948 .Ip "\fB\-mno-vis\fR" 4 |
|
5949 .IX Item "-mno-vis" |
|
5950 .PD |
|
5951 With \fB\-mvis\fR, \s-1GCC\s0 generates code that takes advantage of the UltraSPARC |
|
5952 Visual Instruction Set extensions. The default is \fB\-mno-vis\fR. |
|
5953 .PP |
|
5954 These \fB\-m\fR options are supported in addition to the above |
|
5955 on \s-1SPARC-V9\s0 processors in 64\-bit environments: |
|
5956 .Ip "\fB\-mlittle-endian\fR" 4 |
|
5957 .IX Item "-mlittle-endian" |
|
5958 Generate code for a processor running in little-endian mode. It is only |
|
5959 available for a few configurations and most notably not on Solaris and Linux. |
|
5960 .Ip "\fB\-m32\fR" 4 |
|
5961 .IX Item "-m32" |
|
5962 .PD 0 |
|
5963 .Ip "\fB\-m64\fR" 4 |
|
5964 .IX Item "-m64" |
|
5965 .PD |
|
5966 Generate code for a 32\-bit or 64\-bit environment. |
|
5967 The 32\-bit environment sets int, long and pointer to 32 bits. |
|
5968 The 64\-bit environment sets int to 32 bits and long and pointer |
|
5969 to 64 bits. |
|
5970 .Ip "\fB\-mcmodel=medlow\fR" 4 |
|
5971 .IX Item "-mcmodel=medlow" |
|
5972 Generate code for the Medium/Low code model: 64\-bit addresses, programs |
|
5973 must be linked in the low 32 bits of memory. Programs can be statically |
|
5974 or dynamically linked. |
|
5975 .Ip "\fB\-mcmodel=medmid\fR" 4 |
|
5976 .IX Item "-mcmodel=medmid" |
|
5977 Generate code for the Medium/Middle code model: 64\-bit addresses, programs |
|
5978 must be linked in the low 44 bits of memory, the text and data segments must |
|
5979 be less than 2GB in size and the data segment must be located within 2GB of |
|
5980 the text segment. |
|
5981 .Ip "\fB\-mcmodel=medany\fR" 4 |
|
5982 .IX Item "-mcmodel=medany" |
|
5983 Generate code for the Medium/Anywhere code model: 64\-bit addresses, programs |
|
5984 may be linked anywhere in memory, the text and data segments must be less |
|
5985 than 2GB in size and the data segment must be located within 2GB of the |
|
5986 text segment. |
|
5987 .Ip "\fB\-mcmodel=embmedany\fR" 4 |
|
5988 .IX Item "-mcmodel=embmedany" |
|
5989 Generate code for the Medium/Anywhere code model for embedded systems: |
|
5990 64\-bit addresses, the text and data segments must be less than 2GB in |
|
5991 size, both starting anywhere in memory (determined at link time). The |
|
5992 global register \f(CW%g4\fR points to the base of the data segment. Programs |
|
5993 are statically linked and \s-1PIC\s0 is not supported. |
|
5994 .Ip "\fB\-mstack-bias\fR" 4 |
|
5995 .IX Item "-mstack-bias" |
|
5996 .PD 0 |
|
5997 .Ip "\fB\-mno-stack-bias\fR" 4 |
|
5998 .IX Item "-mno-stack-bias" |
|
5999 .PD |
|
6000 With \fB\-mstack-bias\fR, \s-1GCC\s0 assumes that the stack pointer, and |
|
6001 frame pointer if present, are offset by \-2047 which must be added back |
|
6002 when making stack frame references. This is the default in 64\-bit mode. |
|
6003 Otherwise, assume no such offset is present. |
|
6004 .PP |
|
6005 These switches are supported in addition to the above on Solaris: |
|
6006 .Ip "\fB\-threads\fR" 4 |
|
6007 .IX Item "-threads" |
|
6008 Add support for multithreading using the Solaris threads library. This |
|
6009 option sets flags for both the preprocessor and linker. This option does |
|
6010 not affect the thread safety of object code produced by the compiler or |
|
6011 that of libraries supplied with it. |
|
6012 .Ip "\fB\-pthreads\fR" 4 |
|
6013 .IX Item "-pthreads" |
|
6014 Add support for multithreading using the \s-1POSIX\s0 threads library. This |
|
6015 option sets flags for both the preprocessor and linker. This option does |
|
6016 not affect the thread safety of object code produced by the compiler or |
|
6017 that of libraries supplied with it. |
|
6018 .PP |
|
6019 .I "\s-1ARM\s0 Options" |
|
6020 .IX Subsection "ARM Options" |
|
6021 .PP |
|
6022 These \fB\-m\fR options are defined for Advanced \s-1RISC\s0 Machines (\s-1ARM\s0) |
|
6023 architectures: |
|
6024 .Ip "\fB\-mapcs-frame\fR" 4 |
|
6025 .IX Item "-mapcs-frame" |
|
6026 Generate a stack frame that is compliant with the \s-1ARM\s0 Procedure Call |
|
6027 Standard for all functions, even if this is not strictly necessary for |
|
6028 correct execution of the code. Specifying \fB\-fomit-frame-pointer\fR |
|
6029 with this option will cause the stack frames not to be generated for |
|
6030 leaf functions. The default is \fB\-mno-apcs-frame\fR. |
|
6031 .Ip "\fB\-mapcs\fR" 4 |
|
6032 .IX Item "-mapcs" |
|
6033 This is a synonym for \fB\-mapcs-frame\fR. |
|
6034 .Ip "\fB\-mapcs-26\fR" 4 |
|
6035 .IX Item "-mapcs-26" |
|
6036 Generate code for a processor running with a 26\-bit program counter, |
|
6037 and conforming to the function calling standards for the \s-1APCS\s0 26\-bit |
|
6038 option. |
|
6039 .Sp |
|
6040 This option is deprecated. Future releases of the \s-1GCC\s0 will only support |
|
6041 generating code that runs in apcs-32 mode. |
|
6042 .Ip "\fB\-mapcs-32\fR" 4 |
|
6043 .IX Item "-mapcs-32" |
|
6044 Generate code for a processor running with a 32\-bit program counter, |
|
6045 and conforming to the function calling standards for the \s-1APCS\s0 32\-bit |
|
6046 option. |
|
6047 .Sp |
|
6048 This flag is deprecated. Future releases of \s-1GCC\s0 will make this flag |
|
6049 unconditional. |
|
6050 .Ip "\fB\-mthumb-interwork\fR" 4 |
|
6051 .IX Item "-mthumb-interwork" |
|
6052 Generate code which supports calling between the \s-1ARM\s0 and Thumb |
|
6053 instruction sets. Without this option the two instruction sets cannot |
|
6054 be reliably used inside one program. The default is |
|
6055 \&\fB\-mno-thumb-interwork\fR, since slightly larger code is generated |
|
6056 when \fB\-mthumb-interwork\fR is specified. |
|
6057 .Ip "\fB\-mno-sched-prolog\fR" 4 |
|
6058 .IX Item "-mno-sched-prolog" |
|
6059 Prevent the reordering of instructions in the function prolog, or the |
|
6060 merging of those instruction with the instructions in the function's |
|
6061 body. This means that all functions will start with a recognizable set |
|
6062 of instructions (or in fact one of a choice from a small set of |
|
6063 different function prologues), and this information can be used to |
|
6064 locate the start if functions inside an executable piece of code. The |
|
6065 default is \fB\-msched-prolog\fR. |
|
6066 .Ip "\fB\-mhard-float\fR" 4 |
|
6067 .IX Item "-mhard-float" |
|
6068 Generate output containing floating point instructions. This is the |
|
6069 default. |
|
6070 .Ip "\fB\-msoft-float\fR" 4 |
|
6071 .IX Item "-msoft-float" |
|
6072 Generate output containing library calls for floating point. |
|
6073 \&\fBWarning:\fR the requisite libraries are not available for all \s-1ARM\s0 |
|
6074 targets. Normally the facilities of the machine's usual C compiler are |
|
6075 used, but this cannot be done directly in cross-compilation. You must make |
|
6076 your own arrangements to provide suitable library functions for |
|
6077 cross-compilation. |
|
6078 .Sp |
|
6079 \&\fB\-msoft-float\fR changes the calling convention in the output file; |
|
6080 therefore, it is only useful if you compile \fIall\fR of a program with |
|
6081 this option. In particular, you need to compile \fIlibgcc.a\fR, the |
|
6082 library that comes with \s-1GCC\s0, with \fB\-msoft-float\fR in order for |
|
6083 this to work. |
|
6084 .Ip "\fB\-mlittle-endian\fR" 4 |
|
6085 .IX Item "-mlittle-endian" |
|
6086 Generate code for a processor running in little-endian mode. This is |
|
6087 the default for all standard configurations. |
|
6088 .Ip "\fB\-mbig-endian\fR" 4 |
|
6089 .IX Item "-mbig-endian" |
|
6090 Generate code for a processor running in big-endian mode; the default is |
|
6091 to compile code for a little-endian processor. |
|
6092 .Ip "\fB\-mwords-little-endian\fR" 4 |
|
6093 .IX Item "-mwords-little-endian" |
|
6094 This option only applies when generating code for big-endian processors. |
|
6095 Generate code for a little-endian word order but a big-endian byte |
|
6096 order. That is, a byte order of the form \fB32107654\fR. Note: this |
|
6097 option should only be used if you require compatibility with code for |
|
6098 big-endian \s-1ARM\s0 processors generated by versions of the compiler prior to |
|
6099 2.8. |
|
6100 .Ip "\fB\-malignment-traps\fR" 4 |
|
6101 .IX Item "-malignment-traps" |
|
6102 Generate code that will not trap if the \s-1MMU\s0 has alignment traps enabled. |
|
6103 On \s-1ARM\s0 architectures prior to ARMv4, there were no instructions to |
|
6104 access half-word objects stored in memory. However, when reading from |
|
6105 memory a feature of the \s-1ARM\s0 architecture allows a word load to be used, |
|
6106 even if the address is unaligned, and the processor core will rotate the |
|
6107 data as it is being loaded. This option tells the compiler that such |
|
6108 misaligned accesses will cause a \s-1MMU\s0 trap and that it should instead |
|
6109 synthesize the access as a series of byte accesses. The compiler can |
|
6110 still use word accesses to load half-word data if it knows that the |
|
6111 address is aligned to a word boundary. |
|
6112 .Sp |
|
6113 This option has no effect when compiling for \s-1ARM\s0 architecture 4 or later, |
|
6114 since these processors have instructions to directly access half-word |
|
6115 objects in memory. |
|
6116 .Ip "\fB\-mno-alignment-traps\fR" 4 |
|
6117 .IX Item "-mno-alignment-traps" |
|
6118 Generate code that assumes that the \s-1MMU\s0 will not trap unaligned |
|
6119 accesses. This produces better code when the target instruction set |
|
6120 does not have half-word memory operations (i.e. implementations prior to |
|
6121 ARMv4). |
|
6122 .Sp |
|
6123 Note that you cannot use this option to access unaligned word objects, |
|
6124 since the processor will only fetch one 32\-bit aligned object from |
|
6125 memory. |
|
6126 .Sp |
|
6127 The default setting is \fB\-malignment-traps\fR, since this produces |
|
6128 code that will also run on processors implementing \s-1ARM\s0 architecture |
|
6129 version 6 or later. |
|
6130 .Sp |
|
6131 This option is deprecated and will be removed in the next release of \s-1GCC\s0. |
|
6132 .Ip "\fB\-mcpu=\fR\fIname\fR" 4 |
|
6133 .IX Item "-mcpu=name" |
|
6134 This specifies the name of the target \s-1ARM\s0 processor. \s-1GCC\s0 uses this name |
|
6135 to determine what kind of instructions it can emit when generating |
|
6136 assembly code. Permissible names are: \fBarm2\fR, \fBarm250\fR, |
|
6137 \&\fBarm3\fR, \fBarm6\fR, \fBarm60\fR, \fBarm600\fR, \fBarm610\fR, |
|
6138 \&\fBarm620\fR, \fBarm7\fR, \fBarm7m\fR, \fBarm7d\fR, \fBarm7dm\fR, |
|
6139 \&\fBarm7di\fR, \fBarm7dmi\fR, \fBarm70\fR, \fBarm700\fR, |
|
6140 \&\fBarm700i\fR, \fBarm710\fR, \fBarm710c\fR, \fBarm7100\fR, |
|
6141 \&\fBarm7500\fR, \fBarm7500fe\fR, \fBarm7tdmi\fR, \fBarm8\fR, |
|
6142 \&\fBstrongarm\fR, \fBstrongarm110\fR, \fBstrongarm1100\fR, |
|
6143 \&\fBarm8\fR, \fBarm810\fR, \fBarm9\fR, \fBarm9e\fR, \fBarm920\fR, |
|
6144 \&\fBarm920t\fR, \fBarm926ejs\fR, \fBarm940t\fR, \fBarm9tdmi\fR, |
|
6145 \&\fBarm10tdmi\fR, \fBarm1020t\fR, \fBarm1026ejs\fR, |
|
6146 \&\fBarm1136js\fR, \fBarm1136jfs\fR ,\fBxscale\fR, \fBiwmmxt\fR, |
|
6147 \&\fBep9312\fR. |
|
6148 .Ip "\fB\-mtune=\fR\fIname\fR" 4 |
|
6149 .IX Item "-mtune=name" |
|
6150 This option is very similar to the \fB\-mcpu=\fR option, except that |
|
6151 instead of specifying the actual target processor type, and hence |
|
6152 restricting which instructions can be used, it specifies that \s-1GCC\s0 should |
|
6153 tune the performance of the code as if the target were of the type |
|
6154 specified in this option, but still choosing the instructions that it |
|
6155 will generate based on the cpu specified by a \fB\-mcpu=\fR option. |
|
6156 For some \s-1ARM\s0 implementations better performance can be obtained by using |
|
6157 this option. |
|
6158 .Ip "\fB\-march=\fR\fIname\fR" 4 |
|
6159 .IX Item "-march=name" |
|
6160 This specifies the name of the target \s-1ARM\s0 architecture. \s-1GCC\s0 uses this |
|
6161 name to determine what kind of instructions it can emit when generating |
|
6162 assembly code. This option can be used in conjunction with or instead |
|
6163 of the \fB\-mcpu=\fR option. Permissible names are: \fBarmv2\fR, |
|
6164 \&\fBarmv2a\fR, \fBarmv3\fR, \fBarmv3m\fR, \fBarmv4\fR, \fBarmv4t\fR, |
|
6165 \&\fBarmv5\fR, \fBarmv5t\fR, \fBarmv5te\fR, \fBarmv6j\fR, |
|
6166 \&\fBiwmmxt\fR, \fBep9312\fR. |
|
6167 .Ip "\fB\-mfpe=\fR\fInumber\fR" 4 |
|
6168 .IX Item "-mfpe=number" |
|
6169 .PD 0 |
|
6170 .Ip "\fB\-mfp=\fR\fInumber\fR" 4 |
|
6171 .IX Item "-mfp=number" |
|
6172 .PD |
|
6173 This specifies the version of the floating point emulation available on |
|
6174 the target. Permissible values are 2 and 3. \fB\-mfp=\fR is a synonym |
|
6175 for \fB\-mfpe=\fR, for compatibility with older versions of \s-1GCC\s0. |
|
6176 .Ip "\fB\-mstructure-size-boundary=\fR\fIn\fR" 4 |
|
6177 .IX Item "-mstructure-size-boundary=n" |
|
6178 The size of all structures and unions will be rounded up to a multiple |
|
6179 of the number of bits set by this option. Permissible values are 8 and |
|
6180 32. The default value varies for different toolchains. For the \s-1COFF\s0 |
|
6181 targeted toolchain the default value is 8. Specifying the larger number |
|
6182 can produce faster, more efficient code, but can also increase the size |
|
6183 of the program. The two values are potentially incompatible. Code |
|
6184 compiled with one value cannot necessarily expect to work with code or |
|
6185 libraries compiled with the other value, if they exchange information |
|
6186 using structures or unions. |
|
6187 .Ip "\fB\-mabort-on-noreturn\fR" 4 |
|
6188 .IX Item "-mabort-on-noreturn" |
|
6189 Generate a call to the function \f(CW\*(C`abort\*(C'\fR at the end of a |
|
6190 \&\f(CW\*(C`noreturn\*(C'\fR function. It will be executed if the function tries to |
|
6191 return. |
|
6192 .Ip "\fB\-mlong-calls\fR" 4 |
|
6193 .IX Item "-mlong-calls" |
|
6194 .PD 0 |
|
6195 .Ip "\fB\-mno-long-calls\fR" 4 |
|
6196 .IX Item "-mno-long-calls" |
|
6197 .PD |
|
6198 Tells the compiler to perform function calls by first loading the |
|
6199 address of the function into a register and then performing a subroutine |
|
6200 call on this register. This switch is needed if the target function |
|
6201 will lie outside of the 64 megabyte addressing range of the offset based |
|
6202 version of subroutine call instruction. |
|
6203 .Sp |
|
6204 Even if this switch is enabled, not all function calls will be turned |
|
6205 into long calls. The heuristic is that static functions, functions |
|
6206 which have the \fBshort-call\fR attribute, functions that are inside |
|
6207 the scope of a \fB#pragma no_long_calls\fR directive and functions whose |
|
6208 definitions have already been compiled within the current compilation |
|
6209 unit, will not be turned into long calls. The exception to this rule is |
|
6210 that weak function definitions, functions with the \fBlong-call\fR |
|
6211 attribute or the \fBsection\fR attribute, and functions that are within |
|
6212 the scope of a \fB#pragma long_calls\fR directive, will always be |
|
6213 turned into long calls. |
|
6214 .Sp |
|
6215 This feature is not enabled by default. Specifying |
|
6216 \&\fB\-mno-long-calls\fR will restore the default behavior, as will |
|
6217 placing the function calls within the scope of a \fB#pragma |
|
6218 long_calls_off\fR directive. Note these switches have no effect on how |
|
6219 the compiler generates code to handle function calls via function |
|
6220 pointers. |
|
6221 .Ip "\fB\-mnop-fun-dllimport\fR" 4 |
|
6222 .IX Item "-mnop-fun-dllimport" |
|
6223 Disable support for the \f(CW\*(C`dllimport\*(C'\fR attribute. |
|
6224 .Ip "\fB\-msingle-pic-base\fR" 4 |
|
6225 .IX Item "-msingle-pic-base" |
|
6226 Treat the register used for \s-1PIC\s0 addressing as read-only, rather than |
|
6227 loading it in the prologue for each function. The run-time system is |
|
6228 responsible for initializing this register with an appropriate value |
|
6229 before execution begins. |
|
6230 .Ip "\fB\-mpic-register=\fR\fIreg\fR" 4 |
|
6231 .IX Item "-mpic-register=reg" |
|
6232 Specify the register to be used for \s-1PIC\s0 addressing. The default is R10 |
|
6233 unless stack-checking is enabled, when R9 is used. |
|
6234 .Ip "\fB\-mcirrus-fix-invalid-insns\fR" 4 |
|
6235 .IX Item "-mcirrus-fix-invalid-insns" |
|
6236 Insert NOPs into the instruction stream to in order to work around |
|
6237 problems with invalid Maverick instruction combinations. This option |
|
6238 is only valid if the \fB\-mcpu=ep9312\fR option has been used to |
|
6239 enable generation of instructions for the Cirrus Maverick floating |
|
6240 point co-processor. This option is not enabled by default, since the |
|
6241 problem is only present in older Maverick implementations. The default |
|
6242 can be re-enabled by use of the \fB\-mno-cirrus-fix-invalid-insns\fR |
|
6243 switch. |
|
6244 .Ip "\fB\-mpoke-function-name\fR" 4 |
|
6245 .IX Item "-mpoke-function-name" |
|
6246 Write the name of each function into the text section, directly |
|
6247 preceding the function prologue. The generated code is similar to this: |
|
6248 .Sp |
|
6249 .Vb 9 |
|
6250 \& t0 |
|
6251 \& .ascii "arm_poke_function_name", 0 |
|
6252 \& .align |
|
6253 \& t1 |
|
6254 \& .word 0xff000000 + (t1 - t0) |
|
6255 \& arm_poke_function_name |
|
6256 \& mov ip, sp |
|
6257 \& stmfd sp!, {fp, ip, lr, pc} |
|
6258 \& sub fp, ip, #4 |
|
6259 .Ve |
|
6260 When performing a stack backtrace, code can inspect the value of |
|
6261 \&\f(CW\*(C`pc\*(C'\fR stored at \f(CW\*(C`fp + 0\*(C'\fR. If the trace function then looks at |
|
6262 location \f(CW\*(C`pc \- 12\*(C'\fR and the top 8 bits are set, then we know that |
|
6263 there is a function name embedded immediately preceding this location |
|
6264 and has length \f(CW\*(C`((pc[\-3]) & 0xff000000)\*(C'\fR. |
|
6265 .Ip "\fB\-mthumb\fR" 4 |
|
6266 .IX Item "-mthumb" |
|
6267 Generate code for the 16\-bit Thumb instruction set. The default is to |
|
6268 use the 32\-bit \s-1ARM\s0 instruction set. |
|
6269 .Ip "\fB\-mtpcs-frame\fR" 4 |
|
6270 .IX Item "-mtpcs-frame" |
|
6271 Generate a stack frame that is compliant with the Thumb Procedure Call |
|
6272 Standard for all non-leaf functions. (A leaf function is one that does |
|
6273 not call any other functions.) The default is \fB\-mno-tpcs-frame\fR. |
|
6274 .Ip "\fB\-mtpcs-leaf-frame\fR" 4 |
|
6275 .IX Item "-mtpcs-leaf-frame" |
|
6276 Generate a stack frame that is compliant with the Thumb Procedure Call |
|
6277 Standard for all leaf functions. (A leaf function is one that does |
|
6278 not call any other functions.) The default is \fB\-mno-apcs-leaf-frame\fR. |
|
6279 .Ip "\fB\-mcallee-super-interworking\fR" 4 |
|
6280 .IX Item "-mcallee-super-interworking" |
|
6281 Gives all externally visible functions in the file being compiled an \s-1ARM\s0 |
|
6282 instruction set header which switches to Thumb mode before executing the |
|
6283 rest of the function. This allows these functions to be called from |
|
6284 non-interworking code. |
|
6285 .Ip "\fB\-mcaller-super-interworking\fR" 4 |
|
6286 .IX Item "-mcaller-super-interworking" |
|
6287 Allows calls via function pointers (including virtual functions) to |
|
6288 execute correctly regardless of whether the target code has been |
|
6289 compiled for interworking or not. There is a small overhead in the cost |
|
6290 of executing a function pointer if this option is enabled. |
|
6291 .PP |
|
6292 .I "\s-1MN10300\s0 Options" |
|
6293 .IX Subsection "MN10300 Options" |
|
6294 .PP |
|
6295 These \fB\-m\fR options are defined for Matsushita \s-1MN10300\s0 architectures: |
|
6296 .Ip "\fB\-mmult-bug\fR" 4 |
|
6297 .IX Item "-mmult-bug" |
|
6298 Generate code to avoid bugs in the multiply instructions for the \s-1MN10300\s0 |
|
6299 processors. This is the default. |
|
6300 .Ip "\fB\-mno-mult-bug\fR" 4 |
|
6301 .IX Item "-mno-mult-bug" |
|
6302 Do not generate code to avoid bugs in the multiply instructions for the |
|
6303 \&\s-1MN10300\s0 processors. |
|
6304 .Ip "\fB\-mam33\fR" 4 |
|
6305 .IX Item "-mam33" |
|
6306 Generate code which uses features specific to the \s-1AM33\s0 processor. |
|
6307 .Ip "\fB\-mno-am33\fR" 4 |
|
6308 .IX Item "-mno-am33" |
|
6309 Do not generate code which uses features specific to the \s-1AM33\s0 processor. This |
|
6310 is the default. |
|
6311 .Ip "\fB\-mno-crt0\fR" 4 |
|
6312 .IX Item "-mno-crt0" |
|
6313 Do not link in the C run-time initialization object file. |
|
6314 .Ip "\fB\-mrelax\fR" 4 |
|
6315 .IX Item "-mrelax" |
|
6316 Indicate to the linker that it should perform a relaxation optimization pass |
|
6317 to shorten branches, calls and absolute memory addresses. This option only |
|
6318 has an effect when used on the command line for the final link step. |
|
6319 .Sp |
|
6320 This option makes symbolic debugging impossible. |
|
6321 .PP |
|
6322 .I "M32R/D Options" |
|
6323 .IX Subsection "M32R/D Options" |
|
6324 .PP |
|
6325 These \fB\-m\fR options are defined for Renesas M32R/D architectures: |
|
6326 .Ip "\fB\-m32r2\fR" 4 |
|
6327 .IX Item "-m32r2" |
|
6328 Generate code for the M32R/2. |
|
6329 .Ip "\fB\-m32rx\fR" 4 |
|
6330 .IX Item "-m32rx" |
|
6331 Generate code for the M32R/X. |
|
6332 .Ip "\fB\-m32r\fR" 4 |
|
6333 .IX Item "-m32r" |
|
6334 Generate code for the M32R. This is the default. |
|
6335 .Ip "\fB\-mmodel=small\fR" 4 |
|
6336 .IX Item "-mmodel=small" |
|
6337 Assume all objects live in the lower 16MB of memory (so that their addresses |
|
6338 can be loaded with the \f(CW\*(C`ld24\*(C'\fR instruction), and assume all subroutines |
|
6339 are reachable with the \f(CW\*(C`bl\*(C'\fR instruction. |
|
6340 This is the default. |
|
6341 .Sp |
|
6342 The addressability of a particular object can be set with the |
|
6343 \&\f(CW\*(C`model\*(C'\fR attribute. |
|
6344 .Ip "\fB\-mmodel=medium\fR" 4 |
|
6345 .IX Item "-mmodel=medium" |
|
6346 Assume objects may be anywhere in the 32\-bit address space (the compiler |
|
6347 will generate \f(CW\*(C`seth/add3\*(C'\fR instructions to load their addresses), and |
|
6348 assume all subroutines are reachable with the \f(CW\*(C`bl\*(C'\fR instruction. |
|
6349 .Ip "\fB\-mmodel=large\fR" 4 |
|
6350 .IX Item "-mmodel=large" |
|
6351 Assume objects may be anywhere in the 32\-bit address space (the compiler |
|
6352 will generate \f(CW\*(C`seth/add3\*(C'\fR instructions to load their addresses), and |
|
6353 assume subroutines may not be reachable with the \f(CW\*(C`bl\*(C'\fR instruction |
|
6354 (the compiler will generate the much slower \f(CW\*(C`seth/add3/jl\*(C'\fR |
|
6355 instruction sequence). |
|
6356 .Ip "\fB\-msdata=none\fR" 4 |
|
6357 .IX Item "-msdata=none" |
|
6358 Disable use of the small data area. Variables will be put into |
|
6359 one of \fB.data\fR, \fBbss\fR, or \fB.rodata\fR (unless the |
|
6360 \&\f(CW\*(C`section\*(C'\fR attribute has been specified). |
|
6361 This is the default. |
|
6362 .Sp |
|
6363 The small data area consists of sections \fB.sdata\fR and \fB.sbss\fR. |
|
6364 Objects may be explicitly put in the small data area with the |
|
6365 \&\f(CW\*(C`section\*(C'\fR attribute using one of these sections. |
|
6366 .Ip "\fB\-msdata=sdata\fR" 4 |
|
6367 .IX Item "-msdata=sdata" |
|
6368 Put small global and static data in the small data area, but do not |
|
6369 generate special code to reference them. |
|
6370 .Ip "\fB\-msdata=use\fR" 4 |
|
6371 .IX Item "-msdata=use" |
|
6372 Put small global and static data in the small data area, and generate |
|
6373 special instructions to reference them. |
|
6374 .Ip "\fB\-G\fR \fInum\fR" 4 |
|
6375 .IX Item "-G num" |
|
6376 Put global and static objects less than or equal to \fInum\fR bytes |
|
6377 into the small data or bss sections instead of the normal data or bss |
|
6378 sections. The default value of \fInum\fR is 8. |
|
6379 The \fB\-msdata\fR option must be set to one of \fBsdata\fR or \fBuse\fR |
|
6380 for this option to have any effect. |
|
6381 .Sp |
|
6382 All modules should be compiled with the same \fB\-G\fR \fInum\fR value. |
|
6383 Compiling with different values of \fInum\fR may or may not work; if it |
|
6384 doesn't the linker will give an error message\-\-\-incorrect code will not be |
|
6385 generated. |
|
6386 .Ip "\fB\-mdebug\fR" 4 |
|
6387 .IX Item "-mdebug" |
|
6388 Makes the M32R specific code in the compiler display some statistics |
|
6389 that might help in debugging programs. |
|
6390 .Ip "\fB\-malign-loops\fR" 4 |
|
6391 .IX Item "-malign-loops" |
|
6392 Align all loops to a 32\-byte boundary. |
|
6393 .Ip "\fB\-mno-align-loops\fR" 4 |
|
6394 .IX Item "-mno-align-loops" |
|
6395 Do not enforce a 32\-byte alignment for loops. This is the default. |
|
6396 .Ip "\fB\-missue-rate=\fR\fInumber\fR" 4 |
|
6397 .IX Item "-missue-rate=number" |
|
6398 Issue \fInumber\fR instructions per cycle. \fInumber\fR can only be 1 |
|
6399 or 2. |
|
6400 .Ip "\fB\-mbranch-cost=\fR\fInumber\fR" 4 |
|
6401 .IX Item "-mbranch-cost=number" |
|
6402 \&\fInumber\fR can only be 1 or 2. If it is 1 then branches will be |
|
6403 preferred over conditional code, if it is 2, then the opposite will |
|
6404 apply. |
|
6405 .Ip "\fB\-mflush-trap=\fR\fInumber\fR" 4 |
|
6406 .IX Item "-mflush-trap=number" |
|
6407 Specifies the trap number to use to flush the cache. The default is |
|
6408 12. Valid numbers are between 0 and 15 inclusive. |
|
6409 .Ip "\fB\-mno-flush-trap\fR" 4 |
|
6410 .IX Item "-mno-flush-trap" |
|
6411 Specifies that the cache cannot be flushed by using a trap. |
|
6412 .Ip "\fB\-mflush-func=\fR\fIname\fR" 4 |
|
6413 .IX Item "-mflush-func=name" |
|
6414 Specifies the name of the operating system function to call to flush |
|
6415 the cache. The default is \fI_flush_cache\fR, but a function call |
|
6416 will only be used if a trap is not available. |
|
6417 .Ip "\fB\-mno-flush-func\fR" 4 |
|
6418 .IX Item "-mno-flush-func" |
|
6419 Indicates that there is no \s-1OS\s0 function for flushing the cache. |
|
6420 .PP |
|
6421 .I "\s-1IBM\s0 \s-1RS/6000\s0 and PowerPC Options" |
|
6422 .IX Subsection "IBM RS/6000 and PowerPC Options" |
|
6423 .PP |
|
6424 These \fB\-m\fR options are defined for the \s-1IBM\s0 \s-1RS/6000\s0 and PowerPC: |
|
6425 .Ip "\fB\-mpower\fR" 4 |
|
6426 .IX Item "-mpower" |
|
6427 .PD 0 |
|
6428 .Ip "\fB\-mno-power\fR" 4 |
|
6429 .IX Item "-mno-power" |
|
6430 .Ip "\fB\-mpower2\fR" 4 |
|
6431 .IX Item "-mpower2" |
|
6432 .Ip "\fB\-mno-power2\fR" 4 |
|
6433 .IX Item "-mno-power2" |
|
6434 .Ip "\fB\-mpowerpc\fR" 4 |
|
6435 .IX Item "-mpowerpc" |
|
6436 .Ip "\fB\-mno-powerpc\fR" 4 |
|
6437 .IX Item "-mno-powerpc" |
|
6438 .Ip "\fB\-mpowerpc-gpopt\fR" 4 |
|
6439 .IX Item "-mpowerpc-gpopt" |
|
6440 .Ip "\fB\-mno-powerpc-gpopt\fR" 4 |
|
6441 .IX Item "-mno-powerpc-gpopt" |
|
6442 .Ip "\fB\-mpowerpc-gfxopt\fR" 4 |
|
6443 .IX Item "-mpowerpc-gfxopt" |
|
6444 .Ip "\fB\-mno-powerpc-gfxopt\fR" 4 |
|
6445 .IX Item "-mno-powerpc-gfxopt" |
|
6446 .Ip "\fB\-mpowerpc64\fR" 4 |
|
6447 .IX Item "-mpowerpc64" |
|
6448 .Ip "\fB\-mno-powerpc64\fR" 4 |
|
6449 .IX Item "-mno-powerpc64" |
|
6450 .PD |
|
6451 \&\s-1GCC\s0 supports two related instruction set architectures for the |
|
6452 \&\s-1RS/6000\s0 and PowerPC. The \fI\s-1POWER\s0\fR instruction set are those |
|
6453 instructions supported by the \fBrios\fR chip set used in the original |
|
6454 \&\s-1RS/6000\s0 systems and the \fIPowerPC\fR instruction set is the |
|
6455 architecture of the Motorola MPC5xx, MPC6xx, MPC8xx microprocessors, and |
|
6456 the \s-1IBM\s0 4xx microprocessors. |
|
6457 .Sp |
|
6458 Neither architecture is a subset of the other. However there is a |
|
6459 large common subset of instructions supported by both. An \s-1MQ\s0 |
|
6460 register is included in processors supporting the \s-1POWER\s0 architecture. |
|
6461 .Sp |
|
6462 You use these options to specify which instructions are available on the |
|
6463 processor you are using. The default value of these options is |
|
6464 determined when configuring \s-1GCC\s0. Specifying the |
|
6465 \&\fB\-mcpu=\fR\fIcpu_type\fR overrides the specification of these |
|
6466 options. We recommend you use the \fB\-mcpu=\fR\fIcpu_type\fR option |
|
6467 rather than the options listed above. |
|
6468 .Sp |
|
6469 The \fB\-mpower\fR option allows \s-1GCC\s0 to generate instructions that |
|
6470 are found only in the \s-1POWER\s0 architecture and to use the \s-1MQ\s0 register. |
|
6471 Specifying \fB\-mpower2\fR implies \fB\-power\fR and also allows \s-1GCC\s0 |
|
6472 to generate instructions that are present in the \s-1POWER2\s0 architecture but |
|
6473 not the original \s-1POWER\s0 architecture. |
|
6474 .Sp |
|
6475 The \fB\-mpowerpc\fR option allows \s-1GCC\s0 to generate instructions that |
|
6476 are found only in the 32\-bit subset of the PowerPC architecture. |
|
6477 Specifying \fB\-mpowerpc-gpopt\fR implies \fB\-mpowerpc\fR and also allows |
|
6478 \&\s-1GCC\s0 to use the optional PowerPC architecture instructions in the |
|
6479 General Purpose group, including floating-point square root. Specifying |
|
6480 \&\fB\-mpowerpc-gfxopt\fR implies \fB\-mpowerpc\fR and also allows \s-1GCC\s0 to |
|
6481 use the optional PowerPC architecture instructions in the Graphics |
|
6482 group, including floating-point select. |
|
6483 .Sp |
|
6484 The \fB\-mpowerpc64\fR option allows \s-1GCC\s0 to generate the additional |
|
6485 64\-bit instructions that are found in the full PowerPC64 architecture |
|
6486 and to treat GPRs as 64\-bit, doubleword quantities. \s-1GCC\s0 defaults to |
|
6487 \&\fB\-mno-powerpc64\fR. |
|
6488 .Sp |
|
6489 If you specify both \fB\-mno-power\fR and \fB\-mno-powerpc\fR, \s-1GCC\s0 |
|
6490 will use only the instructions in the common subset of both |
|
6491 architectures plus some special \s-1AIX\s0 common-mode calls, and will not use |
|
6492 the \s-1MQ\s0 register. Specifying both \fB\-mpower\fR and \fB\-mpowerpc\fR |
|
6493 permits \s-1GCC\s0 to use any instruction from either architecture and to |
|
6494 allow use of the \s-1MQ\s0 register; specify this for the Motorola \s-1MPC601\s0. |
|
6495 .Ip "\fB\-mnew-mnemonics\fR" 4 |
|
6496 .IX Item "-mnew-mnemonics" |
|
6497 .PD 0 |
|
6498 .Ip "\fB\-mold-mnemonics\fR" 4 |
|
6499 .IX Item "-mold-mnemonics" |
|
6500 .PD |
|
6501 Select which mnemonics to use in the generated assembler code. With |
|
6502 \&\fB\-mnew-mnemonics\fR, \s-1GCC\s0 uses the assembler mnemonics defined for |
|
6503 the PowerPC architecture. With \fB\-mold-mnemonics\fR it uses the |
|
6504 assembler mnemonics defined for the \s-1POWER\s0 architecture. Instructions |
|
6505 defined in only one architecture have only one mnemonic; \s-1GCC\s0 uses that |
|
6506 mnemonic irrespective of which of these options is specified. |
|
6507 .Sp |
|
6508 \&\s-1GCC\s0 defaults to the mnemonics appropriate for the architecture in |
|
6509 use. Specifying \fB\-mcpu=\fR\fIcpu_type\fR sometimes overrides the |
|
6510 value of these option. Unless you are building a cross-compiler, you |
|
6511 should normally not specify either \fB\-mnew-mnemonics\fR or |
|
6512 \&\fB\-mold-mnemonics\fR, but should instead accept the default. |
|
6513 .Ip "\fB\-mcpu=\fR\fIcpu_type\fR" 4 |
|
6514 .IX Item "-mcpu=cpu_type" |
|
6515 Set architecture type, register usage, choice of mnemonics, and |
|
6516 instruction scheduling parameters for machine type \fIcpu_type\fR. |
|
6517 Supported values for \fIcpu_type\fR are \fB401\fR, \fB403\fR, |
|
6518 \&\fB405\fR, \fB405fp\fR, \fB440\fR, \fB440fp\fR, \fB505\fR, |
|
6519 \&\fB601\fR, \fB602\fR, \fB603\fR, \fB603e\fR, \fB604\fR, |
|
6520 \&\fB604e\fR, \fB620\fR, \fB630\fR, \fB740\fR, \fB7400\fR, |
|
6521 \&\fB7450\fR, \fB750\fR, \fB801\fR, \fB821\fR, \fB823\fR, |
|
6522 \&\fB860\fR, \fB970\fR, \fB8540\fR, \fBcommon\fR, \fBec603e\fR, \fBG3\fR, |
|
6523 \&\fBG4\fR, \fBG5\fR, \fBpower\fR, \fBpower2\fR, \fBpower3\fR, |
|
6524 \&\fBpower4\fR, \fBpower5\fR, \fBpowerpc\fR, \fBpowerpc64\fR, |
|
6525 \&\fBrios\fR, \fBrios1\fR, \fBrios2\fR, \fBrsc\fR, and \fBrs64a\fR. |
|
6526 .Sp |
|
6527 \&\fB\-mcpu=common\fR selects a completely generic processor. Code |
|
6528 generated under this option will run on any \s-1POWER\s0 or PowerPC processor. |
|
6529 \&\s-1GCC\s0 will use only the instructions in the common subset of both |
|
6530 architectures, and will not use the \s-1MQ\s0 register. \s-1GCC\s0 assumes a generic |
|
6531 processor model for scheduling purposes. |
|
6532 .Sp |
|
6533 \&\fB\-mcpu=power\fR, \fB\-mcpu=power2\fR, \fB\-mcpu=powerpc\fR, and |
|
6534 \&\fB\-mcpu=powerpc64\fR specify generic \s-1POWER\s0, \s-1POWER2\s0, pure 32\-bit |
|
6535 PowerPC (i.e., not \s-1MPC601\s0), and 64\-bit PowerPC architecture machine |
|
6536 types, with an appropriate, generic processor model assumed for |
|
6537 scheduling purposes. |
|
6538 .Sp |
|
6539 The other options specify a specific processor. Code generated under |
|
6540 those options will run best on that processor, and may not run at all on |
|
6541 others. |
|
6542 .Sp |
|
6543 The \fB\-mcpu\fR options automatically enable or disable the |
|
6544 following options: \fB\-maltivec\fR, \fB\-mhard-float\fR, |
|
6545 \&\fB\-mmfcrf\fR, \fB\-mmultiple\fR, \fB\-mnew-mnemonics\fR, |
|
6546 \&\fB\-mpower\fR, \fB\-mpower2\fR, \fB\-mpowerpc64\fR, |
|
6547 \&\fB\-mpowerpc-gpopt\fR, \fB\-mpowerpc-gfxopt\fR, |
|
6548 \&\fB\-mstring\fR. The particular options set for any particular \s-1CPU\s0 |
|
6549 will vary between compiler versions, depending on what setting seems |
|
6550 to produce optimal code for that \s-1CPU\s0; it doesn't necessarily reflect |
|
6551 the actual hardware's capabilities. If you wish to set an individual |
|
6552 option to a particular value, you may specify it after the |
|
6553 \&\fB\-mcpu\fR option, like \fB\-mcpu=970 \-mno-altivec\fR. |
|
6554 .Sp |
|
6555 On \s-1AIX\s0, the \fB\-maltivec\fR and \fB\-mpowerpc64\fR options are |
|
6556 not enabled or disabled by the \fB\-mcpu\fR option at present, since |
|
6557 \&\s-1AIX\s0 does not have full support for these options. You may still |
|
6558 enable or disable them individually if you're sure it'll work in your |
|
6559 environment. |
|
6560 .Ip "\fB\-mtune=\fR\fIcpu_type\fR" 4 |
|
6561 .IX Item "-mtune=cpu_type" |
|
6562 Set the instruction scheduling parameters for machine type |
|
6563 \&\fIcpu_type\fR, but do not set the architecture type, register usage, or |
|
6564 choice of mnemonics, as \fB\-mcpu=\fR\fIcpu_type\fR would. The same |
|
6565 values for \fIcpu_type\fR are used for \fB\-mtune\fR as for |
|
6566 \&\fB\-mcpu\fR. If both are specified, the code generated will use the |
|
6567 architecture, registers, and mnemonics set by \fB\-mcpu\fR, but the |
|
6568 scheduling parameters set by \fB\-mtune\fR. |
|
6569 .Ip "\fB\-maltivec\fR" 4 |
|
6570 .IX Item "-maltivec" |
|
6571 .PD 0 |
|
6572 .Ip "\fB\-mno-altivec\fR" 4 |
|
6573 .IX Item "-mno-altivec" |
|
6574 .PD |
|
6575 These switches enable or disable the use of built-in functions that |
|
6576 allow access to the AltiVec instruction set. You may also need to set |
|
6577 \&\fB\-mabi=altivec\fR to adjust the current \s-1ABI\s0 with AltiVec \s-1ABI\s0 |
|
6578 enhancements. |
|
6579 .Ip "\fB\-mabi=spe\fR" 4 |
|
6580 .IX Item "-mabi=spe" |
|
6581 Extend the current \s-1ABI\s0 with \s-1SPE\s0 \s-1ABI\s0 extensions. This does not change |
|
6582 the default \s-1ABI\s0, instead it adds the \s-1SPE\s0 \s-1ABI\s0 extensions to the current |
|
6583 \&\s-1ABI\s0. |
|
6584 .Ip "\fB\-mabi=no-spe\fR" 4 |
|
6585 .IX Item "-mabi=no-spe" |
|
6586 Disable Booke \s-1SPE\s0 \s-1ABI\s0 extensions for the current \s-1ABI\s0. |
|
6587 .Ip "\fB\-misel=\fR\fIyes/no\fR" 4 |
|
6588 .IX Item "-misel=yes/no" |
|
6589 .PD 0 |
|
6590 .Ip "\fB\-misel\fR" 4 |
|
6591 .IX Item "-misel" |
|
6592 .PD |
|
6593 This switch enables or disables the generation of \s-1ISEL\s0 instructions. |
|
6594 .Ip "\fB\-mspe=\fR\fIyes/no\fR" 4 |
|
6595 .IX Item "-mspe=yes/no" |
|
6596 .PD 0 |
|
6597 .Ip "\fB\-mspe\fR" 4 |
|
6598 .IX Item "-mspe" |
|
6599 .PD |
|
6600 This switch enables or disables the generation of \s-1SPE\s0 simd |
|
6601 instructions. |
|
6602 .Ip "\fB\-mfloat-gprs=\fR\fIyes/no\fR" 4 |
|
6603 .IX Item "-mfloat-gprs=yes/no" |
|
6604 .PD 0 |
|
6605 .Ip "\fB\-mfloat-gprs\fR" 4 |
|
6606 .IX Item "-mfloat-gprs" |
|
6607 .PD |
|
6608 This switch enables or disables the generation of floating point |
|
6609 operations on the general purpose registers for architectures that |
|
6610 support it. This option is currently only available on the \s-1MPC8540\s0. |
|
6611 .Ip "\fB\-mfull-toc\fR" 4 |
|
6612 .IX Item "-mfull-toc" |
|
6613 .PD 0 |
|
6614 .Ip "\fB\-mno-fp-in-toc\fR" 4 |
|
6615 .IX Item "-mno-fp-in-toc" |
|
6616 .Ip "\fB\-mno-sum-in-toc\fR" 4 |
|
6617 .IX Item "-mno-sum-in-toc" |
|
6618 .Ip "\fB\-mminimal-toc\fR" 4 |
|
6619 .IX Item "-mminimal-toc" |
|
6620 .PD |
|
6621 Modify generation of the \s-1TOC\s0 (Table Of Contents), which is created for |
|
6622 every executable file. The \fB\-mfull-toc\fR option is selected by |
|
6623 default. In that case, \s-1GCC\s0 will allocate at least one \s-1TOC\s0 entry for |
|
6624 each unique non-automatic variable reference in your program. \s-1GCC\s0 |
|
6625 will also place floating-point constants in the \s-1TOC\s0. However, only |
|
6626 16,384 entries are available in the \s-1TOC\s0. |
|
6627 .Sp |
|
6628 If you receive a linker error message that saying you have overflowed |
|
6629 the available \s-1TOC\s0 space, you can reduce the amount of \s-1TOC\s0 space used |
|
6630 with the \fB\-mno-fp-in-toc\fR and \fB\-mno-sum-in-toc\fR options. |
|
6631 \&\fB\-mno-fp-in-toc\fR prevents \s-1GCC\s0 from putting floating-point |
|
6632 constants in the \s-1TOC\s0 and \fB\-mno-sum-in-toc\fR forces \s-1GCC\s0 to |
|
6633 generate code to calculate the sum of an address and a constant at |
|
6634 run-time instead of putting that sum into the \s-1TOC\s0. You may specify one |
|
6635 or both of these options. Each causes \s-1GCC\s0 to produce very slightly |
|
6636 slower and larger code at the expense of conserving \s-1TOC\s0 space. |
|
6637 .Sp |
|
6638 If you still run out of space in the \s-1TOC\s0 even when you specify both of |
|
6639 these options, specify \fB\-mminimal-toc\fR instead. This option causes |
|
6640 \&\s-1GCC\s0 to make only one \s-1TOC\s0 entry for every file. When you specify this |
|
6641 option, \s-1GCC\s0 will produce code that is slower and larger but which |
|
6642 uses extremely little \s-1TOC\s0 space. You may wish to use this option |
|
6643 only on files that contain less frequently executed code. |
|
6644 .Ip "\fB\-maix64\fR" 4 |
|
6645 .IX Item "-maix64" |
|
6646 .PD 0 |
|
6647 .Ip "\fB\-maix32\fR" 4 |
|
6648 .IX Item "-maix32" |
|
6649 .PD |
|
6650 Enable 64\-bit \s-1AIX\s0 \s-1ABI\s0 and calling convention: 64\-bit pointers, 64\-bit |
|
6651 \&\f(CW\*(C`long\*(C'\fR type, and the infrastructure needed to support them. |
|
6652 Specifying \fB\-maix64\fR implies \fB\-mpowerpc64\fR and |
|
6653 \&\fB\-mpowerpc\fR, while \fB\-maix32\fR disables the 64\-bit \s-1ABI\s0 and |
|
6654 implies \fB\-mno-powerpc64\fR. \s-1GCC\s0 defaults to \fB\-maix32\fR. |
|
6655 .Ip "\fB\-mxl-compat\fR" 4 |
|
6656 .IX Item "-mxl-compat" |
|
6657 .PD 0 |
|
6658 .Ip "\fB\-mno-xl-compat\fR" 4 |
|
6659 .IX Item "-mno-xl-compat" |
|
6660 .PD |
|
6661 Produce code that conforms more closely to \s-1IBM\s0 \s-1XLC\s0 semantics when using |
|
6662 AIX-compatible \s-1ABI\s0. Pass floating-point arguments to prototyped |
|
6663 functions beyond the register save area (\s-1RSA\s0) on the stack in addition |
|
6664 to argument FPRs. Do not assume that most significant double in 128 |
|
6665 bit long double value is properly rounded when comparing values. |
|
6666 .Sp |
|
6667 The \s-1AIX\s0 calling convention was extended but not initially documented to |
|
6668 handle an obscure K&R C case of calling a function that takes the |
|
6669 address of its arguments with fewer arguments than declared. \s-1AIX\s0 \s-1XL\s0 |
|
6670 compilers access floating point arguments which do not fit in the |
|
6671 \&\s-1RSA\s0 from the stack when a subroutine is compiled without |
|
6672 optimization. Because always storing floating-point arguments on the |
|
6673 stack is inefficient and rarely needed, this option is not enabled by |
|
6674 default and only is necessary when calling subroutines compiled by \s-1AIX\s0 |
|
6675 \&\s-1XL\s0 compilers without optimization. |
|
6676 .Ip "\fB\-mpe\fR" 4 |
|
6677 .IX Item "-mpe" |
|
6678 Support \fI\s-1IBM\s0 \s-1RS/6000\s0 \s-1SP\s0\fR \fIParallel Environment\fR (\s-1PE\s0). Link an |
|
6679 application written to use message passing with special startup code to |
|
6680 enable the application to run. The system must have \s-1PE\s0 installed in the |
|
6681 standard location (\fI/usr/lpp/ppe.poe/\fR), or the \fIspecs\fR file |
|
6682 must be overridden with the \fB\-specs=\fR option to specify the |
|
6683 appropriate directory location. The Parallel Environment does not |
|
6684 support threads, so the \fB\-mpe\fR option and the \fB\-pthread\fR |
|
6685 option are incompatible. |
|
6686 .Ip "\fB\-malign-natural\fR" 4 |
|
6687 .IX Item "-malign-natural" |
|
6688 .PD 0 |
|
6689 .Ip "\fB\-malign-power\fR" 4 |
|
6690 .IX Item "-malign-power" |
|
6691 .PD |
|
6692 On \s-1AIX\s0, Darwin, and 64\-bit PowerPC GNU/Linux, the option |
|
6693 \&\fB\-malign-natural\fR overrides the ABI-defined alignment of larger |
|
6694 types, such as floating-point doubles, on their natural size-based boundary. |
|
6695 The option \fB\-malign-power\fR instructs \s-1GCC\s0 to follow the ABI-specified |
|
6696 alignment rules. \s-1GCC\s0 defaults to the standard alignment defined in the \s-1ABI\s0. |
|
6697 .Ip "\fB\-msoft-float\fR" 4 |
|
6698 .IX Item "-msoft-float" |
|
6699 .PD 0 |
|
6700 .Ip "\fB\-mhard-float\fR" 4 |
|
6701 .IX Item "-mhard-float" |
|
6702 .PD |
|
6703 Generate code that does not use (uses) the floating-point register set. |
|
6704 Software floating point emulation is provided if you use the |
|
6705 \&\fB\-msoft-float\fR option, and pass the option to \s-1GCC\s0 when linking. |
|
6706 .Ip "\fB\-mmultiple\fR" 4 |
|
6707 .IX Item "-mmultiple" |
|
6708 .PD 0 |
|
6709 .Ip "\fB\-mno-multiple\fR" 4 |
|
6710 .IX Item "-mno-multiple" |
|
6711 .PD |
|
6712 Generate code that uses (does not use) the load multiple word |
|
6713 instructions and the store multiple word instructions. These |
|
6714 instructions are generated by default on \s-1POWER\s0 systems, and not |
|
6715 generated on PowerPC systems. Do not use \fB\-mmultiple\fR on little |
|
6716 endian PowerPC systems, since those instructions do not work when the |
|
6717 processor is in little endian mode. The exceptions are \s-1PPC740\s0 and |
|
6718 \&\s-1PPC750\s0 which permit the instructions usage in little endian mode. |
|
6719 .Ip "\fB\-mstring\fR" 4 |
|
6720 .IX Item "-mstring" |
|
6721 .PD 0 |
|
6722 .Ip "\fB\-mno-string\fR" 4 |
|
6723 .IX Item "-mno-string" |
|
6724 .PD |
|
6725 Generate code that uses (does not use) the load string instructions |
|
6726 and the store string word instructions to save multiple registers and |
|
6727 do small block moves. These instructions are generated by default on |
|
6728 \&\s-1POWER\s0 systems, and not generated on PowerPC systems. Do not use |
|
6729 \&\fB\-mstring\fR on little endian PowerPC systems, since those |
|
6730 instructions do not work when the processor is in little endian mode. |
|
6731 The exceptions are \s-1PPC740\s0 and \s-1PPC750\s0 which permit the instructions |
|
6732 usage in little endian mode. |
|
6733 .Ip "\fB\-mupdate\fR" 4 |
|
6734 .IX Item "-mupdate" |
|
6735 .PD 0 |
|
6736 .Ip "\fB\-mno-update\fR" 4 |
|
6737 .IX Item "-mno-update" |
|
6738 .PD |
|
6739 Generate code that uses (does not use) the load or store instructions |
|
6740 that update the base register to the address of the calculated memory |
|
6741 location. These instructions are generated by default. If you use |
|
6742 \&\fB\-mno-update\fR, there is a small window between the time that the |
|
6743 stack pointer is updated and the address of the previous frame is |
|
6744 stored, which means code that walks the stack frame across interrupts or |
|
6745 signals may get corrupted data. |
|
6746 .Ip "\fB\-mfused-madd\fR" 4 |
|
6747 .IX Item "-mfused-madd" |
|
6748 .PD 0 |
|
6749 .Ip "\fB\-mno-fused-madd\fR" 4 |
|
6750 .IX Item "-mno-fused-madd" |
|
6751 .PD |
|
6752 Generate code that uses (does not use) the floating point multiply and |
|
6753 accumulate instructions. These instructions are generated by default if |
|
6754 hardware floating is used. |
|
6755 .Ip "\fB\-mno-bit-align\fR" 4 |
|
6756 .IX Item "-mno-bit-align" |
|
6757 .PD 0 |
|
6758 .Ip "\fB\-mbit-align\fR" 4 |
|
6759 .IX Item "-mbit-align" |
|
6760 .PD |
|
6761 On System V.4 and embedded PowerPC systems do not (do) force structures |
|
6762 and unions that contain bit-fields to be aligned to the base type of the |
|
6763 bit-field. |
|
6764 .Sp |
|
6765 For example, by default a structure containing nothing but 8 |
|
6766 \&\f(CW\*(C`unsigned\*(C'\fR bit-fields of length 1 would be aligned to a 4 byte |
|
6767 boundary and have a size of 4 bytes. By using \fB\-mno-bit-align\fR, |
|
6768 the structure would be aligned to a 1 byte boundary and be one byte in |
|
6769 size. |
|
6770 .Ip "\fB\-mno-strict-align\fR" 4 |
|
6771 .IX Item "-mno-strict-align" |
|
6772 .PD 0 |
|
6773 .Ip "\fB\-mstrict-align\fR" 4 |
|
6774 .IX Item "-mstrict-align" |
|
6775 .PD |
|
6776 On System V.4 and embedded PowerPC systems do not (do) assume that |
|
6777 unaligned memory references will be handled by the system. |
|
6778 .Ip "\fB\-mrelocatable\fR" 4 |
|
6779 .IX Item "-mrelocatable" |
|
6780 .PD 0 |
|
6781 .Ip "\fB\-mno-relocatable\fR" 4 |
|
6782 .IX Item "-mno-relocatable" |
|
6783 .PD |
|
6784 On embedded PowerPC systems generate code that allows (does not allow) |
|
6785 the program to be relocated to a different address at runtime. If you |
|
6786 use \fB\-mrelocatable\fR on any module, all objects linked together must |
|
6787 be compiled with \fB\-mrelocatable\fR or \fB\-mrelocatable-lib\fR. |
|
6788 .Ip "\fB\-mrelocatable-lib\fR" 4 |
|
6789 .IX Item "-mrelocatable-lib" |
|
6790 .PD 0 |
|
6791 .Ip "\fB\-mno-relocatable-lib\fR" 4 |
|
6792 .IX Item "-mno-relocatable-lib" |
|
6793 .PD |
|
6794 On embedded PowerPC systems generate code that allows (does not allow) |
|
6795 the program to be relocated to a different address at runtime. Modules |
|
6796 compiled with \fB\-mrelocatable-lib\fR can be linked with either modules |
|
6797 compiled without \fB\-mrelocatable\fR and \fB\-mrelocatable-lib\fR or |
|
6798 with modules compiled with the \fB\-mrelocatable\fR options. |
|
6799 .Ip "\fB\-mno-toc\fR" 4 |
|
6800 .IX Item "-mno-toc" |
|
6801 .PD 0 |
|
6802 .Ip "\fB\-mtoc\fR" 4 |
|
6803 .IX Item "-mtoc" |
|
6804 .PD |
|
6805 On System V.4 and embedded PowerPC systems do not (do) assume that |
|
6806 register 2 contains a pointer to a global area pointing to the addresses |
|
6807 used in the program. |
|
6808 .Ip "\fB\-mlittle\fR" 4 |
|
6809 .IX Item "-mlittle" |
|
6810 .PD 0 |
|
6811 .Ip "\fB\-mlittle-endian\fR" 4 |
|
6812 .IX Item "-mlittle-endian" |
|
6813 .PD |
|
6814 On System V.4 and embedded PowerPC systems compile code for the |
|
6815 processor in little endian mode. The \fB\-mlittle-endian\fR option is |
|
6816 the same as \fB\-mlittle\fR. |
|
6817 .Ip "\fB\-mbig\fR" 4 |
|
6818 .IX Item "-mbig" |
|
6819 .PD 0 |
|
6820 .Ip "\fB\-mbig-endian\fR" 4 |
|
6821 .IX Item "-mbig-endian" |
|
6822 .PD |
|
6823 On System V.4 and embedded PowerPC systems compile code for the |
|
6824 processor in big endian mode. The \fB\-mbig-endian\fR option is |
|
6825 the same as \fB\-mbig\fR. |
|
6826 .Ip "\fB\-mdynamic-no-pic\fR" 4 |
|
6827 .IX Item "-mdynamic-no-pic" |
|
6828 On Darwin and Mac \s-1OS\s0 X systems, compile code so that it is not |
|
6829 relocatable, but that its external references are relocatable. The |
|
6830 resulting code is suitable for applications, but not shared |
|
6831 libraries. |
|
6832 .Ip "\fB\-mprioritize-restricted-insns=\fR\fIpriority\fR" 4 |
|
6833 .IX Item "-mprioritize-restricted-insns=priority" |
|
6834 This option controls the priority that is assigned to |
|
6835 dispatch-slot restricted instructions during the second scheduling |
|
6836 pass. The argument \fIpriority\fR takes the value \fI0/1/2\fR to assign |
|
6837 \&\fIno/highest/second-highest\fR priority to dispatch slot restricted |
|
6838 instructions. |
|
6839 .Ip "\fB\-msched-costly-dep=\fR\fIdependence_type\fR" 4 |
|
6840 .IX Item "-msched-costly-dep=dependence_type" |
|
6841 This option controls which dependences are considered costly |
|
6842 by the target during instruction scheduling. The argument |
|
6843 \&\fIdependence_type\fR takes one of the following values: |
|
6844 \&\fIno\fR: no dependence is costly, |
|
6845 \&\fIall\fR: all dependences are costly, |
|
6846 \&\fItrue_store_to_load\fR: a true dependence from store to load is costly, |
|
6847 \&\fIstore_to_load\fR: any dependence from store to load is costly, |
|
6848 \&\fInumber\fR: any dependence which latency >= \fInumber\fR is costly. |
|
6849 .Ip "\fB\-minsert-sched-nops=\fR\fIscheme\fR" 4 |
|
6850 .IX Item "-minsert-sched-nops=scheme" |
|
6851 This option controls which nop insertion scheme will be used during |
|
6852 the second scheduling pass. The argument \fIscheme\fR takes one of the |
|
6853 following values: |
|
6854 \&\fIno\fR: Don't insert nops. |
|
6855 \&\fIpad\fR: Pad with nops any dispatch group which has vacant issue slots, |
|
6856 according to the scheduler's grouping. |
|
6857 \&\fIregroup_exact\fR: Insert nops to force costly dependent insns into |
|
6858 separate groups. Insert exactly as many nops as needed to force an insn |
|
6859 to a new group, according to the estimated processor grouping. |
|
6860 \&\fInumber\fR: Insert nops to force costly dependent insns into |
|
6861 separate groups. Insert \fInumber\fR nops to force an insn to a new group. |
|
6862 .Ip "\fB\-mcall-sysv\fR" 4 |
|
6863 .IX Item "-mcall-sysv" |
|
6864 On System V.4 and embedded PowerPC systems compile code using calling |
|
6865 conventions that adheres to the March 1995 draft of the System V |
|
6866 Application Binary Interface, PowerPC processor supplement. This is the |
|
6867 default unless you configured \s-1GCC\s0 using \fBpowerpc-*\-eabiaix\fR. |
|
6868 .Ip "\fB\-mcall-sysv-eabi\fR" 4 |
|
6869 .IX Item "-mcall-sysv-eabi" |
|
6870 Specify both \fB\-mcall-sysv\fR and \fB\-meabi\fR options. |
|
6871 .Ip "\fB\-mcall-sysv-noeabi\fR" 4 |
|
6872 .IX Item "-mcall-sysv-noeabi" |
|
6873 Specify both \fB\-mcall-sysv\fR and \fB\-mno-eabi\fR options. |
|
6874 .Ip "\fB\-mcall-solaris\fR" 4 |
|
6875 .IX Item "-mcall-solaris" |
|
6876 On System V.4 and embedded PowerPC systems compile code for the Solaris |
|
6877 operating system. |
|
6878 .Ip "\fB\-mcall-linux\fR" 4 |
|
6879 .IX Item "-mcall-linux" |
|
6880 On System V.4 and embedded PowerPC systems compile code for the |
|
6881 Linux-based \s-1GNU\s0 system. |
|
6882 .Ip "\fB\-mcall-gnu\fR" 4 |
|
6883 .IX Item "-mcall-gnu" |
|
6884 On System V.4 and embedded PowerPC systems compile code for the |
|
6885 Hurd-based \s-1GNU\s0 system. |
|
6886 .Ip "\fB\-mcall-netbsd\fR" 4 |
|
6887 .IX Item "-mcall-netbsd" |
|
6888 On System V.4 and embedded PowerPC systems compile code for the |
|
6889 NetBSD operating system. |
|
6890 .Ip "\fB\-maix-struct-return\fR" 4 |
|
6891 .IX Item "-maix-struct-return" |
|
6892 Return all structures in memory (as specified by the \s-1AIX\s0 \s-1ABI\s0). |
|
6893 .Ip "\fB\-msvr4\-struct-return\fR" 4 |
|
6894 .IX Item "-msvr4-struct-return" |
|
6895 Return structures smaller than 8 bytes in registers (as specified by the |
|
6896 \&\s-1SVR4\s0 \s-1ABI\s0). |
|
6897 .Ip "\fB\-mabi=altivec\fR" 4 |
|
6898 .IX Item "-mabi=altivec" |
|
6899 Extend the current \s-1ABI\s0 with AltiVec \s-1ABI\s0 extensions. This does not |
|
6900 change the default \s-1ABI\s0, instead it adds the AltiVec \s-1ABI\s0 extensions to |
|
6901 the current \s-1ABI\s0. |
|
6902 .Ip "\fB\-mabi=no-altivec\fR" 4 |
|
6903 .IX Item "-mabi=no-altivec" |
|
6904 Disable AltiVec \s-1ABI\s0 extensions for the current \s-1ABI\s0. |
|
6905 .Ip "\fB\-mprototype\fR" 4 |
|
6906 .IX Item "-mprototype" |
|
6907 .PD 0 |
|
6908 .Ip "\fB\-mno-prototype\fR" 4 |
|
6909 .IX Item "-mno-prototype" |
|
6910 .PD |
|
6911 On System V.4 and embedded PowerPC systems assume that all calls to |
|
6912 variable argument functions are properly prototyped. Otherwise, the |
|
6913 compiler must insert an instruction before every non prototyped call to |
|
6914 set or clear bit 6 of the condition code register (\fI\s-1CR\s0\fR) to |
|
6915 indicate whether floating point values were passed in the floating point |
|
6916 registers in case the function takes a variable arguments. With |
|
6917 \&\fB\-mprototype\fR, only calls to prototyped variable argument functions |
|
6918 will set or clear the bit. |
|
6919 .Ip "\fB\-msim\fR" 4 |
|
6920 .IX Item "-msim" |
|
6921 On embedded PowerPC systems, assume that the startup module is called |
|
6922 \&\fIsim-crt0.o\fR and that the standard C libraries are \fIlibsim.a\fR and |
|
6923 \&\fIlibc.a\fR. This is the default for \fBpowerpc-*\-eabisim\fR. |
|
6924 configurations. |
|
6925 .Ip "\fB\-mmvme\fR" 4 |
|
6926 .IX Item "-mmvme" |
|
6927 On embedded PowerPC systems, assume that the startup module is called |
|
6928 \&\fIcrt0.o\fR and the standard C libraries are \fIlibmvme.a\fR and |
|
6929 \&\fIlibc.a\fR. |
|
6930 .Ip "\fB\-mads\fR" 4 |
|
6931 .IX Item "-mads" |
|
6932 On embedded PowerPC systems, assume that the startup module is called |
|
6933 \&\fIcrt0.o\fR and the standard C libraries are \fIlibads.a\fR and |
|
6934 \&\fIlibc.a\fR. |
|
6935 .Ip "\fB\-myellowknife\fR" 4 |
|
6936 .IX Item "-myellowknife" |
|
6937 On embedded PowerPC systems, assume that the startup module is called |
|
6938 \&\fIcrt0.o\fR and the standard C libraries are \fIlibyk.a\fR and |
|
6939 \&\fIlibc.a\fR. |
|
6940 .Ip "\fB\-mvxworks\fR" 4 |
|
6941 .IX Item "-mvxworks" |
|
6942 On System V.4 and embedded PowerPC systems, specify that you are |
|
6943 compiling for a VxWorks system. |
|
6944 .Ip "\fB\-mwindiss\fR" 4 |
|
6945 .IX Item "-mwindiss" |
|
6946 Specify that you are compiling for the WindISS simulation environment. |
|
6947 .Ip "\fB\-memb\fR" 4 |
|
6948 .IX Item "-memb" |
|
6949 On embedded PowerPC systems, set the \fI\s-1PPC_EMB\s0\fR bit in the \s-1ELF\s0 flags |
|
6950 header to indicate that \fBeabi\fR extended relocations are used. |
|
6951 .Ip "\fB\-meabi\fR" 4 |
|
6952 .IX Item "-meabi" |
|
6953 .PD 0 |
|
6954 .Ip "\fB\-mno-eabi\fR" 4 |
|
6955 .IX Item "-mno-eabi" |
|
6956 .PD |
|
6957 On System V.4 and embedded PowerPC systems do (do not) adhere to the |
|
6958 Embedded Applications Binary Interface (eabi) which is a set of |
|
6959 modifications to the System V.4 specifications. Selecting \fB\-meabi\fR |
|
6960 means that the stack is aligned to an 8 byte boundary, a function |
|
6961 \&\f(CW\*(C`_\|_eabi\*(C'\fR is called to from \f(CW\*(C`main\*(C'\fR to set up the eabi |
|
6962 environment, and the \fB\-msdata\fR option can use both \f(CW\*(C`r2\*(C'\fR and |
|
6963 \&\f(CW\*(C`r13\*(C'\fR to point to two separate small data areas. Selecting |
|
6964 \&\fB\-mno-eabi\fR means that the stack is aligned to a 16 byte boundary, |
|
6965 do not call an initialization function from \f(CW\*(C`main\*(C'\fR, and the |
|
6966 \&\fB\-msdata\fR option will only use \f(CW\*(C`r13\*(C'\fR to point to a single |
|
6967 small data area. The \fB\-meabi\fR option is on by default if you |
|
6968 configured \s-1GCC\s0 using one of the \fBpowerpc*\-*\-eabi*\fR options. |
|
6969 .Ip "\fB\-msdata=eabi\fR" 4 |
|
6970 .IX Item "-msdata=eabi" |
|
6971 On System V.4 and embedded PowerPC systems, put small initialized |
|
6972 \&\f(CW\*(C`const\*(C'\fR global and static data in the \fB.sdata2\fR section, which |
|
6973 is pointed to by register \f(CW\*(C`r2\*(C'\fR. Put small initialized |
|
6974 non-\f(CW\*(C`const\*(C'\fR global and static data in the \fB.sdata\fR section, |
|
6975 which is pointed to by register \f(CW\*(C`r13\*(C'\fR. Put small uninitialized |
|
6976 global and static data in the \fB.sbss\fR section, which is adjacent to |
|
6977 the \fB.sdata\fR section. The \fB\-msdata=eabi\fR option is |
|
6978 incompatible with the \fB\-mrelocatable\fR option. The |
|
6979 \&\fB\-msdata=eabi\fR option also sets the \fB\-memb\fR option. |
|
6980 .Ip "\fB\-msdata=sysv\fR" 4 |
|
6981 .IX Item "-msdata=sysv" |
|
6982 On System V.4 and embedded PowerPC systems, put small global and static |
|
6983 data in the \fB.sdata\fR section, which is pointed to by register |
|
6984 \&\f(CW\*(C`r13\*(C'\fR. Put small uninitialized global and static data in the |
|
6985 \&\fB.sbss\fR section, which is adjacent to the \fB.sdata\fR section. |
|
6986 The \fB\-msdata=sysv\fR option is incompatible with the |
|
6987 \&\fB\-mrelocatable\fR option. |
|
6988 .Ip "\fB\-msdata=default\fR" 4 |
|
6989 .IX Item "-msdata=default" |
|
6990 .PD 0 |
|
6991 .Ip "\fB\-msdata\fR" 4 |
|
6992 .IX Item "-msdata" |
|
6993 .PD |
|
6994 On System V.4 and embedded PowerPC systems, if \fB\-meabi\fR is used, |
|
6995 compile code the same as \fB\-msdata=eabi\fR, otherwise compile code the |
|
6996 same as \fB\-msdata=sysv\fR. |
|
6997 .Ip "\fB\-msdata-data\fR" 4 |
|
6998 .IX Item "-msdata-data" |
|
6999 On System V.4 and embedded PowerPC systems, put small global and static |
|
7000 data in the \fB.sdata\fR section. Put small uninitialized global and |
|
7001 static data in the \fB.sbss\fR section. Do not use register \f(CW\*(C`r13\*(C'\fR |
|
7002 to address small data however. This is the default behavior unless |
|
7003 other \fB\-msdata\fR options are used. |
|
7004 .Ip "\fB\-msdata=none\fR" 4 |
|
7005 .IX Item "-msdata=none" |
|
7006 .PD 0 |
|
7007 .Ip "\fB\-mno-sdata\fR" 4 |
|
7008 .IX Item "-mno-sdata" |
|
7009 .PD |
|
7010 On embedded PowerPC systems, put all initialized global and static data |
|
7011 in the \fB.data\fR section, and all uninitialized data in the |
|
7012 \&\fB.bss\fR section. |
|
7013 .Ip "\fB\-G\fR \fInum\fR" 4 |
|
7014 .IX Item "-G num" |
|
7015 On embedded PowerPC systems, put global and static items less than or |
|
7016 equal to \fInum\fR bytes into the small data or bss sections instead of |
|
7017 the normal data or bss section. By default, \fInum\fR is 8. The |
|
7018 \&\fB\-G\fR \fInum\fR switch is also passed to the linker. |
|
7019 All modules should be compiled with the same \fB\-G\fR \fInum\fR value. |
|
7020 .Ip "\fB\-mregnames\fR" 4 |
|
7021 .IX Item "-mregnames" |
|
7022 .PD 0 |
|
7023 .Ip "\fB\-mno-regnames\fR" 4 |
|
7024 .IX Item "-mno-regnames" |
|
7025 .PD |
|
7026 On System V.4 and embedded PowerPC systems do (do not) emit register |
|
7027 names in the assembly language output using symbolic forms. |
|
7028 .Ip "\fB\-mlongcall\fR" 4 |
|
7029 .IX Item "-mlongcall" |
|
7030 .PD 0 |
|
7031 .Ip "\fB\-mno-longcall\fR" 4 |
|
7032 .IX Item "-mno-longcall" |
|
7033 .PD |
|
7034 Default to making all function calls via pointers, so that functions |
|
7035 which reside further than 64 megabytes (67,108,864 bytes) from the |
|
7036 current location can be called. This setting can be overridden by the |
|
7037 \&\f(CW\*(C`shortcall\*(C'\fR function attribute, or by \f(CW\*(C`#pragma longcall(0)\*(C'\fR. |
|
7038 .Sp |
|
7039 Some linkers are capable of detecting out-of-range calls and generating |
|
7040 glue code on the fly. On these systems, long calls are unnecessary and |
|
7041 generate slower code. As of this writing, the \s-1AIX\s0 linker can do this, |
|
7042 as can the \s-1GNU\s0 linker for PowerPC/64. It is planned to add this feature |
|
7043 to the \s-1GNU\s0 linker for 32\-bit PowerPC systems as well. |
|
7044 .Sp |
|
7045 On Mach-O (Darwin) systems, this option directs the compiler emit to |
|
7046 the glue for every direct call, and the Darwin linker decides whether |
|
7047 to use or discard it. |
|
7048 .Sp |
|
7049 In the future, we may cause \s-1GCC\s0 to ignore all longcall specifications |
|
7050 when the linker is known to generate glue. |
|
7051 .Ip "\fB\-pthread\fR" 4 |
|
7052 .IX Item "-pthread" |
|
7053 Adds support for multithreading with the \fIpthreads\fR library. |
|
7054 This option sets flags for both the preprocessor and linker. |
|
7055 .PP |
|
7056 .I "Darwin Options" |
|
7057 .IX Subsection "Darwin Options" |
|
7058 .PP |
|
7059 These options are defined for all architectures running the Darwin operating |
|
7060 system. They are useful for compatibility with other Mac \s-1OS\s0 compilers. |
|
7061 .Ip "\fB\-all_load\fR" 4 |
|
7062 .IX Item "-all_load" |
|
7063 Loads all members of static archive libraries. |
|
7064 See man \fIld\fR\|(1) for more information. |
|
7065 .Ip "\fB\-arch_errors_fatal\fR" 4 |
|
7066 .IX Item "-arch_errors_fatal" |
|
7067 Cause the errors having to do with files that have the wrong architecture |
|
7068 to be fatal. |
|
7069 .Ip "\fB\-bind_at_load\fR" 4 |
|
7070 .IX Item "-bind_at_load" |
|
7071 Causes the output file to be marked such that the dynamic linker will |
|
7072 bind all undefined references when the file is loaded or launched. |
|
7073 .Ip "\fB\-bundle\fR" 4 |
|
7074 .IX Item "-bundle" |
|
7075 Produce a Mach-o bundle format file. |
|
7076 See man \fIld\fR\|(1) for more information. |
|
7077 .Ip "\fB\-bundle_loader\fR \fIexecutable\fR" 4 |
|
7078 .IX Item "-bundle_loader executable" |
|
7079 This specifies the \fIexecutable\fR that will be loading the build |
|
7080 output file being linked. See man \fIld\fR\|(1) for more information. |
|
7081 .Ip "\fB\-allowable_client\fR \fIclient_name\fR" 4 |
|
7082 .IX Item "-allowable_client client_name" |
|
7083 .PD 0 |
|
7084 .Ip "\fB\-arch_only\fR" 4 |
|
7085 .IX Item "-arch_only" |
|
7086 .Ip "\fB\-client_name\fR" 4 |
|
7087 .IX Item "-client_name" |
|
7088 .Ip "\fB\-compatibility_version\fR" 4 |
|
7089 .IX Item "-compatibility_version" |
|
7090 .Ip "\fB\-current_version\fR" 4 |
|
7091 .IX Item "-current_version" |
|
7092 .Ip "\fB\-dependency-file\fR" 4 |
|
7093 .IX Item "-dependency-file" |
|
7094 .Ip "\fB\-dylib_file\fR" 4 |
|
7095 .IX Item "-dylib_file" |
|
7096 .Ip "\fB\-dylinker_install_name\fR" 4 |
|
7097 .IX Item "-dylinker_install_name" |
|
7098 .Ip "\fB\-dynamic\fR" 4 |
|
7099 .IX Item "-dynamic" |
|
7100 .Ip "\fB\-dynamiclib\fR" 4 |
|
7101 .IX Item "-dynamiclib" |
|
7102 .Ip "\fB\-exported_symbols_list\fR" 4 |
|
7103 .IX Item "-exported_symbols_list" |
|
7104 .Ip "\fB\-filelist\fR" 4 |
|
7105 .IX Item "-filelist" |
|
7106 .Ip "\fB\-flat_namespace\fR" 4 |
|
7107 .IX Item "-flat_namespace" |
|
7108 .Ip "\fB\-force_cpusubtype_ALL\fR" 4 |
|
7109 .IX Item "-force_cpusubtype_ALL" |
|
7110 .Ip "\fB\-force_flat_namespace\fR" 4 |
|
7111 .IX Item "-force_flat_namespace" |
|
7112 .Ip "\fB\-headerpad_max_install_names\fR" 4 |
|
7113 .IX Item "-headerpad_max_install_names" |
|
7114 .Ip "\fB\-image_base\fR" 4 |
|
7115 .IX Item "-image_base" |
|
7116 .Ip "\fB\-init\fR" 4 |
|
7117 .IX Item "-init" |
|
7118 .Ip "\fB\-install_name\fR" 4 |
|
7119 .IX Item "-install_name" |
|
7120 .Ip "\fB\-keep_private_externs\fR" 4 |
|
7121 .IX Item "-keep_private_externs" |
|
7122 .Ip "\fB\-multi_module\fR" 4 |
|
7123 .IX Item "-multi_module" |
|
7124 .Ip "\fB\-multiply_defined\fR" 4 |
|
7125 .IX Item "-multiply_defined" |
|
7126 .Ip "\fB\-multiply_defined_unused\fR" 4 |
|
7127 .IX Item "-multiply_defined_unused" |
|
7128 .Ip "\fB\-noall_load\fR" 4 |
|
7129 .IX Item "-noall_load" |
|
7130 .Ip "\fB\-nofixprebinding\fR" 4 |
|
7131 .IX Item "-nofixprebinding" |
|
7132 .Ip "\fB\-nomultidefs\fR" 4 |
|
7133 .IX Item "-nomultidefs" |
|
7134 .Ip "\fB\-noprebind\fR" 4 |
|
7135 .IX Item "-noprebind" |
|
7136 .Ip "\fB\-noseglinkedit\fR" 4 |
|
7137 .IX Item "-noseglinkedit" |
|
7138 .Ip "\fB\-pagezero_size\fR" 4 |
|
7139 .IX Item "-pagezero_size" |
|
7140 .Ip "\fB\-prebind\fR" 4 |
|
7141 .IX Item "-prebind" |
|
7142 .Ip "\fB\-prebind_all_twolevel_modules\fR" 4 |
|
7143 .IX Item "-prebind_all_twolevel_modules" |
|
7144 .Ip "\fB\-private_bundle\fR" 4 |
|
7145 .IX Item "-private_bundle" |
|
7146 .Ip "\fB\-read_only_relocs\fR" 4 |
|
7147 .IX Item "-read_only_relocs" |
|
7148 .Ip "\fB\-sectalign\fR" 4 |
|
7149 .IX Item "-sectalign" |
|
7150 .Ip "\fB\-sectobjectsymbols\fR" 4 |
|
7151 .IX Item "-sectobjectsymbols" |
|
7152 .Ip "\fB\-whyload\fR" 4 |
|
7153 .IX Item "-whyload" |
|
7154 .Ip "\fB\-seg1addr\fR" 4 |
|
7155 .IX Item "-seg1addr" |
|
7156 .Ip "\fB\-sectcreate\fR" 4 |
|
7157 .IX Item "-sectcreate" |
|
7158 .Ip "\fB\-sectobjectsymbols\fR" 4 |
|
7159 .IX Item "-sectobjectsymbols" |
|
7160 .Ip "\fB\-sectorder\fR" 4 |
|
7161 .IX Item "-sectorder" |
|
7162 .Ip "\fB\-seg_addr_table\fR" 4 |
|
7163 .IX Item "-seg_addr_table" |
|
7164 .Ip "\fB\-seg_addr_table_filename\fR" 4 |
|
7165 .IX Item "-seg_addr_table_filename" |
|
7166 .Ip "\fB\-seglinkedit\fR" 4 |
|
7167 .IX Item "-seglinkedit" |
|
7168 .Ip "\fB\-segprot\fR" 4 |
|
7169 .IX Item "-segprot" |
|
7170 .Ip "\fB\-segs_read_only_addr\fR" 4 |
|
7171 .IX Item "-segs_read_only_addr" |
|
7172 .Ip "\fB\-segs_read_write_addr\fR" 4 |
|
7173 .IX Item "-segs_read_write_addr" |
|
7174 .Ip "\fB\-single_module\fR" 4 |
|
7175 .IX Item "-single_module" |
|
7176 .Ip "\fB\-static\fR" 4 |
|
7177 .IX Item "-static" |
|
7178 .Ip "\fB\-sub_library\fR" 4 |
|
7179 .IX Item "-sub_library" |
|
7180 .Ip "\fB\-sub_umbrella\fR" 4 |
|
7181 .IX Item "-sub_umbrella" |
|
7182 .Ip "\fB\-twolevel_namespace\fR" 4 |
|
7183 .IX Item "-twolevel_namespace" |
|
7184 .Ip "\fB\-umbrella\fR" 4 |
|
7185 .IX Item "-umbrella" |
|
7186 .Ip "\fB\-undefined\fR" 4 |
|
7187 .IX Item "-undefined" |
|
7188 .Ip "\fB\-unexported_symbols_list\fR" 4 |
|
7189 .IX Item "-unexported_symbols_list" |
|
7190 .Ip "\fB\-weak_reference_mismatches\fR" 4 |
|
7191 .IX Item "-weak_reference_mismatches" |
|
7192 .Ip "\fB\-whatsloaded\fR" 4 |
|
7193 .IX Item "-whatsloaded" |
|
7194 .PD |
|
7195 These options are available for Darwin linker. Darwin linker man page |
|
7196 describes them in detail. |
|
7197 .PP |
|
7198 .I "\s-1MIPS\s0 Options" |
|
7199 .IX Subsection "MIPS Options" |
|
7200 .Ip "\fB\-EB\fR" 4 |
|
7201 .IX Item "-EB" |
|
7202 Generate big-endian code. |
|
7203 .Ip "\fB\-EL\fR" 4 |
|
7204 .IX Item "-EL" |
|
7205 Generate little-endian code. This is the default for \fBmips*el-*\-*\fR |
|
7206 configurations. |
|
7207 .Ip "\fB\-march=\fR\fIarch\fR" 4 |
|
7208 .IX Item "-march=arch" |
|
7209 Generate code that will run on \fIarch\fR, which can be the name of a |
|
7210 generic \s-1MIPS\s0 \s-1ISA\s0, or the name of a particular processor. |
|
7211 The \s-1ISA\s0 names are: |
|
7212 \&\fBmips1\fR, \fBmips2\fR, \fBmips3\fR, \fBmips4\fR, |
|
7213 \&\fBmips32\fR, \fBmips32r2\fR, and \fBmips64\fR. |
|
7214 The processor names are: |
|
7215 \&\fB4kc\fR, \fB4kp\fR, \fB5kc\fR, \fB20kc\fR, |
|
7216 \&\fBm4k\fR, |
|
7217 \&\fBr2000\fR, \fBr3000\fR, \fBr3900\fR, \fBr4000\fR, \fBr4400\fR, |
|
7218 \&\fBr4600\fR, \fBr4650\fR, \fBr6000\fR, \fBr8000\fR, \fBrm7000\fR, |
|
7219 \&\fBrm9000\fR, |
|
7220 \&\fBorion\fR, |
|
7221 \&\fBsb1\fR, |
|
7222 \&\fBvr4100\fR, \fBvr4111\fR, \fBvr4120\fR, \fBvr4300\fR, |
|
7223 \&\fBvr5000\fR, \fBvr5400\fR and \fBvr5500\fR. |
|
7224 The special value \fBfrom-abi\fR selects the |
|
7225 most compatible architecture for the selected \s-1ABI\s0 (that is, |
|
7226 \&\fBmips1\fR for 32\-bit ABIs and \fBmips3\fR for 64\-bit ABIs). |
|
7227 .Sp |
|
7228 In processor names, a final \fB000\fR can be abbreviated as \fBk\fR |
|
7229 (for example, \fB\-march=r2k\fR). Prefixes are optional, and |
|
7230 \&\fBvr\fR may be written \fBr\fR. |
|
7231 .Sp |
|
7232 \&\s-1GCC\s0 defines two macros based on the value of this option. The first |
|
7233 is \fB_MIPS_ARCH\fR, which gives the name of target architecture, as |
|
7234 a string. The second has the form \fB_MIPS_ARCH_\fR\fIfoo\fR, |
|
7235 where \fIfoo\fR is the capitalized value of \fB_MIPS_ARCH\fR. |
|
7236 For example, \fB\-march=r2000\fR will set \fB_MIPS_ARCH\fR |
|
7237 to \fB\*(L"r2000\*(R"\fR and define the macro \fB_MIPS_ARCH_R2000\fR. |
|
7238 .Sp |
|
7239 Note that the \fB_MIPS_ARCH\fR macro uses the processor names given |
|
7240 above. In other words, it will have the full prefix and will not |
|
7241 abbreviate \fB000\fR as \fBk\fR. In the case of \fBfrom-abi\fR, |
|
7242 the macro names the resolved architecture (either \fB\*(L"mips1\*(R"\fR or |
|
7243 \&\fB\*(L"mips3\*(R"\fR). It names the default architecture when no |
|
7244 \&\fB\-march\fR option is given. |
|
7245 .Ip "\fB\-mtune=\fR\fIarch\fR" 4 |
|
7246 .IX Item "-mtune=arch" |
|
7247 Optimize for \fIarch\fR. Among other things, this option controls |
|
7248 the way instructions are scheduled, and the perceived cost of arithmetic |
|
7249 operations. The list of \fIarch\fR values is the same as for |
|
7250 \&\fB\-march\fR. |
|
7251 .Sp |
|
7252 When this option is not used, \s-1GCC\s0 will optimize for the processor |
|
7253 specified by \fB\-march\fR. By using \fB\-march\fR and |
|
7254 \&\fB\-mtune\fR together, it is possible to generate code that will |
|
7255 run on a family of processors, but optimize the code for one |
|
7256 particular member of that family. |
|
7257 .Sp |
|
7258 \&\fB\-mtune\fR defines the macros \fB_MIPS_TUNE\fR and |
|
7259 \&\fB_MIPS_TUNE_\fR\fIfoo\fR, which work in the same way as the |
|
7260 \&\fB\-march\fR ones described above. |
|
7261 .Ip "\fB\-mips1\fR" 4 |
|
7262 .IX Item "-mips1" |
|
7263 Equivalent to \fB\-march=mips1\fR. |
|
7264 .Ip "\fB\-mips2\fR" 4 |
|
7265 .IX Item "-mips2" |
|
7266 Equivalent to \fB\-march=mips2\fR. |
|
7267 .Ip "\fB\-mips3\fR" 4 |
|
7268 .IX Item "-mips3" |
|
7269 Equivalent to \fB\-march=mips3\fR. |
|
7270 .Ip "\fB\-mips4\fR" 4 |
|
7271 .IX Item "-mips4" |
|
7272 Equivalent to \fB\-march=mips4\fR. |
|
7273 .Ip "\fB\-mips32\fR" 4 |
|
7274 .IX Item "-mips32" |
|
7275 Equivalent to \fB\-march=mips32\fR. |
|
7276 .Ip "\fB\-mips32r2\fR" 4 |
|
7277 .IX Item "-mips32r2" |
|
7278 Equivalent to \fB\-march=mips32r2\fR. |
|
7279 .Ip "\fB\-mips64\fR" 4 |
|
7280 .IX Item "-mips64" |
|
7281 Equivalent to \fB\-march=mips64\fR. |
|
7282 .Ip "\fB\-mips16\fR" 4 |
|
7283 .IX Item "-mips16" |
|
7284 .PD 0 |
|
7285 .Ip "\fB\-mno-mips16\fR" 4 |
|
7286 .IX Item "-mno-mips16" |
|
7287 .PD |
|
7288 Use (do not use) the \s-1MIPS16\s0 \s-1ISA\s0. |
|
7289 .Ip "\fB\-mabi=32\fR" 4 |
|
7290 .IX Item "-mabi=32" |
|
7291 .PD 0 |
|
7292 .Ip "\fB\-mabi=o64\fR" 4 |
|
7293 .IX Item "-mabi=o64" |
|
7294 .Ip "\fB\-mabi=n32\fR" 4 |
|
7295 .IX Item "-mabi=n32" |
|
7296 .Ip "\fB\-mabi=64\fR" 4 |
|
7297 .IX Item "-mabi=64" |
|
7298 .Ip "\fB\-mabi=eabi\fR" 4 |
|
7299 .IX Item "-mabi=eabi" |
|
7300 .PD |
|
7301 Generate code for the given \s-1ABI\s0. |
|
7302 .Sp |
|
7303 Note that the \s-1EABI\s0 has a 32\-bit and a 64\-bit variant. \s-1GCC\s0 normally |
|
7304 generates 64\-bit code when you select a 64\-bit architecture, but you |
|
7305 can use \fB\-mgp32\fR to get 32\-bit code instead. |
|
7306 .Ip "\fB\-mabicalls\fR" 4 |
|
7307 .IX Item "-mabicalls" |
|
7308 .PD 0 |
|
7309 .Ip "\fB\-mno-abicalls\fR" 4 |
|
7310 .IX Item "-mno-abicalls" |
|
7311 .PD |
|
7312 Generate (do not generate) SVR4\-style position-independent code. |
|
7313 \&\fB\-mabicalls\fR is the default for SVR4\-based systems. |
|
7314 .Ip "\fB\-mxgot\fR" 4 |
|
7315 .IX Item "-mxgot" |
|
7316 .PD 0 |
|
7317 .Ip "\fB\-mno-xgot\fR" 4 |
|
7318 .IX Item "-mno-xgot" |
|
7319 .PD |
|
7320 Lift (do not lift) the usual restrictions on the size of the global |
|
7321 offset table. |
|
7322 .Sp |
|
7323 \&\s-1GCC\s0 normally uses a single instruction to load values from the \s-1GOT\s0. |
|
7324 While this is relatively efficient, it will only work if the \s-1GOT\s0 |
|
7325 is smaller than about 64k. Anything larger will cause the linker |
|
7326 to report an error such as: |
|
7327 .Sp |
|
7328 .Vb 1 |
|
7329 \& relocation truncated to fit: R_MIPS_GOT16 foobar |
|
7330 .Ve |
|
7331 If this happens, you should recompile your code with \fB\-mxgot\fR. |
|
7332 It should then work with very large GOTs, although it will also be |
|
7333 less efficient, since it will take three instructions to fetch the |
|
7334 value of a global symbol. |
|
7335 .Sp |
|
7336 Note that some linkers can create multiple GOTs. If you have such a |
|
7337 linker, you should only need to use \fB\-mxgot\fR when a single object |
|
7338 file accesses more than 64k's worth of \s-1GOT\s0 entries. Very few do. |
|
7339 .Sp |
|
7340 These options have no effect unless \s-1GCC\s0 is generating position |
|
7341 independent code. |
|
7342 .Ip "\fB\-membedded-pic\fR" 4 |
|
7343 .IX Item "-membedded-pic" |
|
7344 .PD 0 |
|
7345 .Ip "\fB\-mno-embedded-pic\fR" 4 |
|
7346 .IX Item "-mno-embedded-pic" |
|
7347 .PD |
|
7348 Generate (do not generate) position-independent code suitable for some |
|
7349 embedded systems. All calls are made using \s-1PC\s0 relative addresses, and |
|
7350 all data is addressed using the \f(CW$gp\fR register. No more than 65536 |
|
7351 bytes of global data may be used. This requires \s-1GNU\s0 as and \s-1GNU\s0 ld, |
|
7352 which do most of the work. |
|
7353 .Ip "\fB\-mgp32\fR" 4 |
|
7354 .IX Item "-mgp32" |
|
7355 Assume that general-purpose registers are 32 bits wide. |
|
7356 .Ip "\fB\-mgp64\fR" 4 |
|
7357 .IX Item "-mgp64" |
|
7358 Assume that general-purpose registers are 64 bits wide. |
|
7359 .Ip "\fB\-mfp32\fR" 4 |
|
7360 .IX Item "-mfp32" |
|
7361 Assume that floating-point registers are 32 bits wide. |
|
7362 .Ip "\fB\-mfp64\fR" 4 |
|
7363 .IX Item "-mfp64" |
|
7364 Assume that floating-point registers are 64 bits wide. |
|
7365 .Ip "\fB\-mhard-float\fR" 4 |
|
7366 .IX Item "-mhard-float" |
|
7367 Use floating-point coprocessor instructions. |
|
7368 .Ip "\fB\-msoft-float\fR" 4 |
|
7369 .IX Item "-msoft-float" |
|
7370 Do not use floating-point coprocessor instructions. Implement |
|
7371 floating-point calculations using library calls instead. |
|
7372 .Ip "\fB\-msingle-float\fR" 4 |
|
7373 .IX Item "-msingle-float" |
|
7374 Assume that the floating-point coprocessor only supports single-precision |
|
7375 operations. |
|
7376 .Ip "\fB\-mdouble-float\fR" 4 |
|
7377 .IX Item "-mdouble-float" |
|
7378 Assume that the floating-point coprocessor supports double-precision |
|
7379 operations. This is the default. |
|
7380 .Ip "\fB\-mint64\fR" 4 |
|
7381 .IX Item "-mint64" |
|
7382 Force \f(CW\*(C`int\*(C'\fR and \f(CW\*(C`long\*(C'\fR types to be 64 bits wide. See |
|
7383 \&\fB\-mlong32\fR for an explanation of the default and the way |
|
7384 that the pointer size is determined. |
|
7385 .Ip "\fB\-mlong64\fR" 4 |
|
7386 .IX Item "-mlong64" |
|
7387 Force \f(CW\*(C`long\*(C'\fR types to be 64 bits wide. See \fB\-mlong32\fR for |
|
7388 an explanation of the default and the way that the pointer size is |
|
7389 determined. |
|
7390 .Ip "\fB\-mlong32\fR" 4 |
|
7391 .IX Item "-mlong32" |
|
7392 Force \f(CW\*(C`long\*(C'\fR, \f(CW\*(C`int\*(C'\fR, and pointer types to be 32 bits wide. |
|
7393 .Sp |
|
7394 The default size of \f(CW\*(C`int\*(C'\fRs, \f(CW\*(C`long\*(C'\fRs and pointers depends on |
|
7395 the \s-1ABI\s0. All the supported ABIs use 32\-bit \f(CW\*(C`int\*(C'\fRs. The n64 \s-1ABI\s0 |
|
7396 uses 64\-bit \f(CW\*(C`long\*(C'\fRs, as does the 64\-bit \s-1EABI\s0; the others use |
|
7397 32\-bit \f(CW\*(C`long\*(C'\fRs. Pointers are the same size as \f(CW\*(C`long\*(C'\fRs, |
|
7398 or the same size as integer registers, whichever is smaller. |
|
7399 .Ip "\fB\-G\fR \fInum\fR" 4 |
|
7400 .IX Item "-G num" |
|
7401 Put global and static items less than or equal to \fInum\fR bytes into |
|
7402 the small data or bss section instead of the normal data or bss section. |
|
7403 This allows the data to be accessed using a single instruction. |
|
7404 .Sp |
|
7405 All modules should be compiled with the same \fB\-G\fR \fInum\fR |
|
7406 value. |
|
7407 .Ip "\fB\-membedded-data\fR" 4 |
|
7408 .IX Item "-membedded-data" |
|
7409 .PD 0 |
|
7410 .Ip "\fB\-mno-embedded-data\fR" 4 |
|
7411 .IX Item "-mno-embedded-data" |
|
7412 .PD |
|
7413 Allocate variables to the read-only data section first if possible, then |
|
7414 next in the small data section if possible, otherwise in data. This gives |
|
7415 slightly slower code than the default, but reduces the amount of \s-1RAM\s0 required |
|
7416 when executing, and thus may be preferred for some embedded systems. |
|
7417 .Ip "\fB\-muninit-const-in-rodata\fR" 4 |
|
7418 .IX Item "-muninit-const-in-rodata" |
|
7419 .PD 0 |
|
7420 .Ip "\fB\-mno-uninit-const-in-rodata\fR" 4 |
|
7421 .IX Item "-mno-uninit-const-in-rodata" |
|
7422 .PD |
|
7423 Put uninitialized \f(CW\*(C`const\*(C'\fR variables in the read-only data section. |
|
7424 This option is only meaningful in conjunction with \fB\-membedded-data\fR. |
|
7425 .Ip "\fB\-msplit-addresses\fR" 4 |
|
7426 .IX Item "-msplit-addresses" |
|
7427 .PD 0 |
|
7428 .Ip "\fB\-mno-split-addresses\fR" 4 |
|
7429 .IX Item "-mno-split-addresses" |
|
7430 .PD |
|
7431 Enable (disable) use of the \f(CW\*(C`%hi()\*(C'\fR and \f(CW\*(C`%lo()\*(C'\fR assembler |
|
7432 relocation operators. This option has been superceded by |
|
7433 \&\fB\-mexplicit-relocs\fR but is retained for backwards compatibility. |
|
7434 .Ip "\fB\-mexplicit-relocs\fR" 4 |
|
7435 .IX Item "-mexplicit-relocs" |
|
7436 .PD 0 |
|
7437 .Ip "\fB\-mno-explicit-relocs\fR" 4 |
|
7438 .IX Item "-mno-explicit-relocs" |
|
7439 .PD |
|
7440 Use (do not use) assembler relocation operators when dealing with symbolic |
|
7441 addresses. The alternative, selected by \fB\-mno-explicit-relocs\fR, |
|
7442 is to use assembler macros instead. |
|
7443 .Sp |
|
7444 \&\fB\-mexplicit-relocs\fR is usually the default if \s-1GCC\s0 was |
|
7445 configured to use an assembler that supports relocation operators. |
|
7446 However, there are two exceptions: |
|
7447 .RS 4 |
|
7448 .Ip "\(bu" 4 |
|
7449 \&\s-1GCC\s0 is not yet able to generate explicit relocations for the combination |
|
7450 of \fB\-mabi=64\fR and \fB\-mno-abicalls\fR. This will be addressed |
|
7451 in a future release. |
|
7452 .Ip "\(bu" 4 |
|
7453 The combination of \fB\-mabicalls\fR and \fB\-fno-unit-at-a-time\fR |
|
7454 implies \fB\-mno-explicit-relocs\fR unless explicitly overridden. |
|
7455 This is because, when generating abicalls, the choice of relocation |
|
7456 depends on whether a symbol is local or global. In some rare cases, |
|
7457 \&\s-1GCC\s0 will not be able to decide this until the whole compilation unit |
|
7458 has been read. |
|
7459 .RE |
|
7460 .RS 4 |
|
7461 .RE |
|
7462 .Ip "\fB\-mrnames\fR" 4 |
|
7463 .IX Item "-mrnames" |
|
7464 .PD 0 |
|
7465 .Ip "\fB\-mno-rnames\fR" 4 |
|
7466 .IX Item "-mno-rnames" |
|
7467 .PD |
|
7468 Generate (do not generate) code that refers to registers using their |
|
7469 software names. The default is \fB\-mno-rnames\fR, which tells \s-1GCC\s0 |
|
7470 to use hardware names like \fB$4\fR instead of software names like |
|
7471 \&\fBa0\fR. The only assembler known to support \fB\-rnames\fR is |
|
7472 the Algorithmics assembler. |
|
7473 .Ip "\fB\-mcheck-zero-division\fR" 4 |
|
7474 .IX Item "-mcheck-zero-division" |
|
7475 .PD 0 |
|
7476 .Ip "\fB\-mno-check-zero-division\fR" 4 |
|
7477 .IX Item "-mno-check-zero-division" |
|
7478 .PD |
|
7479 Trap (do not trap) on integer division by zero. The default is |
|
7480 \&\fB\-mcheck-zero-division\fR. |
|
7481 .Ip "\fB\-mmemcpy\fR" 4 |
|
7482 .IX Item "-mmemcpy" |
|
7483 .PD 0 |
|
7484 .Ip "\fB\-mno-memcpy\fR" 4 |
|
7485 .IX Item "-mno-memcpy" |
|
7486 .PD |
|
7487 Force (do not force) the use of \f(CW\*(C`memcpy()\*(C'\fR for non-trivial block |
|
7488 moves. The default is \fB\-mno-memcpy\fR, which allows \s-1GCC\s0 to inline |
|
7489 most constant-sized copies. |
|
7490 .Ip "\fB\-mlong-calls\fR" 4 |
|
7491 .IX Item "-mlong-calls" |
|
7492 .PD 0 |
|
7493 .Ip "\fB\-mno-long-calls\fR" 4 |
|
7494 .IX Item "-mno-long-calls" |
|
7495 .PD |
|
7496 Disable (do not disable) use of the \f(CW\*(C`jal\*(C'\fR instruction. Calling |
|
7497 functions using \f(CW\*(C`jal\*(C'\fR is more efficient but requires the caller |
|
7498 and callee to be in the same 256 megabyte segment. |
|
7499 .Sp |
|
7500 This option has no effect on abicalls code. The default is |
|
7501 \&\fB\-mno-long-calls\fR. |
|
7502 .Ip "\fB\-mmad\fR" 4 |
|
7503 .IX Item "-mmad" |
|
7504 .PD 0 |
|
7505 .Ip "\fB\-mno-mad\fR" 4 |
|
7506 .IX Item "-mno-mad" |
|
7507 .PD |
|
7508 Enable (disable) use of the \f(CW\*(C`mad\*(C'\fR, \f(CW\*(C`madu\*(C'\fR and \f(CW\*(C`mul\*(C'\fR |
|
7509 instructions, as provided by the R4650 \s-1ISA\s0. |
|
7510 .Ip "\fB\-mfused-madd\fR" 4 |
|
7511 .IX Item "-mfused-madd" |
|
7512 .PD 0 |
|
7513 .Ip "\fB\-mno-fused-madd\fR" 4 |
|
7514 .IX Item "-mno-fused-madd" |
|
7515 .PD |
|
7516 Enable (disable) use of the floating point multiply-accumulate |
|
7517 instructions, when they are available. The default is |
|
7518 \&\fB\-mfused-madd\fR. |
|
7519 .Sp |
|
7520 When multiply-accumulate instructions are used, the intermediate |
|
7521 product is calculated to infinite precision and is not subject to |
|
7522 the \s-1FCSR\s0 Flush to Zero bit. This may be undesirable in some |
|
7523 circumstances. |
|
7524 .Ip "\fB\-nocpp\fR" 4 |
|
7525 .IX Item "-nocpp" |
|
7526 Tell the \s-1MIPS\s0 assembler to not run its preprocessor over user |
|
7527 assembler files (with a \fB.s\fR suffix) when assembling them. |
|
7528 .Ip "\fB\-mfix-sb1\fR" 4 |
|
7529 .IX Item "-mfix-sb1" |
|
7530 .PD 0 |
|
7531 .Ip "\fB\-mno-fix-sb1\fR" 4 |
|
7532 .IX Item "-mno-fix-sb1" |
|
7533 .PD |
|
7534 Work around certain \s-1SB-1\s0 \s-1CPU\s0 core errata. |
|
7535 (This flag currently works around the \s-1SB-1\s0 revision 2 |
|
7536 ``F1'' and ``F2'' floating point errata.) |
|
7537 .Ip "\fB\-mflush-func=\fR\fIfunc\fR" 4 |
|
7538 .IX Item "-mflush-func=func" |
|
7539 .PD 0 |
|
7540 .Ip "\fB\-mno-flush-func\fR" 4 |
|
7541 .IX Item "-mno-flush-func" |
|
7542 .PD |
|
7543 Specifies the function to call to flush the I and D caches, or to not |
|
7544 call any such function. If called, the function must take the same |
|
7545 arguments as the common \f(CW\*(C`_flush_func()\*(C'\fR, that is, the address of the |
|
7546 memory range for which the cache is being flushed, the size of the |
|
7547 memory range, and the number 3 (to flush both caches). The default |
|
7548 depends on the target \s-1GCC\s0 was configured for, but commonly is either |
|
7549 \&\fB_flush_func\fR or \fB_\|_cpu_flush\fR. |
|
7550 .Ip "\fB\-mbranch-likely\fR" 4 |
|
7551 .IX Item "-mbranch-likely" |
|
7552 .PD 0 |
|
7553 .Ip "\fB\-mno-branch-likely\fR" 4 |
|
7554 .IX Item "-mno-branch-likely" |
|
7555 .PD |
|
7556 Enable or disable use of Branch Likely instructions, regardless of the |
|
7557 default for the selected architecture. By default, Branch Likely |
|
7558 instructions may be generated if they are supported by the selected |
|
7559 architecture. An exception is for the \s-1MIPS32\s0 and \s-1MIPS64\s0 architectures |
|
7560 and processors which implement those architectures; for those, Branch |
|
7561 Likely instructions will not be generated by default because the \s-1MIPS32\s0 |
|
7562 and \s-1MIPS64\s0 architectures specifically deprecate their use. |
|
7563 .PP |
|
7564 .I "Intel 386 and \s-1AMD\s0 x86\-64 Options" |
|
7565 .IX Subsection "Intel 386 and AMD x86-64 Options" |
|
7566 .PP |
|
7567 These \fB\-m\fR options are defined for the i386 and x86\-64 family of |
|
7568 computers: |
|
7569 .Ip "\fB\-mtune=\fR\fIcpu-type\fR" 4 |
|
7570 .IX Item "-mtune=cpu-type" |
|
7571 Tune to \fIcpu-type\fR everything applicable about the generated code, except |
|
7572 for the \s-1ABI\s0 and the set of available instructions. The choices for |
|
7573 \&\fIcpu-type\fR are: |
|
7574 .RS 4 |
|
7575 .Ip "\fIi386\fR" 4 |
|
7576 .IX Item "i386" |
|
7577 Original Intel's i386 \s-1CPU\s0. |
|
7578 .Ip "\fIi486\fR" 4 |
|
7579 .IX Item "i486" |
|
7580 Intel's i486 \s-1CPU\s0. (No scheduling is implemented for this chip.) |
|
7581 .Ip "\fIi586, pentium\fR" 4 |
|
7582 .IX Item "i586, pentium" |
|
7583 Intel Pentium \s-1CPU\s0 with no \s-1MMX\s0 support. |
|
7584 .Ip "\fIpentium-mmx\fR" 4 |
|
7585 .IX Item "pentium-mmx" |
|
7586 Intel PentiumMMX \s-1CPU\s0 based on Pentium core with \s-1MMX\s0 instruction set support. |
|
7587 .Ip "\fIi686, pentiumpro\fR" 4 |
|
7588 .IX Item "i686, pentiumpro" |
|
7589 Intel PentiumPro \s-1CPU\s0. |
|
7590 .Ip "\fIpentium2\fR" 4 |
|
7591 .IX Item "pentium2" |
|
7592 Intel Pentium2 \s-1CPU\s0 based on PentiumPro core with \s-1MMX\s0 instruction set support. |
|
7593 .Ip "\fIpentium3, pentium3m\fR" 4 |
|
7594 .IX Item "pentium3, pentium3m" |
|
7595 Intel Pentium3 \s-1CPU\s0 based on PentiumPro core with \s-1MMX\s0 and \s-1SSE\s0 instruction set |
|
7596 support. |
|
7597 .Ip "\fIpentium-m\fR" 4 |
|
7598 .IX Item "pentium-m" |
|
7599 Low power version of Intel Pentium3 \s-1CPU\s0 with \s-1MMX\s0, \s-1SSE\s0 and \s-1SSE2\s0 instruction set |
|
7600 support. Used by Centrino notebooks. |
|
7601 .Ip "\fIpentium4, pentium4m\fR" 4 |
|
7602 .IX Item "pentium4, pentium4m" |
|
7603 Intel Pentium4 \s-1CPU\s0 with \s-1MMX\s0, \s-1SSE\s0 and \s-1SSE2\s0 instruction set support. |
|
7604 .Ip "\fIprescott\fR" 4 |
|
7605 .IX Item "prescott" |
|
7606 Improved version of Intel Pentium4 \s-1CPU\s0 with \s-1MMX\s0, \s-1SSE\s0, \s-1SSE2\s0 and \s-1SSE3\s0 instruction |
|
7607 set support. |
|
7608 .Ip "\fInocona\fR" 4 |
|
7609 .IX Item "nocona" |
|
7610 Improved version of Intel Pentium4 \s-1CPU\s0 with 64\-bit extensions, \s-1MMX\s0, \s-1SSE\s0, |
|
7611 \&\s-1SSE2\s0 and \s-1SSE3\s0 instruction set support. |
|
7612 .Ip "\fIk6\fR" 4 |
|
7613 .IX Item "k6" |
|
7614 \&\s-1AMD\s0 K6 \s-1CPU\s0 with \s-1MMX\s0 instruction set support. |
|
7615 .Ip "\fIk6\-2, k6\-3\fR" 4 |
|
7616 .IX Item "k6-2, k6-3" |
|
7617 Improved versions of \s-1AMD\s0 K6 \s-1CPU\s0 with \s-1MMX\s0 and 3dNOW! instruction set support. |
|
7618 .Ip "\fIathlon, athlon-tbird\fR" 4 |
|
7619 .IX Item "athlon, athlon-tbird" |
|
7620 \&\s-1AMD\s0 Athlon \s-1CPU\s0 with \s-1MMX\s0, 3dNOW!, enhanced 3dNOW! and \s-1SSE\s0 prefetch instructions |
|
7621 support. |
|
7622 .Ip "\fIathlon-4, athlon-xp, athlon-mp\fR" 4 |
|
7623 .IX Item "athlon-4, athlon-xp, athlon-mp" |
|
7624 Improved \s-1AMD\s0 Athlon \s-1CPU\s0 with \s-1MMX\s0, 3dNOW!, enhanced 3dNOW! and full \s-1SSE\s0 |
|
7625 instruction set support. |
|
7626 .Ip "\fIk8, opteron, athlon64, athlon-fx\fR" 4 |
|
7627 .IX Item "k8, opteron, athlon64, athlon-fx" |
|
7628 \&\s-1AMD\s0 K8 core based CPUs with x86\-64 instruction set support. (This supersets |
|
7629 \&\s-1MMX\s0, \s-1SSE\s0, \s-1SSE2\s0, 3dNOW!, enhanced 3dNOW! and 64\-bit instruction set extensions.) |
|
7630 .Ip "\fIwinchip-c6\fR" 4 |
|
7631 .IX Item "winchip-c6" |
|
7632 \&\s-1IDT\s0 Winchip C6 \s-1CPU\s0, dealt in same way as i486 with additional \s-1MMX\s0 instruction |
|
7633 set support. |
|
7634 .Ip "\fIwinchip2\fR" 4 |
|
7635 .IX Item "winchip2" |
|
7636 \&\s-1IDT\s0 Winchip2 \s-1CPU\s0, dealt in same way as i486 with additional \s-1MMX\s0 and 3dNOW! |
|
7637 instruction set support. |
|
7638 .Ip "\fIc3\fR" 4 |
|
7639 .IX Item "c3" |
|
7640 Via C3 \s-1CPU\s0 with \s-1MMX\s0 and 3dNOW! instruction set support. (No scheduling is |
|
7641 implemented for this chip.) |
|
7642 .Ip "\fIc3\-2\fR" 4 |
|
7643 .IX Item "c3-2" |
|
7644 Via C3\-2 \s-1CPU\s0 with \s-1MMX\s0 and \s-1SSE\s0 instruction set support. (No scheduling is |
|
7645 implemented for this chip.) |
|
7646 .RE |
|
7647 .RS 4 |
|
7648 .Sp |
|
7649 While picking a specific \fIcpu-type\fR will schedule things appropriately |
|
7650 for that particular chip, the compiler will not generate any code that |
|
7651 does not run on the i386 without the \fB\-march=\fR\fIcpu-type\fR option |
|
7652 being used. |
|
7653 .RE |
|
7654 .Ip "\fB\-march=\fR\fIcpu-type\fR" 4 |
|
7655 .IX Item "-march=cpu-type" |
|
7656 Generate instructions for the machine type \fIcpu-type\fR. The choices |
|
7657 for \fIcpu-type\fR are the same as for \fB\-mtune\fR. Moreover, |
|
7658 specifying \fB\-march=\fR\fIcpu-type\fR implies \fB\-mtune=\fR\fIcpu-type\fR. |
|
7659 .Ip "\fB\-mcpu=\fR\fIcpu-type\fR" 4 |
|
7660 .IX Item "-mcpu=cpu-type" |
|
7661 A deprecated synonym for \fB\-mtune\fR. |
|
7662 .Ip "\fB\-m386\fR" 4 |
|
7663 .IX Item "-m386" |
|
7664 .PD 0 |
|
7665 .Ip "\fB\-m486\fR" 4 |
|
7666 .IX Item "-m486" |
|
7667 .Ip "\fB\-mpentium\fR" 4 |
|
7668 .IX Item "-mpentium" |
|
7669 .Ip "\fB\-mpentiumpro\fR" 4 |
|
7670 .IX Item "-mpentiumpro" |
|
7671 .PD |
|
7672 These options are synonyms for \fB\-mtune=i386\fR, \fB\-mtune=i486\fR, |
|
7673 \&\fB\-mtune=pentium\fR, and \fB\-mtune=pentiumpro\fR respectively. |
|
7674 These synonyms are deprecated. |
|
7675 .Ip "\fB\-mfpmath=\fR\fIunit\fR" 4 |
|
7676 .IX Item "-mfpmath=unit" |
|
7677 Generate floating point arithmetics for selected unit \fIunit\fR. The choices |
|
7678 for \fIunit\fR are: |
|
7679 .RS 4 |
|
7680 .Ip "\fB387\fR" 4 |
|
7681 .IX Item "387" |
|
7682 Use the standard 387 floating point coprocessor present majority of chips and |
|
7683 emulated otherwise. Code compiled with this option will run almost everywhere. |
|
7684 The temporary results are computed in 80bit precision instead of precision |
|
7685 specified by the type resulting in slightly different results compared to most |
|
7686 of other chips. See \fB\-ffloat-store\fR for more detailed description. |
|
7687 .Sp |
|
7688 This is the default choice for i386 compiler. |
|
7689 .Ip "\fBsse\fR" 4 |
|
7690 .IX Item "sse" |
|
7691 Use scalar floating point instructions present in the \s-1SSE\s0 instruction set. |
|
7692 This instruction set is supported by Pentium3 and newer chips, in the \s-1AMD\s0 line |
|
7693 by Athlon-4, Athlon-xp and Athlon-mp chips. The earlier version of \s-1SSE\s0 |
|
7694 instruction set supports only single precision arithmetics, thus the double and |
|
7695 extended precision arithmetics is still done using 387. Later version, present |
|
7696 only in Pentium4 and the future \s-1AMD\s0 x86\-64 chips supports double precision |
|
7697 arithmetics too. |
|
7698 .Sp |
|
7699 For i387 you need to use \fB\-march=\fR\fIcpu-type\fR, \fB\-msse\fR or |
|
7700 \&\fB\-msse2\fR switches to enable \s-1SSE\s0 extensions and make this option |
|
7701 effective. For x86\-64 compiler, these extensions are enabled by default. |
|
7702 .Sp |
|
7703 The resulting code should be considerably faster in the majority of cases and avoid |
|
7704 the numerical instability problems of 387 code, but may break some existing |
|
7705 code that expects temporaries to be 80bit. |
|
7706 .Sp |
|
7707 This is the default choice for the x86\-64 compiler. |
|
7708 .Ip "\fBsse,387\fR" 4 |
|
7709 .IX Item "sse,387" |
|
7710 Attempt to utilize both instruction sets at once. This effectively double the |
|
7711 amount of available registers and on chips with separate execution units for |
|
7712 387 and \s-1SSE\s0 the execution resources too. Use this option with care, as it is |
|
7713 still experimental, because the \s-1GCC\s0 register allocator does not model separate |
|
7714 functional units well resulting in instable performance. |
|
7715 .RE |
|
7716 .RS 4 |
|
7717 .RE |
|
7718 .Ip "\fB\-masm=\fR\fIdialect\fR" 4 |
|
7719 .IX Item "-masm=dialect" |
|
7720 Output asm instructions using selected \fIdialect\fR. Supported choices are |
|
7721 \&\fBintel\fR or \fBatt\fR (the default one). |
|
7722 .Ip "\fB\-mieee-fp\fR" 4 |
|
7723 .IX Item "-mieee-fp" |
|
7724 .PD 0 |
|
7725 .Ip "\fB\-mno-ieee-fp\fR" 4 |
|
7726 .IX Item "-mno-ieee-fp" |
|
7727 .PD |
|
7728 Control whether or not the compiler uses \s-1IEEE\s0 floating point |
|
7729 comparisons. These handle correctly the case where the result of a |
|
7730 comparison is unordered. |
|
7731 .Ip "\fB\-msoft-float\fR" 4 |
|
7732 .IX Item "-msoft-float" |
|
7733 Generate output containing library calls for floating point. |
|
7734 \&\fBWarning:\fR the requisite libraries are not part of \s-1GCC\s0. |
|
7735 Normally the facilities of the machine's usual C compiler are used, but |
|
7736 this can't be done directly in cross-compilation. You must make your |
|
7737 own arrangements to provide suitable library functions for |
|
7738 cross-compilation. |
|
7739 .Sp |
|
7740 On machines where a function returns floating point results in the 80387 |
|
7741 register stack, some floating point opcodes may be emitted even if |
|
7742 \&\fB\-msoft-float\fR is used. |
|
7743 .Ip "\fB\-mno-fp-ret-in-387\fR" 4 |
|
7744 .IX Item "-mno-fp-ret-in-387" |
|
7745 Do not use the \s-1FPU\s0 registers for return values of functions. |
|
7746 .Sp |
|
7747 The usual calling convention has functions return values of types |
|
7748 \&\f(CW\*(C`float\*(C'\fR and \f(CW\*(C`double\*(C'\fR in an \s-1FPU\s0 register, even if there |
|
7749 is no \s-1FPU\s0. The idea is that the operating system should emulate |
|
7750 an \s-1FPU\s0. |
|
7751 .Sp |
|
7752 The option \fB\-mno-fp-ret-in-387\fR causes such values to be returned |
|
7753 in ordinary \s-1CPU\s0 registers instead. |
|
7754 .Ip "\fB\-mno-fancy-math-387\fR" 4 |
|
7755 .IX Item "-mno-fancy-math-387" |
|
7756 Some 387 emulators do not support the \f(CW\*(C`sin\*(C'\fR, \f(CW\*(C`cos\*(C'\fR and |
|
7757 \&\f(CW\*(C`sqrt\*(C'\fR instructions for the 387. Specify this option to avoid |
|
7758 generating those instructions. This option is the default on FreeBSD, |
|
7759 OpenBSD and NetBSD. This option is overridden when \fB\-march\fR |
|
7760 indicates that the target cpu will always have an \s-1FPU\s0 and so the |
|
7761 instruction will not need emulation. As of revision 2.6.1, these |
|
7762 instructions are not generated unless you also use the |
|
7763 \&\fB\-funsafe-math-optimizations\fR switch. |
|
7764 .Ip "\fB\-malign-double\fR" 4 |
|
7765 .IX Item "-malign-double" |
|
7766 .PD 0 |
|
7767 .Ip "\fB\-mno-align-double\fR" 4 |
|
7768 .IX Item "-mno-align-double" |
|
7769 .PD |
|
7770 Control whether \s-1GCC\s0 aligns \f(CW\*(C`double\*(C'\fR, \f(CW\*(C`long double\*(C'\fR, and |
|
7771 \&\f(CW\*(C`long long\*(C'\fR variables on a two word boundary or a one word |
|
7772 boundary. Aligning \f(CW\*(C`double\*(C'\fR variables on a two word boundary will |
|
7773 produce code that runs somewhat faster on a \fBPentium\fR at the |
|
7774 expense of more memory. |
|
7775 .Sp |
|
7776 \&\fBWarning:\fR if you use the \fB\-malign-double\fR switch, |
|
7777 structures containing the above types will be aligned differently than |
|
7778 the published application binary interface specifications for the 386 |
|
7779 and will not be binary compatible with structures in code compiled |
|
7780 without that switch. |
|
7781 .Ip "\fB\-m96bit-long-double\fR" 4 |
|
7782 .IX Item "-m96bit-long-double" |
|
7783 .PD 0 |
|
7784 .Ip "\fB\-m128bit-long-double\fR" 4 |
|
7785 .IX Item "-m128bit-long-double" |
|
7786 .PD |
|
7787 These switches control the size of \f(CW\*(C`long double\*(C'\fR type. The i386 |
|
7788 application binary interface specifies the size to be 96 bits, |
|
7789 so \fB\-m96bit-long-double\fR is the default in 32 bit mode. |
|
7790 .Sp |
|
7791 Modern architectures (Pentium and newer) would prefer \f(CW\*(C`long double\*(C'\fR |
|
7792 to be aligned to an 8 or 16 byte boundary. In arrays or structures |
|
7793 conforming to the \s-1ABI\s0, this would not be possible. So specifying a |
|
7794 \&\fB\-m128bit-long-double\fR will align \f(CW\*(C`long double\*(C'\fR |
|
7795 to a 16 byte boundary by padding the \f(CW\*(C`long double\*(C'\fR with an additional |
|
7796 32 bit zero. |
|
7797 .Sp |
|
7798 In the x86\-64 compiler, \fB\-m128bit-long-double\fR is the default choice as |
|
7799 its \s-1ABI\s0 specifies that \f(CW\*(C`long double\*(C'\fR is to be aligned on 16 byte boundary. |
|
7800 .Sp |
|
7801 Notice that neither of these options enable any extra precision over the x87 |
|
7802 standard of 80 bits for a \f(CW\*(C`long double\*(C'\fR. |
|
7803 .Sp |
|
7804 \&\fBWarning:\fR if you override the default value for your target \s-1ABI\s0, the |
|
7805 structures and arrays containing \f(CW\*(C`long double\*(C'\fR variables will change |
|
7806 their size as well as function calling convention for function taking |
|
7807 \&\f(CW\*(C`long double\*(C'\fR will be modified. Hence they will not be binary |
|
7808 compatible with arrays or structures in code compiled without that switch. |
|
7809 .Ip "\fB\-msvr3\-shlib\fR" 4 |
|
7810 .IX Item "-msvr3-shlib" |
|
7811 .PD 0 |
|
7812 .Ip "\fB\-mno-svr3\-shlib\fR" 4 |
|
7813 .IX Item "-mno-svr3-shlib" |
|
7814 .PD |
|
7815 Control whether \s-1GCC\s0 places uninitialized local variables into the |
|
7816 \&\f(CW\*(C`bss\*(C'\fR or \f(CW\*(C`data\*(C'\fR segments. \fB\-msvr3\-shlib\fR places them |
|
7817 into \f(CW\*(C`bss\*(C'\fR. These options are meaningful only on System V Release 3. |
|
7818 .Ip "\fB\-mrtd\fR" 4 |
|
7819 .IX Item "-mrtd" |
|
7820 Use a different function-calling convention, in which functions that |
|
7821 take a fixed number of arguments return with the \f(CW\*(C`ret\*(C'\fR \fInum\fR |
|
7822 instruction, which pops their arguments while returning. This saves one |
|
7823 instruction in the caller since there is no need to pop the arguments |
|
7824 there. |
|
7825 .Sp |
|
7826 You can specify that an individual function is called with this calling |
|
7827 sequence with the function attribute \fBstdcall\fR. You can also |
|
7828 override the \fB\-mrtd\fR option by using the function attribute |
|
7829 \&\fBcdecl\fR. |
|
7830 .Sp |
|
7831 \&\fBWarning:\fR this calling convention is incompatible with the one |
|
7832 normally used on Unix, so you cannot use it if you need to call |
|
7833 libraries compiled with the Unix compiler. |
|
7834 .Sp |
|
7835 Also, you must provide function prototypes for all functions that |
|
7836 take variable numbers of arguments (including \f(CW\*(C`printf\*(C'\fR); |
|
7837 otherwise incorrect code will be generated for calls to those |
|
7838 functions. |
|
7839 .Sp |
|
7840 In addition, seriously incorrect code will result if you call a |
|
7841 function with too many arguments. (Normally, extra arguments are |
|
7842 harmlessly ignored.) |
|
7843 .Ip "\fB\-mregparm=\fR\fInum\fR" 4 |
|
7844 .IX Item "-mregparm=num" |
|
7845 Control how many registers are used to pass integer arguments. By |
|
7846 default, no registers are used to pass arguments, and at most 3 |
|
7847 registers can be used. You can control this behavior for a specific |
|
7848 function by using the function attribute \fBregparm\fR. |
|
7849 .Sp |
|
7850 \&\fBWarning:\fR if you use this switch, and |
|
7851 \&\fInum\fR is nonzero, then you must build all modules with the same |
|
7852 value, including any libraries. This includes the system libraries and |
|
7853 startup modules. |
|
7854 .Ip "\fB\-mpreferred-stack-boundary=\fR\fInum\fR" 4 |
|
7855 .IX Item "-mpreferred-stack-boundary=num" |
|
7856 Attempt to keep the stack boundary aligned to a 2 raised to \fInum\fR |
|
7857 byte boundary. If \fB\-mpreferred-stack-boundary\fR is not specified, |
|
7858 the default is 4 (16 bytes or 128 bits), except when optimizing for code |
|
7859 size (\fB\-Os\fR), in which case the default is the minimum correct |
|
7860 alignment (4 bytes for x86, and 8 bytes for x86\-64). |
|
7861 .Sp |
|
7862 On Pentium and PentiumPro, \f(CW\*(C`double\*(C'\fR and \f(CW\*(C`long double\*(C'\fR values |
|
7863 should be aligned to an 8 byte boundary (see \fB\-malign-double\fR) or |
|
7864 suffer significant run time performance penalties. On Pentium \s-1III\s0, the |
|
7865 Streaming \s-1SIMD\s0 Extension (\s-1SSE\s0) data type \f(CW\*(C`_\|_m128\*(C'\fR suffers similar |
|
7866 penalties if it is not 16 byte aligned. |
|
7867 .Sp |
|
7868 To ensure proper alignment of this values on the stack, the stack boundary |
|
7869 must be as aligned as that required by any value stored on the stack. |
|
7870 Further, every function must be generated such that it keeps the stack |
|
7871 aligned. Thus calling a function compiled with a higher preferred |
|
7872 stack boundary from a function compiled with a lower preferred stack |
|
7873 boundary will most likely misalign the stack. It is recommended that |
|
7874 libraries that use callbacks always use the default setting. |
|
7875 .Sp |
|
7876 This extra alignment does consume extra stack space, and generally |
|
7877 increases code size. Code that is sensitive to stack space usage, such |
|
7878 as embedded systems and operating system kernels, may want to reduce the |
|
7879 preferred alignment to \fB\-mpreferred-stack-boundary=2\fR. |
|
7880 .Ip "\fB\-mmmx\fR" 4 |
|
7881 .IX Item "-mmmx" |
|
7882 .PD 0 |
|
7883 .Ip "\fB\-mno-mmx\fR" 4 |
|
7884 .IX Item "-mno-mmx" |
|
7885 .Ip "\fB\-msse\fR" 4 |
|
7886 .IX Item "-msse" |
|
7887 .Ip "\fB\-mno-sse\fR" 4 |
|
7888 .IX Item "-mno-sse" |
|
7889 .Ip "\fB\-msse2\fR" 4 |
|
7890 .IX Item "-msse2" |
|
7891 .Ip "\fB\-mno-sse2\fR" 4 |
|
7892 .IX Item "-mno-sse2" |
|
7893 .Ip "\fB\-msse3\fR" 4 |
|
7894 .IX Item "-msse3" |
|
7895 .Ip "\fB\-mno-sse3\fR" 4 |
|
7896 .IX Item "-mno-sse3" |
|
7897 .Ip "\fB\-m3dnow\fR" 4 |
|
7898 .IX Item "-m3dnow" |
|
7899 .Ip "\fB\-mno-3dnow\fR" 4 |
|
7900 .IX Item "-mno-3dnow" |
|
7901 .PD |
|
7902 These switches enable or disable the use of built-in functions that allow |
|
7903 direct access to the \s-1MMX\s0, \s-1SSE\s0, \s-1SSE2\s0, \s-1SSE3\s0 and 3Dnow extensions of the |
|
7904 instruction set. |
|
7905 .Sp |
|
7906 To have \s-1SSE/SSE2\s0 instructions generated automatically from floating-point |
|
7907 code, see \fB\-mfpmath=sse\fR. |
|
7908 .Ip "\fB\-mpush-args\fR" 4 |
|
7909 .IX Item "-mpush-args" |
|
7910 .PD 0 |
|
7911 .Ip "\fB\-mno-push-args\fR" 4 |
|
7912 .IX Item "-mno-push-args" |
|
7913 .PD |
|
7914 Use \s-1PUSH\s0 operations to store outgoing parameters. This method is shorter |
|
7915 and usually equally fast as method using \s-1SUB/MOV\s0 operations and is enabled |
|
7916 by default. In some cases disabling it may improve performance because of |
|
7917 improved scheduling and reduced dependencies. |
|
7918 .Ip "\fB\-maccumulate-outgoing-args\fR" 4 |
|
7919 .IX Item "-maccumulate-outgoing-args" |
|
7920 If enabled, the maximum amount of space required for outgoing arguments will be |
|
7921 computed in the function prologue. This is faster on most modern CPUs |
|
7922 because of reduced dependencies, improved scheduling and reduced stack usage |
|
7923 when preferred stack boundary is not equal to 2. The drawback is a notable |
|
7924 increase in code size. This switch implies \fB\-mno-push-args\fR. |
|
7925 .Ip "\fB\-mthreads\fR" 4 |
|
7926 .IX Item "-mthreads" |
|
7927 Support thread-safe exception handling on \fBMingw32\fR. Code that relies |
|
7928 on thread-safe exception handling must compile and link all code with the |
|
7929 \&\fB\-mthreads\fR option. When compiling, \fB\-mthreads\fR defines |
|
7930 \&\fB\-D_MT\fR; when linking, it links in a special thread helper library |
|
7931 \&\fB\-lmingwthrd\fR which cleans up per thread exception handling data. |
|
7932 .Ip "\fB\-mno-align-stringops\fR" 4 |
|
7933 .IX Item "-mno-align-stringops" |
|
7934 Do not align destination of inlined string operations. This switch reduces |
|
7935 code size and improves performance in case the destination is already aligned, |
|
7936 but \s-1GCC\s0 doesn't know about it. |
|
7937 .Ip "\fB\-minline-all-stringops\fR" 4 |
|
7938 .IX Item "-minline-all-stringops" |
|
7939 By default \s-1GCC\s0 inlines string operations only when destination is known to be |
|
7940 aligned at least to 4 byte boundary. This enables more inlining, increase code |
|
7941 size, but may improve performance of code that depends on fast memcpy, strlen |
|
7942 and memset for short lengths. |
|
7943 .Ip "\fB\-momit-leaf-frame-pointer\fR" 4 |
|
7944 .IX Item "-momit-leaf-frame-pointer" |
|
7945 Don't keep the frame pointer in a register for leaf functions. This |
|
7946 avoids the instructions to save, set up and restore frame pointers and |
|
7947 makes an extra register available in leaf functions. The option |
|
7948 \&\fB\-fomit-frame-pointer\fR removes the frame pointer for all functions |
|
7949 which might make debugging harder. |
|
7950 .Ip "\fB\-mtls-direct-seg-refs\fR" 4 |
|
7951 .IX Item "-mtls-direct-seg-refs" |
|
7952 .PD 0 |
|
7953 .Ip "\fB\-mno-tls-direct-seg-refs\fR" 4 |
|
7954 .IX Item "-mno-tls-direct-seg-refs" |
|
7955 .PD |
|
7956 Controls whether \s-1TLS\s0 variables may be accessed with offsets from the |
|
7957 \&\s-1TLS\s0 segment register (\f(CW\*(C`%gs\*(C'\fR for 32\-bit, \f(CW\*(C`%fs\*(C'\fR for 64\-bit), |
|
7958 or whether the thread base pointer must be added. Whether or not this |
|
7959 is legal depends on the operating system, and whether it maps the |
|
7960 segment to cover the entire \s-1TLS\s0 area. |
|
7961 .Sp |
|
7962 For systems that use \s-1GNU\s0 libc, the default is on. |
|
7963 .PP |
|
7964 These \fB\-m\fR switches are supported in addition to the above |
|
7965 on \s-1AMD\s0 x86\-64 processors in 64\-bit environments. |
|
7966 .Ip "\fB\-m32\fR" 4 |
|
7967 .IX Item "-m32" |
|
7968 .PD 0 |
|
7969 .Ip "\fB\-m64\fR" 4 |
|
7970 .IX Item "-m64" |
|
7971 .PD |
|
7972 Generate code for a 32\-bit or 64\-bit environment. |
|
7973 The 32\-bit environment sets int, long and pointer to 32 bits and |
|
7974 generates code that runs on any i386 system. |
|
7975 The 64\-bit environment sets int to 32 bits and long and pointer |
|
7976 to 64 bits and generates code for \s-1AMD\s0's x86\-64 architecture. |
|
7977 .Ip "\fB\-mno-red-zone\fR" 4 |
|
7978 .IX Item "-mno-red-zone" |
|
7979 Do not use a so called red zone for x86\-64 code. The red zone is mandated |
|
7980 by the x86\-64 \s-1ABI\s0, it is a 128\-byte area beyond the location of the |
|
7981 stack pointer that will not be modified by signal or interrupt handlers |
|
7982 and therefore can be used for temporary data without adjusting the stack |
|
7983 pointer. The flag \fB\-mno-red-zone\fR disables this red zone. |
|
7984 .Ip "\fB\-mcmodel=small\fR" 4 |
|
7985 .IX Item "-mcmodel=small" |
|
7986 Generate code for the small code model: the program and its symbols must |
|
7987 be linked in the lower 2 \s-1GB\s0 of the address space. Pointers are 64 bits. |
|
7988 Programs can be statically or dynamically linked. This is the default |
|
7989 code model. |
|
7990 .Ip "\fB\-mcmodel=kernel\fR" 4 |
|
7991 .IX Item "-mcmodel=kernel" |
|
7992 Generate code for the kernel code model. The kernel runs in the |
|
7993 negative 2 \s-1GB\s0 of the address space. |
|
7994 This model has to be used for Linux kernel code. |
|
7995 .Ip "\fB\-mcmodel=medium\fR" 4 |
|
7996 .IX Item "-mcmodel=medium" |
|
7997 Generate code for the medium model: The program is linked in the lower 2 |
|
7998 \&\s-1GB\s0 of the address space but symbols can be located anywhere in the |
|
7999 address space. Programs can be statically or dynamically linked, but |
|
8000 building of shared libraries are not supported with the medium model. |
|
8001 .Ip "\fB\-mcmodel=large\fR" 4 |
|
8002 .IX Item "-mcmodel=large" |
|
8003 Generate code for the large model: This model makes no assumptions |
|
8004 about addresses and sizes of sections. Currently \s-1GCC\s0 does not implement |
|
8005 this model. |
|
8006 .Ip "\fB\-mstack-arg-probe\fR" 4 |
|
8007 .IX Item "-mstack-arg-probe" |
|
8008 Emit code in function prologue to probe the stack when allocating more |
|
8009 than \s-1CHECK_STACK_LIMIT\s0 bytes in one go. |
|
8010 .Sp |
|
8011 Currently, this is the default on windows systems (cygwin and mingw32), |
|
8012 which define \s-1CHECK_STACK_LIMIT\s0 as 4000. On these systems, touching the |
|
8013 stack at 4K increments is necessary to ensure that the guard pages used |
|
8014 by the \s-1OS\s0 virtual memory manger are allocated in correct sequence. |
|
8015 .PP |
|
8016 .I "\s-1HPPA\s0 Options" |
|
8017 .IX Subsection "HPPA Options" |
|
8018 .PP |
|
8019 These \fB\-m\fR options are defined for the \s-1HPPA\s0 family of computers: |
|
8020 .Ip "\fB\-march=\fR\fIarchitecture-type\fR" 4 |
|
8021 .IX Item "-march=architecture-type" |
|
8022 Generate code for the specified architecture. The choices for |
|
8023 \&\fIarchitecture-type\fR are \fB1.0\fR for \s-1PA\s0 1.0, \fB1.1\fR for \s-1PA\s0 |
|
8024 1.1, and \fB2.0\fR for \s-1PA\s0 2.0 processors. Refer to |
|
8025 \&\fI/usr/lib/sched.models\fR on an \s-1HP-UX\s0 system to determine the proper |
|
8026 architecture option for your machine. Code compiled for lower numbered |
|
8027 architectures will run on higher numbered architectures, but not the |
|
8028 other way around. |
|
8029 .Sp |
|
8030 \&\s-1PA\s0 2.0 support currently requires gas snapshot 19990413 or later. The |
|
8031 next release of binutils (current is 2.9.1) will probably contain \s-1PA\s0 2.0 |
|
8032 support. |
|
8033 .Ip "\fB\-mpa-risc-1\-0\fR" 4 |
|
8034 .IX Item "-mpa-risc-1-0" |
|
8035 .PD 0 |
|
8036 .Ip "\fB\-mpa-risc-1\-1\fR" 4 |
|
8037 .IX Item "-mpa-risc-1-1" |
|
8038 .Ip "\fB\-mpa-risc-2\-0\fR" 4 |
|
8039 .IX Item "-mpa-risc-2-0" |
|
8040 .PD |
|
8041 Synonyms for \fB\-march=1.0\fR, \fB\-march=1.1\fR, and \fB\-march=2.0\fR respectively. |
|
8042 .Ip "\fB\-mbig-switch\fR" 4 |
|
8043 .IX Item "-mbig-switch" |
|
8044 Generate code suitable for big switch tables. Use this option only if |
|
8045 the assembler/linker complain about out of range branches within a switch |
|
8046 table. |
|
8047 .Ip "\fB\-mjump-in-delay\fR" 4 |
|
8048 .IX Item "-mjump-in-delay" |
|
8049 Fill delay slots of function calls with unconditional jump instructions |
|
8050 by modifying the return pointer for the function call to be the target |
|
8051 of the conditional jump. |
|
8052 .Ip "\fB\-mdisable-fpregs\fR" 4 |
|
8053 .IX Item "-mdisable-fpregs" |
|
8054 Prevent floating point registers from being used in any manner. This is |
|
8055 necessary for compiling kernels which perform lazy context switching of |
|
8056 floating point registers. If you use this option and attempt to perform |
|
8057 floating point operations, the compiler will abort. |
|
8058 .Ip "\fB\-mdisable-indexing\fR" 4 |
|
8059 .IX Item "-mdisable-indexing" |
|
8060 Prevent the compiler from using indexing address modes. This avoids some |
|
8061 rather obscure problems when compiling \s-1MIG\s0 generated code under \s-1MACH\s0. |
|
8062 .Ip "\fB\-mno-space-regs\fR" 4 |
|
8063 .IX Item "-mno-space-regs" |
|
8064 Generate code that assumes the target has no space registers. This allows |
|
8065 \&\s-1GCC\s0 to generate faster indirect calls and use unscaled index address modes. |
|
8066 .Sp |
|
8067 Such code is suitable for level 0 \s-1PA\s0 systems and kernels. |
|
8068 .Ip "\fB\-mfast-indirect-calls\fR" 4 |
|
8069 .IX Item "-mfast-indirect-calls" |
|
8070 Generate code that assumes calls never cross space boundaries. This |
|
8071 allows \s-1GCC\s0 to emit code which performs faster indirect calls. |
|
8072 .Sp |
|
8073 This option will not work in the presence of shared libraries or nested |
|
8074 functions. |
|
8075 .Ip "\fB\-mlong-load-store\fR" 4 |
|
8076 .IX Item "-mlong-load-store" |
|
8077 Generate 3\-instruction load and store sequences as sometimes required by |
|
8078 the \s-1HP-UX\s0 10 linker. This is equivalent to the \fB+k\fR option to |
|
8079 the \s-1HP\s0 compilers. |
|
8080 .Ip "\fB\-mportable-runtime\fR" 4 |
|
8081 .IX Item "-mportable-runtime" |
|
8082 Use the portable calling conventions proposed by \s-1HP\s0 for \s-1ELF\s0 systems. |
|
8083 .Ip "\fB\-mgas\fR" 4 |
|
8084 .IX Item "-mgas" |
|
8085 Enable the use of assembler directives only \s-1GAS\s0 understands. |
|
8086 .Ip "\fB\-mschedule=\fR\fIcpu-type\fR" 4 |
|
8087 .IX Item "-mschedule=cpu-type" |
|
8088 Schedule code according to the constraints for the machine type |
|
8089 \&\fIcpu-type\fR. The choices for \fIcpu-type\fR are \fB700\fR |
|
8090 \&\fB7100\fR, \fB7100LC\fR, \fB7200\fR, \fB7300\fR and \fB8000\fR. Refer |
|
8091 to \fI/usr/lib/sched.models\fR on an \s-1HP-UX\s0 system to determine the |
|
8092 proper scheduling option for your machine. The default scheduling is |
|
8093 \&\fB8000\fR. |
|
8094 .Ip "\fB\-mlinker-opt\fR" 4 |
|
8095 .IX Item "-mlinker-opt" |
|
8096 Enable the optimization pass in the \s-1HP-UX\s0 linker. Note this makes symbolic |
|
8097 debugging impossible. It also triggers a bug in the \s-1HP-UX\s0 8 and \s-1HP-UX\s0 9 |
|
8098 linkers in which they give bogus error messages when linking some programs. |
|
8099 .Ip "\fB\-msoft-float\fR" 4 |
|
8100 .IX Item "-msoft-float" |
|
8101 Generate output containing library calls for floating point. |
|
8102 \&\fBWarning:\fR the requisite libraries are not available for all \s-1HPPA\s0 |
|
8103 targets. Normally the facilities of the machine's usual C compiler are |
|
8104 used, but this cannot be done directly in cross-compilation. You must make |
|
8105 your own arrangements to provide suitable library functions for |
|
8106 cross-compilation. The embedded target \fBhppa1.1\-*\-pro\fR |
|
8107 does provide software floating point support. |
|
8108 .Sp |
|
8109 \&\fB\-msoft-float\fR changes the calling convention in the output file; |
|
8110 therefore, it is only useful if you compile \fIall\fR of a program with |
|
8111 this option. In particular, you need to compile \fIlibgcc.a\fR, the |
|
8112 library that comes with \s-1GCC\s0, with \fB\-msoft-float\fR in order for |
|
8113 this to work. |
|
8114 .Ip "\fB\-msio\fR" 4 |
|
8115 .IX Item "-msio" |
|
8116 Generate the predefine, \f(CW\*(C`_SIO\*(C'\fR, for server \s-1IO\s0. The default is |
|
8117 \&\fB\-mwsio\fR. This generates the predefines, \f(CW\*(C`_\|_hp9000s700\*(C'\fR, |
|
8118 \&\f(CW\*(C`_\|_hp9000s700_\|_\*(C'\fR and \f(CW\*(C`_WSIO\*(C'\fR, for workstation \s-1IO\s0. These |
|
8119 options are available under \s-1HP-UX\s0 and \s-1HI-UX\s0. |
|
8120 .Ip "\fB\-mgnu-ld\fR" 4 |
|
8121 .IX Item "-mgnu-ld" |
|
8122 Use \s-1GNU\s0 ld specific options. This passes \fB\-shared\fR to ld when |
|
8123 building a shared library. It is the default when \s-1GCC\s0 is configured, |
|
8124 explicitly or implicitly, with the \s-1GNU\s0 linker. This option does not |
|
8125 have any affect on which ld is called, it only changes what parameters |
|
8126 are passed to that ld. The ld that is called is determined by the |
|
8127 \&\fB\*(--with-ld\fR configure option, \s-1GCC\s0's program search path, and |
|
8128 finally by the user's \fB\s-1PATH\s0\fR. The linker used by \s-1GCC\s0 can be printed |
|
8129 using \fBwhich `gcc \-print-prog-name=ld`\fR. This option is only available |
|
8130 on the 64 bit \s-1HP-UX\s0 \s-1GCC\s0, i.e. configured with \fBhppa*64*\-*\-hpux*\fR. |
|
8131 .Ip "\fB\-mhp-ld\fR" 4 |
|
8132 .IX Item "-mhp-ld" |
|
8133 Use \s-1HP\s0 ld specific options. This passes \fB\-b\fR to ld when building |
|
8134 a shared library and passes \fB+Accept TypeMismatch\fR to ld on all |
|
8135 links. It is the default when \s-1GCC\s0 is configured, explicitly or |
|
8136 implicitly, with the \s-1HP\s0 linker. This option does not have any affect on |
|
8137 which ld is called, it only changes what parameters are passed to that |
|
8138 ld. The ld that is called is determined by the \fB\*(--with-ld\fR |
|
8139 configure option, \s-1GCC\s0's program search path, and finally by the user's |
|
8140 \&\fB\s-1PATH\s0\fR. The linker used by \s-1GCC\s0 can be printed using \fBwhich |
|
8141 `gcc \-print-prog-name=ld`\fR. This option is only available on the 64 bit |
|
8142 \&\s-1HP-UX\s0 \s-1GCC\s0, i.e. configured with \fBhppa*64*\-*\-hpux*\fR. |
|
8143 .Ip "\fB\-mlong-calls\fR" 4 |
|
8144 .IX Item "-mlong-calls" |
|
8145 Generate code that uses long call sequences. This ensures that a call |
|
8146 is always able to reach linker generated stubs. The default is to generate |
|
8147 long calls only when the distance from the call site to the beginning |
|
8148 of the function or translation unit, as the case may be, exceeds a |
|
8149 predefined limit set by the branch type being used. The limits for |
|
8150 normal calls are 7,600,000 and 240,000 bytes, respectively for the |
|
8151 \&\s-1PA\s0 2.0 and \s-1PA\s0 1.X architectures. Sibcalls are always limited at |
|
8152 240,000 bytes. |
|
8153 .Sp |
|
8154 Distances are measured from the beginning of functions when using the |
|
8155 \&\fB\-ffunction-sections\fR option, or when using the \fB\-mgas\fR |
|
8156 and \fB\-mno-portable-runtime\fR options together under \s-1HP-UX\s0 with |
|
8157 the \s-1SOM\s0 linker. |
|
8158 .Sp |
|
8159 It is normally not desirable to use this option as it will degrade |
|
8160 performance. However, it may be useful in large applications, |
|
8161 particularly when partial linking is used to build the application. |
|
8162 .Sp |
|
8163 The types of long calls used depends on the capabilities of the |
|
8164 assembler and linker, and the type of code being generated. The |
|
8165 impact on systems that support long absolute calls, and long pic |
|
8166 symbol-difference or pc-relative calls should be relatively small. |
|
8167 However, an indirect call is used on 32\-bit \s-1ELF\s0 systems in pic code |
|
8168 and it is quite long. |
|
8169 .Ip "\fB\-nolibdld\fR" 4 |
|
8170 .IX Item "-nolibdld" |
|
8171 Suppress the generation of link options to search libdld.sl when the |
|
8172 \&\fB\-static\fR option is specified on \s-1HP-UX\s0 10 and later. |
|
8173 .Ip "\fB\-static\fR" 4 |
|
8174 .IX Item "-static" |
|
8175 The \s-1HP-UX\s0 implementation of setlocale in libc has a dependency on |
|
8176 libdld.sl. There isn't an archive version of libdld.sl. Thus, |
|
8177 when the \fB\-static\fR option is specified, special link options |
|
8178 are needed to resolve this dependency. |
|
8179 .Sp |
|
8180 On \s-1HP-UX\s0 10 and later, the \s-1GCC\s0 driver adds the necessary options to |
|
8181 link with libdld.sl when the \fB\-static\fR option is specified. |
|
8182 This causes the resulting binary to be dynamic. On the 64\-bit port, |
|
8183 the linkers generate dynamic binaries by default in any case. The |
|
8184 \&\fB\-nolibdld\fR option can be used to prevent the \s-1GCC\s0 driver from |
|
8185 adding these link options. |
|
8186 .Ip "\fB\-threads\fR" 4 |
|
8187 .IX Item "-threads" |
|
8188 Add support for multithreading with the \fIdce thread\fR library |
|
8189 under \s-1HP-UX\s0. This option sets flags for both the preprocessor and |
|
8190 linker. |
|
8191 .PP |
|
8192 .I "Intel 960 Options" |
|
8193 .IX Subsection "Intel 960 Options" |
|
8194 .PP |
|
8195 These \fB\-m\fR options are defined for the Intel 960 implementations: |
|
8196 .Ip "\fB\-m\fR\fIcpu-type\fR" 4 |
|
8197 .IX Item "-mcpu-type" |
|
8198 Assume the defaults for the machine type \fIcpu-type\fR for some of |
|
8199 the other options, including instruction scheduling, floating point |
|
8200 support, and addressing modes. The choices for \fIcpu-type\fR are |
|
8201 \&\fBka\fR, \fBkb\fR, \fBmc\fR, \fBca\fR, \fBcf\fR, |
|
8202 \&\fBsa\fR, and \fBsb\fR. |
|
8203 The default is |
|
8204 \&\fBkb\fR. |
|
8205 .Ip "\fB\-mnumerics\fR" 4 |
|
8206 .IX Item "-mnumerics" |
|
8207 .PD 0 |
|
8208 .Ip "\fB\-msoft-float\fR" 4 |
|
8209 .IX Item "-msoft-float" |
|
8210 .PD |
|
8211 The \fB\-mnumerics\fR option indicates that the processor does support |
|
8212 floating-point instructions. The \fB\-msoft-float\fR option indicates |
|
8213 that floating-point support should not be assumed. |
|
8214 .Ip "\fB\-mleaf-procedures\fR" 4 |
|
8215 .IX Item "-mleaf-procedures" |
|
8216 .PD 0 |
|
8217 .Ip "\fB\-mno-leaf-procedures\fR" 4 |
|
8218 .IX Item "-mno-leaf-procedures" |
|
8219 .PD |
|
8220 Do (or do not) attempt to alter leaf procedures to be callable with the |
|
8221 \&\f(CW\*(C`bal\*(C'\fR instruction as well as \f(CW\*(C`call\*(C'\fR. This will result in more |
|
8222 efficient code for explicit calls when the \f(CW\*(C`bal\*(C'\fR instruction can be |
|
8223 substituted by the assembler or linker, but less efficient code in other |
|
8224 cases, such as calls via function pointers, or using a linker that doesn't |
|
8225 support this optimization. |
|
8226 .Ip "\fB\-mtail-call\fR" 4 |
|
8227 .IX Item "-mtail-call" |
|
8228 .PD 0 |
|
8229 .Ip "\fB\-mno-tail-call\fR" 4 |
|
8230 .IX Item "-mno-tail-call" |
|
8231 .PD |
|
8232 Do (or do not) make additional attempts (beyond those of the |
|
8233 machine-independent portions of the compiler) to optimize tail-recursive |
|
8234 calls into branches. You may not want to do this because the detection of |
|
8235 cases where this is not valid is not totally complete. The default is |
|
8236 \&\fB\-mno-tail-call\fR. |
|
8237 .Ip "\fB\-mcomplex-addr\fR" 4 |
|
8238 .IX Item "-mcomplex-addr" |
|
8239 .PD 0 |
|
8240 .Ip "\fB\-mno-complex-addr\fR" 4 |
|
8241 .IX Item "-mno-complex-addr" |
|
8242 .PD |
|
8243 Assume (or do not assume) that the use of a complex addressing mode is a |
|
8244 win on this implementation of the i960. Complex addressing modes may not |
|
8245 be worthwhile on the K-series, but they definitely are on the C-series. |
|
8246 The default is currently \fB\-mcomplex-addr\fR for all processors except |
|
8247 the \s-1CB\s0 and \s-1CC\s0. |
|
8248 .Ip "\fB\-mcode-align\fR" 4 |
|
8249 .IX Item "-mcode-align" |
|
8250 .PD 0 |
|
8251 .Ip "\fB\-mno-code-align\fR" 4 |
|
8252 .IX Item "-mno-code-align" |
|
8253 .PD |
|
8254 Align code to 8\-byte boundaries for faster fetching (or don't bother). |
|
8255 Currently turned on by default for C-series implementations only. |
|
8256 .Ip "\fB\-mic-compat\fR" 4 |
|
8257 .IX Item "-mic-compat" |
|
8258 .PD 0 |
|
8259 .Ip "\fB\-mic2.0\-compat\fR" 4 |
|
8260 .IX Item "-mic2.0-compat" |
|
8261 .Ip "\fB\-mic3.0\-compat\fR" 4 |
|
8262 .IX Item "-mic3.0-compat" |
|
8263 .PD |
|
8264 Enable compatibility with iC960 v2.0 or v3.0. |
|
8265 .Ip "\fB\-masm-compat\fR" 4 |
|
8266 .IX Item "-masm-compat" |
|
8267 .PD 0 |
|
8268 .Ip "\fB\-mintel-asm\fR" 4 |
|
8269 .IX Item "-mintel-asm" |
|
8270 .PD |
|
8271 Enable compatibility with the iC960 assembler. |
|
8272 .Ip "\fB\-mstrict-align\fR" 4 |
|
8273 .IX Item "-mstrict-align" |
|
8274 .PD 0 |
|
8275 .Ip "\fB\-mno-strict-align\fR" 4 |
|
8276 .IX Item "-mno-strict-align" |
|
8277 .PD |
|
8278 Do not permit (do permit) unaligned accesses. |
|
8279 .Ip "\fB\-mold-align\fR" 4 |
|
8280 .IX Item "-mold-align" |
|
8281 Enable structure-alignment compatibility with Intel's gcc release version |
|
8282 1.3 (based on gcc 1.37). This option implies \fB\-mstrict-align\fR. |
|
8283 .Ip "\fB\-mlong-double-64\fR" 4 |
|
8284 .IX Item "-mlong-double-64" |
|
8285 Implement type \fBlong double\fR as 64\-bit floating point numbers. |
|
8286 Without the option \fBlong double\fR is implemented by 80\-bit |
|
8287 floating point numbers. The only reason we have it because there is |
|
8288 no 128\-bit \fBlong double\fR support in \fBfp-bit.c\fR yet. So it |
|
8289 is only useful for people using soft-float targets. Otherwise, we |
|
8290 should recommend against use of it. |
|
8291 .PP |
|
8292 .I "\s-1DEC\s0 Alpha Options" |
|
8293 .IX Subsection "DEC Alpha Options" |
|
8294 .PP |
|
8295 These \fB\-m\fR options are defined for the \s-1DEC\s0 Alpha implementations: |
|
8296 .Ip "\fB\-mno-soft-float\fR" 4 |
|
8297 .IX Item "-mno-soft-float" |
|
8298 .PD 0 |
|
8299 .Ip "\fB\-msoft-float\fR" 4 |
|
8300 .IX Item "-msoft-float" |
|
8301 .PD |
|
8302 Use (do not use) the hardware floating-point instructions for |
|
8303 floating-point operations. When \fB\-msoft-float\fR is specified, |
|
8304 functions in \fIlibgcc.a\fR will be used to perform floating-point |
|
8305 operations. Unless they are replaced by routines that emulate the |
|
8306 floating-point operations, or compiled in such a way as to call such |
|
8307 emulations routines, these routines will issue floating-point |
|
8308 operations. If you are compiling for an Alpha without floating-point |
|
8309 operations, you must ensure that the library is built so as not to call |
|
8310 them. |
|
8311 .Sp |
|
8312 Note that Alpha implementations without floating-point operations are |
|
8313 required to have floating-point registers. |
|
8314 .Ip "\fB\-mfp-reg\fR" 4 |
|
8315 .IX Item "-mfp-reg" |
|
8316 .PD 0 |
|
8317 .Ip "\fB\-mno-fp-regs\fR" 4 |
|
8318 .IX Item "-mno-fp-regs" |
|
8319 .PD |
|
8320 Generate code that uses (does not use) the floating-point register set. |
|
8321 \&\fB\-mno-fp-regs\fR implies \fB\-msoft-float\fR. If the floating-point |
|
8322 register set is not used, floating point operands are passed in integer |
|
8323 registers as if they were integers and floating-point results are passed |
|
8324 in \f(CW\*(C`$0\*(C'\fR instead of \f(CW\*(C`$f0\*(C'\fR. This is a non-standard calling sequence, |
|
8325 so any function with a floating-point argument or return value called by code |
|
8326 compiled with \fB\-mno-fp-regs\fR must also be compiled with that |
|
8327 option. |
|
8328 .Sp |
|
8329 A typical use of this option is building a kernel that does not use, |
|
8330 and hence need not save and restore, any floating-point registers. |
|
8331 .Ip "\fB\-mieee\fR" 4 |
|
8332 .IX Item "-mieee" |
|
8333 The Alpha architecture implements floating-point hardware optimized for |
|
8334 maximum performance. It is mostly compliant with the \s-1IEEE\s0 floating |
|
8335 point standard. However, for full compliance, software assistance is |
|
8336 required. This option generates code fully \s-1IEEE\s0 compliant code |
|
8337 \&\fIexcept\fR that the \fIinexact-flag\fR is not maintained (see below). |
|
8338 If this option is turned on, the preprocessor macro \f(CW\*(C`_IEEE_FP\*(C'\fR is |
|
8339 defined during compilation. The resulting code is less efficient but is |
|
8340 able to correctly support denormalized numbers and exceptional \s-1IEEE\s0 |
|
8341 values such as not-a-number and plus/minus infinity. Other Alpha |
|
8342 compilers call this option \fB\-ieee_with_no_inexact\fR. |
|
8343 .Ip "\fB\-mieee-with-inexact\fR" 4 |
|
8344 .IX Item "-mieee-with-inexact" |
|
8345 This is like \fB\-mieee\fR except the generated code also maintains |
|
8346 the \s-1IEEE\s0 \fIinexact-flag\fR. Turning on this option causes the |
|
8347 generated code to implement fully-compliant \s-1IEEE\s0 math. In addition to |
|
8348 \&\f(CW\*(C`_IEEE_FP\*(C'\fR, \f(CW\*(C`_IEEE_FP_EXACT\*(C'\fR is defined as a preprocessor |
|
8349 macro. On some Alpha implementations the resulting code may execute |
|
8350 significantly slower than the code generated by default. Since there is |
|
8351 very little code that depends on the \fIinexact-flag\fR, you should |
|
8352 normally not specify this option. Other Alpha compilers call this |
|
8353 option \fB\-ieee_with_inexact\fR. |
|
8354 .Ip "\fB\-mfp-trap-mode=\fR\fItrap-mode\fR" 4 |
|
8355 .IX Item "-mfp-trap-mode=trap-mode" |
|
8356 This option controls what floating-point related traps are enabled. |
|
8357 Other Alpha compilers call this option \fB\-fptm\fR \fItrap-mode\fR. |
|
8358 The trap mode can be set to one of four values: |
|
8359 .RS 4 |
|
8360 .Ip "\fBn\fR" 4 |
|
8361 .IX Item "n" |
|
8362 This is the default (normal) setting. The only traps that are enabled |
|
8363 are the ones that cannot be disabled in software (e.g., division by zero |
|
8364 trap). |
|
8365 .Ip "\fBu\fR" 4 |
|
8366 .IX Item "u" |
|
8367 In addition to the traps enabled by \fBn\fR, underflow traps are enabled |
|
8368 as well. |
|
8369 .Ip "\fBsu\fR" 4 |
|
8370 .IX Item "su" |
|
8371 Like \fBsu\fR, but the instructions are marked to be safe for software |
|
8372 completion (see Alpha architecture manual for details). |
|
8373 .Ip "\fBsui\fR" 4 |
|
8374 .IX Item "sui" |
|
8375 Like \fBsu\fR, but inexact traps are enabled as well. |
|
8376 .RE |
|
8377 .RS 4 |
|
8378 .RE |
|
8379 .Ip "\fB\-mfp-rounding-mode=\fR\fIrounding-mode\fR" 4 |
|
8380 .IX Item "-mfp-rounding-mode=rounding-mode" |
|
8381 Selects the \s-1IEEE\s0 rounding mode. Other Alpha compilers call this option |
|
8382 \&\fB\-fprm\fR \fIrounding-mode\fR. The \fIrounding-mode\fR can be one |
|
8383 of: |
|
8384 .RS 4 |
|
8385 .Ip "\fBn\fR" 4 |
|
8386 .IX Item "n" |
|
8387 Normal \s-1IEEE\s0 rounding mode. Floating point numbers are rounded towards |
|
8388 the nearest machine number or towards the even machine number in case |
|
8389 of a tie. |
|
8390 .Ip "\fBm\fR" 4 |
|
8391 .IX Item "m" |
|
8392 Round towards minus infinity. |
|
8393 .Ip "\fBc\fR" 4 |
|
8394 .IX Item "c" |
|
8395 Chopped rounding mode. Floating point numbers are rounded towards zero. |
|
8396 .Ip "\fBd\fR" 4 |
|
8397 .IX Item "d" |
|
8398 Dynamic rounding mode. A field in the floating point control register |
|
8399 (\fIfpcr\fR, see Alpha architecture reference manual) controls the |
|
8400 rounding mode in effect. The C library initializes this register for |
|
8401 rounding towards plus infinity. Thus, unless your program modifies the |
|
8402 \&\fIfpcr\fR, \fBd\fR corresponds to round towards plus infinity. |
|
8403 .RE |
|
8404 .RS 4 |
|
8405 .RE |
|
8406 .Ip "\fB\-mtrap-precision=\fR\fItrap-precision\fR" 4 |
|
8407 .IX Item "-mtrap-precision=trap-precision" |
|
8408 In the Alpha architecture, floating point traps are imprecise. This |
|
8409 means without software assistance it is impossible to recover from a |
|
8410 floating trap and program execution normally needs to be terminated. |
|
8411 \&\s-1GCC\s0 can generate code that can assist operating system trap handlers |
|
8412 in determining the exact location that caused a floating point trap. |
|
8413 Depending on the requirements of an application, different levels of |
|
8414 precisions can be selected: |
|
8415 .RS 4 |
|
8416 .Ip "\fBp\fR" 4 |
|
8417 .IX Item "p" |
|
8418 Program precision. This option is the default and means a trap handler |
|
8419 can only identify which program caused a floating point exception. |
|
8420 .Ip "\fBf\fR" 4 |
|
8421 .IX Item "f" |
|
8422 Function precision. The trap handler can determine the function that |
|
8423 caused a floating point exception. |
|
8424 .Ip "\fBi\fR" 4 |
|
8425 .IX Item "i" |
|
8426 Instruction precision. The trap handler can determine the exact |
|
8427 instruction that caused a floating point exception. |
|
8428 .RE |
|
8429 .RS 4 |
|
8430 .Sp |
|
8431 Other Alpha compilers provide the equivalent options called |
|
8432 \&\fB\-scope_safe\fR and \fB\-resumption_safe\fR. |
|
8433 .RE |
|
8434 .Ip "\fB\-mieee-conformant\fR" 4 |
|
8435 .IX Item "-mieee-conformant" |
|
8436 This option marks the generated code as \s-1IEEE\s0 conformant. You must not |
|
8437 use this option unless you also specify \fB\-mtrap-precision=i\fR and either |
|
8438 \&\fB\-mfp-trap-mode=su\fR or \fB\-mfp-trap-mode=sui\fR. Its only effect |
|
8439 is to emit the line \fB.eflag 48\fR in the function prologue of the |
|
8440 generated assembly file. Under \s-1DEC\s0 Unix, this has the effect that |
|
8441 IEEE-conformant math library routines will be linked in. |
|
8442 .Ip "\fB\-mbuild-constants\fR" 4 |
|
8443 .IX Item "-mbuild-constants" |
|
8444 Normally \s-1GCC\s0 examines a 32\- or 64\-bit integer constant to |
|
8445 see if it can construct it from smaller constants in two or three |
|
8446 instructions. If it cannot, it will output the constant as a literal and |
|
8447 generate code to load it from the data segment at runtime. |
|
8448 .Sp |
|
8449 Use this option to require \s-1GCC\s0 to construct \fIall\fR integer constants |
|
8450 using code, even if it takes more instructions (the maximum is six). |
|
8451 .Sp |
|
8452 You would typically use this option to build a shared library dynamic |
|
8453 loader. Itself a shared library, it must relocate itself in memory |
|
8454 before it can find the variables and constants in its own data segment. |
|
8455 .Ip "\fB\-malpha-as\fR" 4 |
|
8456 .IX Item "-malpha-as" |
|
8457 .PD 0 |
|
8458 .Ip "\fB\-mgas\fR" 4 |
|
8459 .IX Item "-mgas" |
|
8460 .PD |
|
8461 Select whether to generate code to be assembled by the vendor-supplied |
|
8462 assembler (\fB\-malpha-as\fR) or by the \s-1GNU\s0 assembler \fB\-mgas\fR. |
|
8463 .Ip "\fB\-mbwx\fR" 4 |
|
8464 .IX Item "-mbwx" |
|
8465 .PD 0 |
|
8466 .Ip "\fB\-mno-bwx\fR" 4 |
|
8467 .IX Item "-mno-bwx" |
|
8468 .Ip "\fB\-mcix\fR" 4 |
|
8469 .IX Item "-mcix" |
|
8470 .Ip "\fB\-mno-cix\fR" 4 |
|
8471 .IX Item "-mno-cix" |
|
8472 .Ip "\fB\-mfix\fR" 4 |
|
8473 .IX Item "-mfix" |
|
8474 .Ip "\fB\-mno-fix\fR" 4 |
|
8475 .IX Item "-mno-fix" |
|
8476 .Ip "\fB\-mmax\fR" 4 |
|
8477 .IX Item "-mmax" |
|
8478 .Ip "\fB\-mno-max\fR" 4 |
|
8479 .IX Item "-mno-max" |
|
8480 .PD |
|
8481 Indicate whether \s-1GCC\s0 should generate code to use the optional \s-1BWX\s0, |
|
8482 \&\s-1CIX\s0, \s-1FIX\s0 and \s-1MAX\s0 instruction sets. The default is to use the instruction |
|
8483 sets supported by the \s-1CPU\s0 type specified via \fB\-mcpu=\fR option or that |
|
8484 of the \s-1CPU\s0 on which \s-1GCC\s0 was built if none was specified. |
|
8485 .Ip "\fB\-mfloat-vax\fR" 4 |
|
8486 .IX Item "-mfloat-vax" |
|
8487 .PD 0 |
|
8488 .Ip "\fB\-mfloat-ieee\fR" 4 |
|
8489 .IX Item "-mfloat-ieee" |
|
8490 .PD |
|
8491 Generate code that uses (does not use) \s-1VAX\s0 F and G floating point |
|
8492 arithmetic instead of \s-1IEEE\s0 single and double precision. |
|
8493 .Ip "\fB\-mexplicit-relocs\fR" 4 |
|
8494 .IX Item "-mexplicit-relocs" |
|
8495 .PD 0 |
|
8496 .Ip "\fB\-mno-explicit-relocs\fR" 4 |
|
8497 .IX Item "-mno-explicit-relocs" |
|
8498 .PD |
|
8499 Older Alpha assemblers provided no way to generate symbol relocations |
|
8500 except via assembler macros. Use of these macros does not allow |
|
8501 optimal instruction scheduling. \s-1GNU\s0 binutils as of version 2.12 |
|
8502 supports a new syntax that allows the compiler to explicitly mark |
|
8503 which relocations should apply to which instructions. This option |
|
8504 is mostly useful for debugging, as \s-1GCC\s0 detects the capabilities of |
|
8505 the assembler when it is built and sets the default accordingly. |
|
8506 .Ip "\fB\-msmall-data\fR" 4 |
|
8507 .IX Item "-msmall-data" |
|
8508 .PD 0 |
|
8509 .Ip "\fB\-mlarge-data\fR" 4 |
|
8510 .IX Item "-mlarge-data" |
|
8511 .PD |
|
8512 When \fB\-mexplicit-relocs\fR is in effect, static data is |
|
8513 accessed via \fIgp-relative\fR relocations. When \fB\-msmall-data\fR |
|
8514 is used, objects 8 bytes long or smaller are placed in a \fIsmall data area\fR |
|
8515 (the \f(CW\*(C`.sdata\*(C'\fR and \f(CW\*(C`.sbss\*(C'\fR sections) and are accessed via |
|
8516 16\-bit relocations off of the \f(CW\*(C`$gp\*(C'\fR register. This limits the |
|
8517 size of the small data area to 64KB, but allows the variables to be |
|
8518 directly accessed via a single instruction. |
|
8519 .Sp |
|
8520 The default is \fB\-mlarge-data\fR. With this option the data area |
|
8521 is limited to just below 2GB. Programs that require more than 2GB of |
|
8522 data must use \f(CW\*(C`malloc\*(C'\fR or \f(CW\*(C`mmap\*(C'\fR to allocate the data in the |
|
8523 heap instead of in the program's data segment. |
|
8524 .Sp |
|
8525 When generating code for shared libraries, \fB\-fpic\fR implies |
|
8526 \&\fB\-msmall-data\fR and \fB\-fPIC\fR implies \fB\-mlarge-data\fR. |
|
8527 .Ip "\fB\-msmall-text\fR" 4 |
|
8528 .IX Item "-msmall-text" |
|
8529 .PD 0 |
|
8530 .Ip "\fB\-mlarge-text\fR" 4 |
|
8531 .IX Item "-mlarge-text" |
|
8532 .PD |
|
8533 When \fB\-msmall-text\fR is used, the compiler assumes that the |
|
8534 code of the entire program (or shared library) fits in 4MB, and is |
|
8535 thus reachable with a branch instruction. When \fB\-msmall-data\fR |
|
8536 is used, the compiler can assume that all local symbols share the |
|
8537 same \f(CW\*(C`$gp\*(C'\fR value, and thus reduce the number of instructions |
|
8538 required for a function call from 4 to 1. |
|
8539 .Sp |
|
8540 The default is \fB\-mlarge-text\fR. |
|
8541 .Ip "\fB\-mcpu=\fR\fIcpu_type\fR" 4 |
|
8542 .IX Item "-mcpu=cpu_type" |
|
8543 Set the instruction set and instruction scheduling parameters for |
|
8544 machine type \fIcpu_type\fR. You can specify either the \fB\s-1EV\s0\fR |
|
8545 style name or the corresponding chip number. \s-1GCC\s0 supports scheduling |
|
8546 parameters for the \s-1EV4\s0, \s-1EV5\s0 and \s-1EV6\s0 family of processors and will |
|
8547 choose the default values for the instruction set from the processor |
|
8548 you specify. If you do not specify a processor type, \s-1GCC\s0 will default |
|
8549 to the processor on which the compiler was built. |
|
8550 .Sp |
|
8551 Supported values for \fIcpu_type\fR are |
|
8552 .RS 4 |
|
8553 .Ip "\fBev4\fR" 4 |
|
8554 .IX Item "ev4" |
|
8555 .PD 0 |
|
8556 .Ip "\fBev45\fR" 4 |
|
8557 .IX Item "ev45" |
|
8558 .Ip "\fB21064\fR" 4 |
|
8559 .IX Item "21064" |
|
8560 .PD |
|
8561 Schedules as an \s-1EV4\s0 and has no instruction set extensions. |
|
8562 .Ip "\fBev5\fR" 4 |
|
8563 .IX Item "ev5" |
|
8564 .PD 0 |
|
8565 .Ip "\fB21164\fR" 4 |
|
8566 .IX Item "21164" |
|
8567 .PD |
|
8568 Schedules as an \s-1EV5\s0 and has no instruction set extensions. |
|
8569 .Ip "\fBev56\fR" 4 |
|
8570 .IX Item "ev56" |
|
8571 .PD 0 |
|
8572 .Ip "\fB21164a\fR" 4 |
|
8573 .IX Item "21164a" |
|
8574 .PD |
|
8575 Schedules as an \s-1EV5\s0 and supports the \s-1BWX\s0 extension. |
|
8576 .Ip "\fBpca56\fR" 4 |
|
8577 .IX Item "pca56" |
|
8578 .PD 0 |
|
8579 .Ip "\fB21164pc\fR" 4 |
|
8580 .IX Item "21164pc" |
|
8581 .Ip "\fB21164PC\fR" 4 |
|
8582 .IX Item "21164PC" |
|
8583 .PD |
|
8584 Schedules as an \s-1EV5\s0 and supports the \s-1BWX\s0 and \s-1MAX\s0 extensions. |
|
8585 .Ip "\fBev6\fR" 4 |
|
8586 .IX Item "ev6" |
|
8587 .PD 0 |
|
8588 .Ip "\fB21264\fR" 4 |
|
8589 .IX Item "21264" |
|
8590 .PD |
|
8591 Schedules as an \s-1EV6\s0 and supports the \s-1BWX\s0, \s-1FIX\s0, and \s-1MAX\s0 extensions. |
|
8592 .Ip "\fBev67\fR" 4 |
|
8593 .IX Item "ev67" |
|
8594 .PD 0 |
|
8595 .Ip "\fB21264a\fR" 4 |
|
8596 .IX Item "21264a" |
|
8597 .PD |
|
8598 Schedules as an \s-1EV6\s0 and supports the \s-1BWX\s0, \s-1CIX\s0, \s-1FIX\s0, and \s-1MAX\s0 extensions. |
|
8599 .RE |
|
8600 .RS 4 |
|
8601 .RE |
|
8602 .Ip "\fB\-mtune=\fR\fIcpu_type\fR" 4 |
|
8603 .IX Item "-mtune=cpu_type" |
|
8604 Set only the instruction scheduling parameters for machine type |
|
8605 \&\fIcpu_type\fR. The instruction set is not changed. |
|
8606 .Ip "\fB\-mmemory-latency=\fR\fItime\fR" 4 |
|
8607 .IX Item "-mmemory-latency=time" |
|
8608 Sets the latency the scheduler should assume for typical memory |
|
8609 references as seen by the application. This number is highly |
|
8610 dependent on the memory access patterns used by the application |
|
8611 and the size of the external cache on the machine. |
|
8612 .Sp |
|
8613 Valid options for \fItime\fR are |
|
8614 .RS 4 |
|
8615 .Ip "\fInumber\fR" 4 |
|
8616 .IX Item "number" |
|
8617 A decimal number representing clock cycles. |
|
8618 .Ip "\fBL1\fR" 4 |
|
8619 .IX Item "L1" |
|
8620 .PD 0 |
|
8621 .Ip "\fBL2\fR" 4 |
|
8622 .IX Item "L2" |
|
8623 .Ip "\fBL3\fR" 4 |
|
8624 .IX Item "L3" |
|
8625 .Ip "\fBmain\fR" 4 |
|
8626 .IX Item "main" |
|
8627 .PD |
|
8628 The compiler contains estimates of the number of clock cycles for |
|
8629 ``typical'' \s-1EV4\s0 & \s-1EV5\s0 hardware for the Level 1, 2 & 3 caches |
|
8630 (also called Dcache, Scache, and Bcache), as well as to main memory. |
|
8631 Note that L3 is only valid for \s-1EV5\s0. |
|
8632 .RE |
|
8633 .RS 4 |
|
8634 .RE |
|
8635 .PP |
|
8636 .I "\s-1DEC\s0 Alpha/VMS Options" |
|
8637 .IX Subsection "DEC Alpha/VMS Options" |
|
8638 .PP |
|
8639 These \fB\-m\fR options are defined for the \s-1DEC\s0 Alpha/VMS implementations: |
|
8640 .Ip "\fB\-mvms-return-codes\fR" 4 |
|
8641 .IX Item "-mvms-return-codes" |
|
8642 Return \s-1VMS\s0 condition codes from main. The default is to return \s-1POSIX\s0 |
|
8643 style condition (e.g. error) codes. |
|
8644 .PP |
|
8645 .I "H8/300 Options" |
|
8646 .IX Subsection "H8/300 Options" |
|
8647 .PP |
|
8648 These \fB\-m\fR options are defined for the H8/300 implementations: |
|
8649 .Ip "\fB\-mrelax\fR" 4 |
|
8650 .IX Item "-mrelax" |
|
8651 Shorten some address references at link time, when possible; uses the |
|
8652 linker option \fB\-relax\fR. |
|
8653 .Ip "\fB\-mh\fR" 4 |
|
8654 .IX Item "-mh" |
|
8655 Generate code for the H8/300H. |
|
8656 .Ip "\fB\-ms\fR" 4 |
|
8657 .IX Item "-ms" |
|
8658 Generate code for the H8S. |
|
8659 .Ip "\fB\-mn\fR" 4 |
|
8660 .IX Item "-mn" |
|
8661 Generate code for the H8S and H8/300H in the normal mode. This switch |
|
8662 must be used either with \-mh or \-ms. |
|
8663 .Ip "\fB\-ms2600\fR" 4 |
|
8664 .IX Item "-ms2600" |
|
8665 Generate code for the H8S/2600. This switch must be used with \fB\-ms\fR. |
|
8666 .Ip "\fB\-mint32\fR" 4 |
|
8667 .IX Item "-mint32" |
|
8668 Make \f(CW\*(C`int\*(C'\fR data 32 bits by default. |
|
8669 .Ip "\fB\-malign-300\fR" 4 |
|
8670 .IX Item "-malign-300" |
|
8671 On the H8/300H and H8S, use the same alignment rules as for the H8/300. |
|
8672 The default for the H8/300H and H8S is to align longs and floats on 4 |
|
8673 byte boundaries. |
|
8674 \&\fB\-malign-300\fR causes them to be aligned on 2 byte boundaries. |
|
8675 This option has no effect on the H8/300. |
|
8676 .PP |
|
8677 .I "\s-1SH\s0 Options" |
|
8678 .IX Subsection "SH Options" |
|
8679 .PP |
|
8680 These \fB\-m\fR options are defined for the \s-1SH\s0 implementations: |
|
8681 .Ip "\fB\-m1\fR" 4 |
|
8682 .IX Item "-m1" |
|
8683 Generate code for the \s-1SH1\s0. |
|
8684 .Ip "\fB\-m2\fR" 4 |
|
8685 .IX Item "-m2" |
|
8686 Generate code for the \s-1SH2\s0. |
|
8687 .Ip "\fB\-m2e\fR" 4 |
|
8688 .IX Item "-m2e" |
|
8689 Generate code for the SH2e. |
|
8690 .Ip "\fB\-m3\fR" 4 |
|
8691 .IX Item "-m3" |
|
8692 Generate code for the \s-1SH3\s0. |
|
8693 .Ip "\fB\-m3e\fR" 4 |
|
8694 .IX Item "-m3e" |
|
8695 Generate code for the SH3e. |
|
8696 .Ip "\fB\-m4\-nofpu\fR" 4 |
|
8697 .IX Item "-m4-nofpu" |
|
8698 Generate code for the \s-1SH4\s0 without a floating-point unit. |
|
8699 .Ip "\fB\-m4\-single-only\fR" 4 |
|
8700 .IX Item "-m4-single-only" |
|
8701 Generate code for the \s-1SH4\s0 with a floating-point unit that only |
|
8702 supports single-precision arithmetic. |
|
8703 .Ip "\fB\-m4\-single\fR" 4 |
|
8704 .IX Item "-m4-single" |
|
8705 Generate code for the \s-1SH4\s0 assuming the floating-point unit is in |
|
8706 single-precision mode by default. |
|
8707 .Ip "\fB\-m4\fR" 4 |
|
8708 .IX Item "-m4" |
|
8709 Generate code for the \s-1SH4\s0. |
|
8710 .Ip "\fB\-mb\fR" 4 |
|
8711 .IX Item "-mb" |
|
8712 Compile code for the processor in big endian mode. |
|
8713 .Ip "\fB\-ml\fR" 4 |
|
8714 .IX Item "-ml" |
|
8715 Compile code for the processor in little endian mode. |
|
8716 .Ip "\fB\-mdalign\fR" 4 |
|
8717 .IX Item "-mdalign" |
|
8718 Align doubles at 64\-bit boundaries. Note that this changes the calling |
|
8719 conventions, and thus some functions from the standard C library will |
|
8720 not work unless you recompile it first with \fB\-mdalign\fR. |
|
8721 .Ip "\fB\-mrelax\fR" 4 |
|
8722 .IX Item "-mrelax" |
|
8723 Shorten some address references at link time, when possible; uses the |
|
8724 linker option \fB\-relax\fR. |
|
8725 .Ip "\fB\-mbigtable\fR" 4 |
|
8726 .IX Item "-mbigtable" |
|
8727 Use 32\-bit offsets in \f(CW\*(C`switch\*(C'\fR tables. The default is to use |
|
8728 16\-bit offsets. |
|
8729 .Ip "\fB\-mfmovd\fR" 4 |
|
8730 .IX Item "-mfmovd" |
|
8731 Enable the use of the instruction \f(CW\*(C`fmovd\*(C'\fR. |
|
8732 .Ip "\fB\-mhitachi\fR" 4 |
|
8733 .IX Item "-mhitachi" |
|
8734 Comply with the calling conventions defined by Renesas. |
|
8735 .Ip "\fB\-mnomacsave\fR" 4 |
|
8736 .IX Item "-mnomacsave" |
|
8737 Mark the \f(CW\*(C`MAC\*(C'\fR register as call-clobbered, even if |
|
8738 \&\fB\-mhitachi\fR is given. |
|
8739 .Ip "\fB\-mieee\fR" 4 |
|
8740 .IX Item "-mieee" |
|
8741 Increase IEEE-compliance of floating-point code. |
|
8742 .Ip "\fB\-misize\fR" 4 |
|
8743 .IX Item "-misize" |
|
8744 Dump instruction size and location in the assembly code. |
|
8745 .Ip "\fB\-mpadstruct\fR" 4 |
|
8746 .IX Item "-mpadstruct" |
|
8747 This option is deprecated. It pads structures to multiple of 4 bytes, |
|
8748 which is incompatible with the \s-1SH\s0 \s-1ABI\s0. |
|
8749 .Ip "\fB\-mspace\fR" 4 |
|
8750 .IX Item "-mspace" |
|
8751 Optimize for space instead of speed. Implied by \fB\-Os\fR. |
|
8752 .Ip "\fB\-mprefergot\fR" 4 |
|
8753 .IX Item "-mprefergot" |
|
8754 When generating position-independent code, emit function calls using |
|
8755 the Global Offset Table instead of the Procedure Linkage Table. |
|
8756 .Ip "\fB\-musermode\fR" 4 |
|
8757 .IX Item "-musermode" |
|
8758 Generate a library function call to invalidate instruction cache |
|
8759 entries, after fixing up a trampoline. This library function call |
|
8760 doesn't assume it can write to the whole memory address space. This |
|
8761 is the default when the target is \f(CW\*(C`sh\-*\-linux*\*(C'\fR. |
|
8762 .PP |
|
8763 .I "Options for System V" |
|
8764 .IX Subsection "Options for System V" |
|
8765 .PP |
|
8766 These additional options are available on System V Release 4 for |
|
8767 compatibility with other compilers on those systems: |
|
8768 .Ip "\fB\-G\fR" 4 |
|
8769 .IX Item "-G" |
|
8770 Create a shared object. |
|
8771 It is recommended that \fB\-symbolic\fR or \fB\-shared\fR be used instead. |
|
8772 .Ip "\fB\-Qy\fR" 4 |
|
8773 .IX Item "-Qy" |
|
8774 Identify the versions of each tool used by the compiler, in a |
|
8775 \&\f(CW\*(C`.ident\*(C'\fR assembler directive in the output. |
|
8776 .Ip "\fB\-Qn\fR" 4 |
|
8777 .IX Item "-Qn" |
|
8778 Refrain from adding \f(CW\*(C`.ident\*(C'\fR directives to the output file (this is |
|
8779 the default). |
|
8780 .Ip "\fB\-YP,\fR\fIdirs\fR" 4 |
|
8781 .IX Item "-YP,dirs" |
|
8782 Search the directories \fIdirs\fR, and no others, for libraries |
|
8783 specified with \fB\-l\fR. |
|
8784 .Ip "\fB\-Ym,\fR\fIdir\fR" 4 |
|
8785 .IX Item "-Ym,dir" |
|
8786 Look in the directory \fIdir\fR to find the M4 preprocessor. |
|
8787 The assembler uses this option. |
|
8788 .PP |
|
8789 .I "TMS320C3x/C4x Options" |
|
8790 .IX Subsection "TMS320C3x/C4x Options" |
|
8791 .PP |
|
8792 These \fB\-m\fR options are defined for TMS320C3x/C4x implementations: |
|
8793 .Ip "\fB\-mcpu=\fR\fIcpu_type\fR" 4 |
|
8794 .IX Item "-mcpu=cpu_type" |
|
8795 Set the instruction set, register set, and instruction scheduling |
|
8796 parameters for machine type \fIcpu_type\fR. Supported values for |
|
8797 \&\fIcpu_type\fR are \fBc30\fR, \fBc31\fR, \fBc32\fR, \fBc40\fR, and |
|
8798 \&\fBc44\fR. The default is \fBc40\fR to generate code for the |
|
8799 \&\s-1TMS320C40\s0. |
|
8800 .Ip "\fB\-mbig-memory\fR" 4 |
|
8801 .IX Item "-mbig-memory" |
|
8802 .PD 0 |
|
8803 .Ip "\fB\-mbig\fR" 4 |
|
8804 .IX Item "-mbig" |
|
8805 .Ip "\fB\-msmall-memory\fR" 4 |
|
8806 .IX Item "-msmall-memory" |
|
8807 .Ip "\fB\-msmall\fR" 4 |
|
8808 .IX Item "-msmall" |
|
8809 .PD |
|
8810 Generates code for the big or small memory model. The small memory |
|
8811 model assumed that all data fits into one 64K word page. At run-time |
|
8812 the data page (\s-1DP\s0) register must be set to point to the 64K page |
|
8813 containing the .bss and .data program sections. The big memory model is |
|
8814 the default and requires reloading of the \s-1DP\s0 register for every direct |
|
8815 memory access. |
|
8816 .Ip "\fB\-mbk\fR" 4 |
|
8817 .IX Item "-mbk" |
|
8818 .PD 0 |
|
8819 .Ip "\fB\-mno-bk\fR" 4 |
|
8820 .IX Item "-mno-bk" |
|
8821 .PD |
|
8822 Allow (disallow) allocation of general integer operands into the block |
|
8823 count register \s-1BK\s0. |
|
8824 .Ip "\fB\-mdb\fR" 4 |
|
8825 .IX Item "-mdb" |
|
8826 .PD 0 |
|
8827 .Ip "\fB\-mno-db\fR" 4 |
|
8828 .IX Item "-mno-db" |
|
8829 .PD |
|
8830 Enable (disable) generation of code using decrement and branch, |
|
8831 \&\fIDBcond\fR\|(D), instructions. This is enabled by default for the C4x. To be |
|
8832 on the safe side, this is disabled for the C3x, since the maximum |
|
8833 iteration count on the C3x is 2^{23 + 1} (but who iterates loops more than |
|
8834 2^{23} times on the C3x?). Note that \s-1GCC\s0 will try to reverse a loop so |
|
8835 that it can utilize the decrement and branch instruction, but will give |
|
8836 up if there is more than one memory reference in the loop. Thus a loop |
|
8837 where the loop counter is decremented can generate slightly more |
|
8838 efficient code, in cases where the \s-1RPTB\s0 instruction cannot be utilized. |
|
8839 .Ip "\fB\-mdp-isr-reload\fR" 4 |
|
8840 .IX Item "-mdp-isr-reload" |
|
8841 .PD 0 |
|
8842 .Ip "\fB\-mparanoid\fR" 4 |
|
8843 .IX Item "-mparanoid" |
|
8844 .PD |
|
8845 Force the \s-1DP\s0 register to be saved on entry to an interrupt service |
|
8846 routine (\s-1ISR\s0), reloaded to point to the data section, and restored on |
|
8847 exit from the \s-1ISR\s0. This should not be required unless someone has |
|
8848 violated the small memory model by modifying the \s-1DP\s0 register, say within |
|
8849 an object library. |
|
8850 .Ip "\fB\-mmpyi\fR" 4 |
|
8851 .IX Item "-mmpyi" |
|
8852 .PD 0 |
|
8853 .Ip "\fB\-mno-mpyi\fR" 4 |
|
8854 .IX Item "-mno-mpyi" |
|
8855 .PD |
|
8856 For the C3x use the 24\-bit \s-1MPYI\s0 instruction for integer multiplies |
|
8857 instead of a library call to guarantee 32\-bit results. Note that if one |
|
8858 of the operands is a constant, then the multiplication will be performed |
|
8859 using shifts and adds. If the \fB\-mmpyi\fR option is not specified for the C3x, |
|
8860 then squaring operations are performed inline instead of a library call. |
|
8861 .Ip "\fB\-mfast-fix\fR" 4 |
|
8862 .IX Item "-mfast-fix" |
|
8863 .PD 0 |
|
8864 .Ip "\fB\-mno-fast-fix\fR" 4 |
|
8865 .IX Item "-mno-fast-fix" |
|
8866 .PD |
|
8867 The C3x/C4x \s-1FIX\s0 instruction to convert a floating point value to an |
|
8868 integer value chooses the nearest integer less than or equal to the |
|
8869 floating point value rather than to the nearest integer. Thus if the |
|
8870 floating point number is negative, the result will be incorrectly |
|
8871 truncated an additional code is necessary to detect and correct this |
|
8872 case. This option can be used to disable generation of the additional |
|
8873 code required to correct the result. |
|
8874 .Ip "\fB\-mrptb\fR" 4 |
|
8875 .IX Item "-mrptb" |
|
8876 .PD 0 |
|
8877 .Ip "\fB\-mno-rptb\fR" 4 |
|
8878 .IX Item "-mno-rptb" |
|
8879 .PD |
|
8880 Enable (disable) generation of repeat block sequences using the \s-1RPTB\s0 |
|
8881 instruction for zero overhead looping. The \s-1RPTB\s0 construct is only used |
|
8882 for innermost loops that do not call functions or jump across the loop |
|
8883 boundaries. There is no advantage having nested \s-1RPTB\s0 loops due to the |
|
8884 overhead required to save and restore the \s-1RC\s0, \s-1RS\s0, and \s-1RE\s0 registers. |
|
8885 This is enabled by default with \fB\-O2\fR. |
|
8886 .Ip "\fB\-mrpts=\fR\fIcount\fR" 4 |
|
8887 .IX Item "-mrpts=count" |
|
8888 .PD 0 |
|
8889 .Ip "\fB\-mno-rpts\fR" 4 |
|
8890 .IX Item "-mno-rpts" |
|
8891 .PD |
|
8892 Enable (disable) the use of the single instruction repeat instruction |
|
8893 \&\s-1RPTS\s0. If a repeat block contains a single instruction, and the loop |
|
8894 count can be guaranteed to be less than the value \fIcount\fR, \s-1GCC\s0 will |
|
8895 emit a \s-1RPTS\s0 instruction instead of a \s-1RPTB\s0. If no value is specified, |
|
8896 then a \s-1RPTS\s0 will be emitted even if the loop count cannot be determined |
|
8897 at compile time. Note that the repeated instruction following \s-1RPTS\s0 does |
|
8898 not have to be reloaded from memory each iteration, thus freeing up the |
|
8899 \&\s-1CPU\s0 buses for operands. However, since interrupts are blocked by this |
|
8900 instruction, it is disabled by default. |
|
8901 .Ip "\fB\-mloop-unsigned\fR" 4 |
|
8902 .IX Item "-mloop-unsigned" |
|
8903 .PD 0 |
|
8904 .Ip "\fB\-mno-loop-unsigned\fR" 4 |
|
8905 .IX Item "-mno-loop-unsigned" |
|
8906 .PD |
|
8907 The maximum iteration count when using \s-1RPTS\s0 and \s-1RPTB\s0 (and \s-1DB\s0 on the C40) |
|
8908 is 2^{31 + 1} since these instructions test if the iteration count is |
|
8909 negative to terminate the loop. If the iteration count is unsigned |
|
8910 there is a possibility than the 2^{31 + 1} maximum iteration count may be |
|
8911 exceeded. This switch allows an unsigned iteration count. |
|
8912 .Ip "\fB\-mti\fR" 4 |
|
8913 .IX Item "-mti" |
|
8914 Try to emit an assembler syntax that the \s-1TI\s0 assembler (asm30) is happy |
|
8915 with. This also enforces compatibility with the \s-1API\s0 employed by the \s-1TI\s0 |
|
8916 C3x C compiler. For example, long doubles are passed as structures |
|
8917 rather than in floating point registers. |
|
8918 .Ip "\fB\-mregparm\fR" 4 |
|
8919 .IX Item "-mregparm" |
|
8920 .PD 0 |
|
8921 .Ip "\fB\-mmemparm\fR" 4 |
|
8922 .IX Item "-mmemparm" |
|
8923 .PD |
|
8924 Generate code that uses registers (stack) for passing arguments to functions. |
|
8925 By default, arguments are passed in registers where possible rather |
|
8926 than by pushing arguments on to the stack. |
|
8927 .Ip "\fB\-mparallel-insns\fR" 4 |
|
8928 .IX Item "-mparallel-insns" |
|
8929 .PD 0 |
|
8930 .Ip "\fB\-mno-parallel-insns\fR" 4 |
|
8931 .IX Item "-mno-parallel-insns" |
|
8932 .PD |
|
8933 Allow the generation of parallel instructions. This is enabled by |
|
8934 default with \fB\-O2\fR. |
|
8935 .Ip "\fB\-mparallel-mpy\fR" 4 |
|
8936 .IX Item "-mparallel-mpy" |
|
8937 .PD 0 |
|
8938 .Ip "\fB\-mno-parallel-mpy\fR" 4 |
|
8939 .IX Item "-mno-parallel-mpy" |
|
8940 .PD |
|
8941 Allow the generation of MPY||ADD and MPY||SUB parallel instructions, |
|
8942 provided \fB\-mparallel-insns\fR is also specified. These instructions have |
|
8943 tight register constraints which can pessimize the code generation |
|
8944 of large functions. |
|
8945 .PP |
|
8946 .I "V850 Options" |
|
8947 .IX Subsection "V850 Options" |
|
8948 .PP |
|
8949 These \fB\-m\fR options are defined for V850 implementations: |
|
8950 .Ip "\fB\-mlong-calls\fR" 4 |
|
8951 .IX Item "-mlong-calls" |
|
8952 .PD 0 |
|
8953 .Ip "\fB\-mno-long-calls\fR" 4 |
|
8954 .IX Item "-mno-long-calls" |
|
8955 .PD |
|
8956 Treat all calls as being far away (near). If calls are assumed to be |
|
8957 far away, the compiler will always load the functions address up into a |
|
8958 register, and call indirect through the pointer. |
|
8959 .Ip "\fB\-mno-ep\fR" 4 |
|
8960 .IX Item "-mno-ep" |
|
8961 .PD 0 |
|
8962 .Ip "\fB\-mep\fR" 4 |
|
8963 .IX Item "-mep" |
|
8964 .PD |
|
8965 Do not optimize (do optimize) basic blocks that use the same index |
|
8966 pointer 4 or more times to copy pointer into the \f(CW\*(C`ep\*(C'\fR register, and |
|
8967 use the shorter \f(CW\*(C`sld\*(C'\fR and \f(CW\*(C`sst\*(C'\fR instructions. The \fB\-mep\fR |
|
8968 option is on by default if you optimize. |
|
8969 .Ip "\fB\-mno-prolog-function\fR" 4 |
|
8970 .IX Item "-mno-prolog-function" |
|
8971 .PD 0 |
|
8972 .Ip "\fB\-mprolog-function\fR" 4 |
|
8973 .IX Item "-mprolog-function" |
|
8974 .PD |
|
8975 Do not use (do use) external functions to save and restore registers |
|
8976 at the prologue and epilogue of a function. The external functions |
|
8977 are slower, but use less code space if more than one function saves |
|
8978 the same number of registers. The \fB\-mprolog-function\fR option |
|
8979 is on by default if you optimize. |
|
8980 .Ip "\fB\-mspace\fR" 4 |
|
8981 .IX Item "-mspace" |
|
8982 Try to make the code as small as possible. At present, this just turns |
|
8983 on the \fB\-mep\fR and \fB\-mprolog-function\fR options. |
|
8984 .Ip "\fB\-mtda=\fR\fIn\fR" 4 |
|
8985 .IX Item "-mtda=n" |
|
8986 Put static or global variables whose size is \fIn\fR bytes or less into |
|
8987 the tiny data area that register \f(CW\*(C`ep\*(C'\fR points to. The tiny data |
|
8988 area can hold up to 256 bytes in total (128 bytes for byte references). |
|
8989 .Ip "\fB\-msda=\fR\fIn\fR" 4 |
|
8990 .IX Item "-msda=n" |
|
8991 Put static or global variables whose size is \fIn\fR bytes or less into |
|
8992 the small data area that register \f(CW\*(C`gp\*(C'\fR points to. The small data |
|
8993 area can hold up to 64 kilobytes. |
|
8994 .Ip "\fB\-mzda=\fR\fIn\fR" 4 |
|
8995 .IX Item "-mzda=n" |
|
8996 Put static or global variables whose size is \fIn\fR bytes or less into |
|
8997 the first 32 kilobytes of memory. |
|
8998 .Ip "\fB\-mv850\fR" 4 |
|
8999 .IX Item "-mv850" |
|
9000 Specify that the target processor is the V850. |
|
9001 .Ip "\fB\-mbig-switch\fR" 4 |
|
9002 .IX Item "-mbig-switch" |
|
9003 Generate code suitable for big switch tables. Use this option only if |
|
9004 the assembler/linker complain about out of range branches within a switch |
|
9005 table. |
|
9006 .Ip "\fB\-mapp-regs\fR" 4 |
|
9007 .IX Item "-mapp-regs" |
|
9008 This option will cause r2 and r5 to be used in the code generated by |
|
9009 the compiler. This setting is the default. |
|
9010 .Ip "\fB\-mno-app-regs\fR" 4 |
|
9011 .IX Item "-mno-app-regs" |
|
9012 This option will cause r2 and r5 to be treated as fixed registers. |
|
9013 .Ip "\fB\-mv850e1\fR" 4 |
|
9014 .IX Item "-mv850e1" |
|
9015 Specify that the target processor is the V850E1. The preprocessor |
|
9016 constants \fB_\|_v850e1_\|_\fR and \fB_\|_v850e_\|_\fR will be defined if |
|
9017 this option is used. |
|
9018 .Ip "\fB\-mv850e\fR" 4 |
|
9019 .IX Item "-mv850e" |
|
9020 Specify that the target processor is the V850E. The preprocessor |
|
9021 constant \fB_\|_v850e_\|_\fR will be defined if this option is used. |
|
9022 .Sp |
|
9023 If neither \fB\-mv850\fR nor \fB\-mv850e\fR nor \fB\-mv850e1\fR |
|
9024 are defined then a default target processor will be chosen and the |
|
9025 relevant \fB_\|_v850*_\|_\fR preprocessor constant will be defined. |
|
9026 .Sp |
|
9027 The preprocessor constants \fB_\|_v850\fR and \fB_\|_v851_\|_\fR are always |
|
9028 defined, regardless of which processor variant is the target. |
|
9029 .Ip "\fB\-mdisable-callt\fR" 4 |
|
9030 .IX Item "-mdisable-callt" |
|
9031 This option will suppress generation of the \s-1CALLT\s0 instruction for the |
|
9032 v850e and v850e1 flavors of the v850 architecture. The default is |
|
9033 \&\fB\-mno-disable-callt\fR which allows the \s-1CALLT\s0 instruction to be used. |
|
9034 .PP |
|
9035 .I "\s-1ARC\s0 Options" |
|
9036 .IX Subsection "ARC Options" |
|
9037 .PP |
|
9038 These options are defined for \s-1ARC\s0 implementations: |
|
9039 .Ip "\fB\-EL\fR" 4 |
|
9040 .IX Item "-EL" |
|
9041 Compile code for little endian mode. This is the default. |
|
9042 .Ip "\fB\-EB\fR" 4 |
|
9043 .IX Item "-EB" |
|
9044 Compile code for big endian mode. |
|
9045 .Ip "\fB\-mmangle-cpu\fR" 4 |
|
9046 .IX Item "-mmangle-cpu" |
|
9047 Prepend the name of the cpu to all public symbol names. |
|
9048 In multiple-processor systems, there are many \s-1ARC\s0 variants with different |
|
9049 instruction and register set characteristics. This flag prevents code |
|
9050 compiled for one cpu to be linked with code compiled for another. |
|
9051 No facility exists for handling variants that are ``almost identical''. |
|
9052 This is an all or nothing option. |
|
9053 .Ip "\fB\-mcpu=\fR\fIcpu\fR" 4 |
|
9054 .IX Item "-mcpu=cpu" |
|
9055 Compile code for \s-1ARC\s0 variant \fIcpu\fR. |
|
9056 Which variants are supported depend on the configuration. |
|
9057 All variants support \fB\-mcpu=base\fR, this is the default. |
|
9058 .Ip "\fB\-mtext=\fR\fItext-section\fR" 4 |
|
9059 .IX Item "-mtext=text-section" |
|
9060 .PD 0 |
|
9061 .Ip "\fB\-mdata=\fR\fIdata-section\fR" 4 |
|
9062 .IX Item "-mdata=data-section" |
|
9063 .Ip "\fB\-mrodata=\fR\fIreadonly-data-section\fR" 4 |
|
9064 .IX Item "-mrodata=readonly-data-section" |
|
9065 .PD |
|
9066 Put functions, data, and readonly data in \fItext-section\fR, |
|
9067 \&\fIdata-section\fR, and \fIreadonly-data-section\fR respectively |
|
9068 by default. This can be overridden with the \f(CW\*(C`section\*(C'\fR attribute. |
|
9069 .PP |
|
9070 .I "\s-1NS32K\s0 Options" |
|
9071 .IX Subsection "NS32K Options" |
|
9072 .PP |
|
9073 These are the \fB\-m\fR options defined for the 32000 series. The default |
|
9074 values for these options depends on which style of 32000 was selected when |
|
9075 the compiler was configured; the defaults for the most common choices are |
|
9076 given below. |
|
9077 .Ip "\fB\-m32032\fR" 4 |
|
9078 .IX Item "-m32032" |
|
9079 .PD 0 |
|
9080 .Ip "\fB\-m32032\fR" 4 |
|
9081 .IX Item "-m32032" |
|
9082 .PD |
|
9083 Generate output for a 32032. This is the default |
|
9084 when the compiler is configured for 32032 and 32016 based systems. |
|
9085 .Ip "\fB\-m32332\fR" 4 |
|
9086 .IX Item "-m32332" |
|
9087 .PD 0 |
|
9088 .Ip "\fB\-m32332\fR" 4 |
|
9089 .IX Item "-m32332" |
|
9090 .PD |
|
9091 Generate output for a 32332. This is the default |
|
9092 when the compiler is configured for 32332\-based systems. |
|
9093 .Ip "\fB\-m32532\fR" 4 |
|
9094 .IX Item "-m32532" |
|
9095 .PD 0 |
|
9096 .Ip "\fB\-m32532\fR" 4 |
|
9097 .IX Item "-m32532" |
|
9098 .PD |
|
9099 Generate output for a 32532. This is the default |
|
9100 when the compiler is configured for 32532\-based systems. |
|
9101 .Ip "\fB\-m32081\fR" 4 |
|
9102 .IX Item "-m32081" |
|
9103 Generate output containing 32081 instructions for floating point. |
|
9104 This is the default for all systems. |
|
9105 .Ip "\fB\-m32381\fR" 4 |
|
9106 .IX Item "-m32381" |
|
9107 Generate output containing 32381 instructions for floating point. This |
|
9108 also implies \fB\-m32081\fR. The 32381 is only compatible with the 32332 |
|
9109 and 32532 cpus. This is the default for the pc532\-netbsd configuration. |
|
9110 .Ip "\fB\-mmulti-add\fR" 4 |
|
9111 .IX Item "-mmulti-add" |
|
9112 Try and generate multiply-add floating point instructions \f(CW\*(C`polyF\*(C'\fR |
|
9113 and \f(CW\*(C`dotF\*(C'\fR. This option is only available if the \fB\-m32381\fR |
|
9114 option is in effect. Using these instructions requires changes to |
|
9115 register allocation which generally has a negative impact on |
|
9116 performance. This option should only be enabled when compiling code |
|
9117 particularly likely to make heavy use of multiply-add instructions. |
|
9118 .Ip "\fB\-mnomulti-add\fR" 4 |
|
9119 .IX Item "-mnomulti-add" |
|
9120 Do not try and generate multiply-add floating point instructions |
|
9121 \&\f(CW\*(C`polyF\*(C'\fR and \f(CW\*(C`dotF\*(C'\fR. This is the default on all platforms. |
|
9122 .Ip "\fB\-msoft-float\fR" 4 |
|
9123 .IX Item "-msoft-float" |
|
9124 Generate output containing library calls for floating point. |
|
9125 \&\fBWarning:\fR the requisite libraries may not be available. |
|
9126 .Ip "\fB\-mieee-compare\fR" 4 |
|
9127 .IX Item "-mieee-compare" |
|
9128 .PD 0 |
|
9129 .Ip "\fB\-mno-ieee-compare\fR" 4 |
|
9130 .IX Item "-mno-ieee-compare" |
|
9131 .PD |
|
9132 Control whether or not the compiler uses \s-1IEEE\s0 floating point |
|
9133 comparisons. These handle correctly the case where the result of a |
|
9134 comparison is unordered. |
|
9135 \&\fBWarning:\fR the requisite kernel support may not be available. |
|
9136 .Ip "\fB\-mnobitfield\fR" 4 |
|
9137 .IX Item "-mnobitfield" |
|
9138 Do not use the bit-field instructions. On some machines it is faster to |
|
9139 use shifting and masking operations. This is the default for the pc532. |
|
9140 .Ip "\fB\-mbitfield\fR" 4 |
|
9141 .IX Item "-mbitfield" |
|
9142 Do use the bit-field instructions. This is the default for all platforms |
|
9143 except the pc532. |
|
9144 .Ip "\fB\-mrtd\fR" 4 |
|
9145 .IX Item "-mrtd" |
|
9146 Use a different function-calling convention, in which functions |
|
9147 that take a fixed number of arguments return pop their |
|
9148 arguments on return with the \f(CW\*(C`ret\*(C'\fR instruction. |
|
9149 .Sp |
|
9150 This calling convention is incompatible with the one normally |
|
9151 used on Unix, so you cannot use it if you need to call libraries |
|
9152 compiled with the Unix compiler. |
|
9153 .Sp |
|
9154 Also, you must provide function prototypes for all functions that |
|
9155 take variable numbers of arguments (including \f(CW\*(C`printf\*(C'\fR); |
|
9156 otherwise incorrect code will be generated for calls to those |
|
9157 functions. |
|
9158 .Sp |
|
9159 In addition, seriously incorrect code will result if you call a |
|
9160 function with too many arguments. (Normally, extra arguments are |
|
9161 harmlessly ignored.) |
|
9162 .Sp |
|
9163 This option takes its name from the 680x0 \f(CW\*(C`rtd\*(C'\fR instruction. |
|
9164 .Ip "\fB\-mregparam\fR" 4 |
|
9165 .IX Item "-mregparam" |
|
9166 Use a different function-calling convention where the first two arguments |
|
9167 are passed in registers. |
|
9168 .Sp |
|
9169 This calling convention is incompatible with the one normally |
|
9170 used on Unix, so you cannot use it if you need to call libraries |
|
9171 compiled with the Unix compiler. |
|
9172 .Ip "\fB\-mnoregparam\fR" 4 |
|
9173 .IX Item "-mnoregparam" |
|
9174 Do not pass any arguments in registers. This is the default for all |
|
9175 targets. |
|
9176 .Ip "\fB\-msb\fR" 4 |
|
9177 .IX Item "-msb" |
|
9178 It is \s-1OK\s0 to use the sb as an index register which is always loaded with |
|
9179 zero. This is the default for the pc532\-netbsd target. |
|
9180 .Ip "\fB\-mnosb\fR" 4 |
|
9181 .IX Item "-mnosb" |
|
9182 The sb register is not available for use or has not been initialized to |
|
9183 zero by the run time system. This is the default for all targets except |
|
9184 the pc532\-netbsd. It is also implied whenever \fB\-mhimem\fR or |
|
9185 \&\fB\-fpic\fR is set. |
|
9186 .Ip "\fB\-mhimem\fR" 4 |
|
9187 .IX Item "-mhimem" |
|
9188 Many ns32000 series addressing modes use displacements of up to 512MB. |
|
9189 If an address is above 512MB then displacements from zero can not be used. |
|
9190 This option causes code to be generated which can be loaded above 512MB. |
|
9191 This may be useful for operating systems or \s-1ROM\s0 code. |
|
9192 .Ip "\fB\-mnohimem\fR" 4 |
|
9193 .IX Item "-mnohimem" |
|
9194 Assume code will be loaded in the first 512MB of virtual address space. |
|
9195 This is the default for all platforms. |
|
9196 .PP |
|
9197 .I "\s-1AVR\s0 Options" |
|
9198 .IX Subsection "AVR Options" |
|
9199 .PP |
|
9200 These options are defined for \s-1AVR\s0 implementations: |
|
9201 .Ip "\fB\-mmcu=\fR\fImcu\fR" 4 |
|
9202 .IX Item "-mmcu=mcu" |
|
9203 Specify \s-1ATMEL\s0 \s-1AVR\s0 instruction set or \s-1MCU\s0 type. |
|
9204 .Sp |
|
9205 Instruction set avr1 is for the minimal \s-1AVR\s0 core, not supported by the C |
|
9206 compiler, only for assembler programs (\s-1MCU\s0 types: at90s1200, attiny10, |
|
9207 attiny11, attiny12, attiny15, attiny28). |
|
9208 .Sp |
|
9209 Instruction set avr2 (default) is for the classic \s-1AVR\s0 core with up to |
|
9210 8K program memory space (\s-1MCU\s0 types: at90s2313, at90s2323, attiny22, |
|
9211 at90s2333, at90s2343, at90s4414, at90s4433, at90s4434, at90s8515, |
|
9212 at90c8534, at90s8535). |
|
9213 .Sp |
|
9214 Instruction set avr3 is for the classic \s-1AVR\s0 core with up to 128K program |
|
9215 memory space (\s-1MCU\s0 types: atmega103, atmega603, at43usb320, at76c711). |
|
9216 .Sp |
|
9217 Instruction set avr4 is for the enhanced \s-1AVR\s0 core with up to 8K program |
|
9218 memory space (\s-1MCU\s0 types: atmega8, atmega83, atmega85). |
|
9219 .Sp |
|
9220 Instruction set avr5 is for the enhanced \s-1AVR\s0 core with up to 128K program |
|
9221 memory space (\s-1MCU\s0 types: atmega16, atmega161, atmega163, atmega32, atmega323, |
|
9222 atmega64, atmega128, at43usb355, at94k). |
|
9223 .Ip "\fB\-msize\fR" 4 |
|
9224 .IX Item "-msize" |
|
9225 Output instruction sizes to the asm file. |
|
9226 .Ip "\fB\-minit-stack=\fR\fIN\fR" 4 |
|
9227 .IX Item "-minit-stack=N" |
|
9228 Specify the initial stack address, which may be a symbol or numeric value, |
|
9229 \&\fB_\|_stack\fR is the default. |
|
9230 .Ip "\fB\-mno-interrupts\fR" 4 |
|
9231 .IX Item "-mno-interrupts" |
|
9232 Generated code is not compatible with hardware interrupts. |
|
9233 Code size will be smaller. |
|
9234 .Ip "\fB\-mcall-prologues\fR" 4 |
|
9235 .IX Item "-mcall-prologues" |
|
9236 Functions prologues/epilogues expanded as call to appropriate |
|
9237 subroutines. Code size will be smaller. |
|
9238 .Ip "\fB\-mno-tablejump\fR" 4 |
|
9239 .IX Item "-mno-tablejump" |
|
9240 Do not generate tablejump insns which sometimes increase code size. |
|
9241 .Ip "\fB\-mtiny-stack\fR" 4 |
|
9242 .IX Item "-mtiny-stack" |
|
9243 Change only the low 8 bits of the stack pointer. |
|
9244 .PP |
|
9245 .I "MCore Options" |
|
9246 .IX Subsection "MCore Options" |
|
9247 .PP |
|
9248 These are the \fB\-m\fR options defined for the Motorola M*Core |
|
9249 processors. |
|
9250 .Ip "\fB\-mhardlit\fR" 4 |
|
9251 .IX Item "-mhardlit" |
|
9252 .PD 0 |
|
9253 .Ip "\fB\-mno-hardlit\fR" 4 |
|
9254 .IX Item "-mno-hardlit" |
|
9255 .PD |
|
9256 Inline constants into the code stream if it can be done in two |
|
9257 instructions or less. |
|
9258 .Ip "\fB\-mdiv\fR" 4 |
|
9259 .IX Item "-mdiv" |
|
9260 .PD 0 |
|
9261 .Ip "\fB\-mno-div\fR" 4 |
|
9262 .IX Item "-mno-div" |
|
9263 .PD |
|
9264 Use the divide instruction. (Enabled by default). |
|
9265 .Ip "\fB\-mrelax-immediate\fR" 4 |
|
9266 .IX Item "-mrelax-immediate" |
|
9267 .PD 0 |
|
9268 .Ip "\fB\-mno-relax-immediate\fR" 4 |
|
9269 .IX Item "-mno-relax-immediate" |
|
9270 .PD |
|
9271 Allow arbitrary sized immediates in bit operations. |
|
9272 .Ip "\fB\-mwide-bitfields\fR" 4 |
|
9273 .IX Item "-mwide-bitfields" |
|
9274 .PD 0 |
|
9275 .Ip "\fB\-mno-wide-bitfields\fR" 4 |
|
9276 .IX Item "-mno-wide-bitfields" |
|
9277 .PD |
|
9278 Always treat bit-fields as int-sized. |
|
9279 .Ip "\fB\-m4byte-functions\fR" 4 |
|
9280 .IX Item "-m4byte-functions" |
|
9281 .PD 0 |
|
9282 .Ip "\fB\-mno-4byte-functions\fR" 4 |
|
9283 .IX Item "-mno-4byte-functions" |
|
9284 .PD |
|
9285 Force all functions to be aligned to a four byte boundary. |
|
9286 .Ip "\fB\-mcallgraph-data\fR" 4 |
|
9287 .IX Item "-mcallgraph-data" |
|
9288 .PD 0 |
|
9289 .Ip "\fB\-mno-callgraph-data\fR" 4 |
|
9290 .IX Item "-mno-callgraph-data" |
|
9291 .PD |
|
9292 Emit callgraph information. |
|
9293 .Ip "\fB\-mslow-bytes\fR" 4 |
|
9294 .IX Item "-mslow-bytes" |
|
9295 .PD 0 |
|
9296 .Ip "\fB\-mno-slow-bytes\fR" 4 |
|
9297 .IX Item "-mno-slow-bytes" |
|
9298 .PD |
|
9299 Prefer word access when reading byte quantities. |
|
9300 .Ip "\fB\-mlittle-endian\fR" 4 |
|
9301 .IX Item "-mlittle-endian" |
|
9302 .PD 0 |
|
9303 .Ip "\fB\-mbig-endian\fR" 4 |
|
9304 .IX Item "-mbig-endian" |
|
9305 .PD |
|
9306 Generate code for a little endian target. |
|
9307 .Ip "\fB\-m210\fR" 4 |
|
9308 .IX Item "-m210" |
|
9309 .PD 0 |
|
9310 .Ip "\fB\-m340\fR" 4 |
|
9311 .IX Item "-m340" |
|
9312 .PD |
|
9313 Generate code for the 210 processor. |
|
9314 .PP |
|
9315 .I "\s-1IA-64\s0 Options" |
|
9316 .IX Subsection "IA-64 Options" |
|
9317 .PP |
|
9318 These are the \fB\-m\fR options defined for the Intel \s-1IA-64\s0 architecture. |
|
9319 .Ip "\fB\-mbig-endian\fR" 4 |
|
9320 .IX Item "-mbig-endian" |
|
9321 Generate code for a big endian target. This is the default for \s-1HP-UX\s0. |
|
9322 .Ip "\fB\-mlittle-endian\fR" 4 |
|
9323 .IX Item "-mlittle-endian" |
|
9324 Generate code for a little endian target. This is the default for \s-1AIX5\s0 |
|
9325 and GNU/Linux. |
|
9326 .Ip "\fB\-mgnu-as\fR" 4 |
|
9327 .IX Item "-mgnu-as" |
|
9328 .PD 0 |
|
9329 .Ip "\fB\-mno-gnu-as\fR" 4 |
|
9330 .IX Item "-mno-gnu-as" |
|
9331 .PD |
|
9332 Generate (or don't) code for the \s-1GNU\s0 assembler. This is the default. |
|
9333 .Ip "\fB\-mgnu-ld\fR" 4 |
|
9334 .IX Item "-mgnu-ld" |
|
9335 .PD 0 |
|
9336 .Ip "\fB\-mno-gnu-ld\fR" 4 |
|
9337 .IX Item "-mno-gnu-ld" |
|
9338 .PD |
|
9339 Generate (or don't) code for the \s-1GNU\s0 linker. This is the default. |
|
9340 .Ip "\fB\-mno-pic\fR" 4 |
|
9341 .IX Item "-mno-pic" |
|
9342 Generate code that does not use a global pointer register. The result |
|
9343 is not position independent code, and violates the \s-1IA-64\s0 \s-1ABI\s0. |
|
9344 .Ip "\fB\-mvolatile-asm-stop\fR" 4 |
|
9345 .IX Item "-mvolatile-asm-stop" |
|
9346 .PD 0 |
|
9347 .Ip "\fB\-mno-volatile-asm-stop\fR" 4 |
|
9348 .IX Item "-mno-volatile-asm-stop" |
|
9349 .PD |
|
9350 Generate (or don't) a stop bit immediately before and after volatile asm |
|
9351 statements. |
|
9352 .Ip "\fB\-mb-step\fR" 4 |
|
9353 .IX Item "-mb-step" |
|
9354 Generate code that works around Itanium B step errata. |
|
9355 .Ip "\fB\-mregister-names\fR" 4 |
|
9356 .IX Item "-mregister-names" |
|
9357 .PD 0 |
|
9358 .Ip "\fB\-mno-register-names\fR" 4 |
|
9359 .IX Item "-mno-register-names" |
|
9360 .PD |
|
9361 Generate (or don't) \fBin\fR, \fBloc\fR, and \fBout\fR register names for |
|
9362 the stacked registers. This may make assembler output more readable. |
|
9363 .Ip "\fB\-mno-sdata\fR" 4 |
|
9364 .IX Item "-mno-sdata" |
|
9365 .PD 0 |
|
9366 .Ip "\fB\-msdata\fR" 4 |
|
9367 .IX Item "-msdata" |
|
9368 .PD |
|
9369 Disable (or enable) optimizations that use the small data section. This may |
|
9370 be useful for working around optimizer bugs. |
|
9371 .Ip "\fB\-mconstant-gp\fR" 4 |
|
9372 .IX Item "-mconstant-gp" |
|
9373 Generate code that uses a single constant global pointer value. This is |
|
9374 useful when compiling kernel code. |
|
9375 .Ip "\fB\-mauto-pic\fR" 4 |
|
9376 .IX Item "-mauto-pic" |
|
9377 Generate code that is self-relocatable. This implies \fB\-mconstant-gp\fR. |
|
9378 This is useful when compiling firmware code. |
|
9379 .Ip "\fB\-minline-float-divide-min-latency\fR" 4 |
|
9380 .IX Item "-minline-float-divide-min-latency" |
|
9381 Generate code for inline divides of floating point values |
|
9382 using the minimum latency algorithm. |
|
9383 .Ip "\fB\-minline-float-divide-max-throughput\fR" 4 |
|
9384 .IX Item "-minline-float-divide-max-throughput" |
|
9385 Generate code for inline divides of floating point values |
|
9386 using the maximum throughput algorithm. |
|
9387 .Ip "\fB\-minline-int-divide-min-latency\fR" 4 |
|
9388 .IX Item "-minline-int-divide-min-latency" |
|
9389 Generate code for inline divides of integer values |
|
9390 using the minimum latency algorithm. |
|
9391 .Ip "\fB\-minline-int-divide-max-throughput\fR" 4 |
|
9392 .IX Item "-minline-int-divide-max-throughput" |
|
9393 Generate code for inline divides of integer values |
|
9394 using the maximum throughput algorithm. |
|
9395 .Ip "\fB\-minline-sqrt-min-latency\fR" 4 |
|
9396 .IX Item "-minline-sqrt-min-latency" |
|
9397 Generate code for inline square roots |
|
9398 using the minimum latency algorithm. |
|
9399 .Ip "\fB\-minline-sqrt-max-throughput\fR" 4 |
|
9400 .IX Item "-minline-sqrt-max-throughput" |
|
9401 Generate code for inline square roots |
|
9402 using the maximum throughput algorithm. |
|
9403 .Ip "\fB\-mno-dwarf2\-asm\fR" 4 |
|
9404 .IX Item "-mno-dwarf2-asm" |
|
9405 .PD 0 |
|
9406 .Ip "\fB\-mdwarf2\-asm\fR" 4 |
|
9407 .IX Item "-mdwarf2-asm" |
|
9408 .PD |
|
9409 Don't (or do) generate assembler code for the \s-1DWARF2\s0 line number debugging |
|
9410 info. This may be useful when not using the \s-1GNU\s0 assembler. |
|
9411 .Ip "\fB\-mearly-stop-bits\fR" 4 |
|
9412 .IX Item "-mearly-stop-bits" |
|
9413 .PD 0 |
|
9414 .Ip "\fB\-mno-early-stop-bits\fR" 4 |
|
9415 .IX Item "-mno-early-stop-bits" |
|
9416 .PD |
|
9417 Allow stop bits to be placed earlier than immediately preceding the |
|
9418 instruction that triggered the stop bit. This can improve instruction |
|
9419 scheduling, but does not always do so. |
|
9420 .Ip "\fB\-mfixed-range=\fR\fIregister-range\fR" 4 |
|
9421 .IX Item "-mfixed-range=register-range" |
|
9422 Generate code treating the given register range as fixed registers. |
|
9423 A fixed register is one that the register allocator can not use. This is |
|
9424 useful when compiling kernel code. A register range is specified as |
|
9425 two registers separated by a dash. Multiple register ranges can be |
|
9426 specified separated by a comma. |
|
9427 .Ip "\fB\-mtls-size=\fR\fItls-size\fR" 4 |
|
9428 .IX Item "-mtls-size=tls-size" |
|
9429 Specify bit size of immediate \s-1TLS\s0 offsets. Valid values are 14, 22, and |
|
9430 64. |
|
9431 .Ip "\fB\-mtune=\fR\fIcpu-type\fR" 4 |
|
9432 .IX Item "-mtune=cpu-type" |
|
9433 Tune the instruction scheduling for a particular \s-1CPU\s0, Valid values are |
|
9434 itanium, itanium1, merced, itanium2, and mckinley. |
|
9435 .Ip "\fB\-mt\fR" 4 |
|
9436 .IX Item "-mt" |
|
9437 .PD 0 |
|
9438 .Ip "\fB\-pthread\fR" 4 |
|
9439 .IX Item "-pthread" |
|
9440 .PD |
|
9441 Add support for multithreading using the \s-1POSIX\s0 threads library. This |
|
9442 option sets flags for both the preprocessor and linker. It does |
|
9443 not affect the thread safety of object code produced by the compiler or |
|
9444 that of libraries supplied with it. These are \s-1HP-UX\s0 specific flags. |
|
9445 .Ip "\fB\-milp32\fR" 4 |
|
9446 .IX Item "-milp32" |
|
9447 .PD 0 |
|
9448 .Ip "\fB\-mlp64\fR" 4 |
|
9449 .IX Item "-mlp64" |
|
9450 .PD |
|
9451 Generate code for a 32\-bit or 64\-bit environment. |
|
9452 The 32\-bit environment sets int, long and pointer to 32 bits. |
|
9453 The 64\-bit environment sets int to 32 bits and long and pointer |
|
9454 to 64 bits. These are \s-1HP-UX\s0 specific flags. |
|
9455 .PP |
|
9456 .I "D30V Options" |
|
9457 .IX Subsection "D30V Options" |
|
9458 .PP |
|
9459 These \fB\-m\fR options are defined for D30V implementations: |
|
9460 .Ip "\fB\-mextmem\fR" 4 |
|
9461 .IX Item "-mextmem" |
|
9462 Link the \fB.text\fR, \fB.data\fR, \fB.bss\fR, \fB.strings\fR, |
|
9463 \&\fB.rodata\fR, \fB.rodata1\fR, \fB.data1\fR sections into external |
|
9464 memory, which starts at location \f(CW\*(C`0x80000000\*(C'\fR. |
|
9465 .Ip "\fB\-mextmemory\fR" 4 |
|
9466 .IX Item "-mextmemory" |
|
9467 Same as the \fB\-mextmem\fR switch. |
|
9468 .Ip "\fB\-monchip\fR" 4 |
|
9469 .IX Item "-monchip" |
|
9470 Link the \fB.text\fR section into onchip text memory, which starts at |
|
9471 location \f(CW\*(C`0x0\*(C'\fR. Also link \fB.data\fR, \fB.bss\fR, |
|
9472 \&\fB.strings\fR, \fB.rodata\fR, \fB.rodata1\fR, \fB.data1\fR sections |
|
9473 into onchip data memory, which starts at location \f(CW\*(C`0x20000000\*(C'\fR. |
|
9474 .Ip "\fB\-mno-asm-optimize\fR" 4 |
|
9475 .IX Item "-mno-asm-optimize" |
|
9476 .PD 0 |
|
9477 .Ip "\fB\-masm-optimize\fR" 4 |
|
9478 .IX Item "-masm-optimize" |
|
9479 .PD |
|
9480 Disable (enable) passing \fB\-O\fR to the assembler when optimizing. |
|
9481 The assembler uses the \fB\-O\fR option to automatically parallelize |
|
9482 adjacent short instructions where possible. |
|
9483 .Ip "\fB\-mbranch-cost=\fR\fIn\fR" 4 |
|
9484 .IX Item "-mbranch-cost=n" |
|
9485 Increase the internal costs of branches to \fIn\fR. Higher costs means |
|
9486 that the compiler will issue more instructions to avoid doing a branch. |
|
9487 The default is 2. |
|
9488 .Ip "\fB\-mcond-exec=\fR\fIn\fR" 4 |
|
9489 .IX Item "-mcond-exec=n" |
|
9490 Specify the maximum number of conditionally executed instructions that |
|
9491 replace a branch. The default is 4. |
|
9492 .PP |
|
9493 .I "S/390 and zSeries Options" |
|
9494 .IX Subsection "S/390 and zSeries Options" |
|
9495 .PP |
|
9496 These are the \fB\-m\fR options defined for the S/390 and zSeries architecture. |
|
9497 .Ip "\fB\-mhard-float\fR" 4 |
|
9498 .IX Item "-mhard-float" |
|
9499 .PD 0 |
|
9500 .Ip "\fB\-msoft-float\fR" 4 |
|
9501 .IX Item "-msoft-float" |
|
9502 .PD |
|
9503 Use (do not use) the hardware floating-point instructions and registers |
|
9504 for floating-point operations. When \fB\-msoft-float\fR is specified, |
|
9505 functions in \fIlibgcc.a\fR will be used to perform floating-point |
|
9506 operations. When \fB\-mhard-float\fR is specified, the compiler |
|
9507 generates \s-1IEEE\s0 floating-point instructions. This is the default. |
|
9508 .Ip "\fB\-mbackchain\fR" 4 |
|
9509 .IX Item "-mbackchain" |
|
9510 .PD 0 |
|
9511 .Ip "\fB\-mno-backchain\fR" 4 |
|
9512 .IX Item "-mno-backchain" |
|
9513 .PD |
|
9514 Generate (or do not generate) code which maintains an explicit |
|
9515 backchain within the stack frame that points to the caller's frame. |
|
9516 This may be needed to allow debugging using tools that do not understand |
|
9517 \&\s-1DWARF-2\s0 call frame information. The default is not to generate the |
|
9518 backchain. |
|
9519 .Ip "\fB\-msmall-exec\fR" 4 |
|
9520 .IX Item "-msmall-exec" |
|
9521 .PD 0 |
|
9522 .Ip "\fB\-mno-small-exec\fR" 4 |
|
9523 .IX Item "-mno-small-exec" |
|
9524 .PD |
|
9525 Generate (or do not generate) code using the \f(CW\*(C`bras\*(C'\fR instruction |
|
9526 to do subroutine calls. |
|
9527 This only works reliably if the total executable size does not |
|
9528 exceed 64k. The default is to use the \f(CW\*(C`basr\*(C'\fR instruction instead, |
|
9529 which does not have this limitation. |
|
9530 .Ip "\fB\-m64\fR" 4 |
|
9531 .IX Item "-m64" |
|
9532 .PD 0 |
|
9533 .Ip "\fB\-m31\fR" 4 |
|
9534 .IX Item "-m31" |
|
9535 .PD |
|
9536 When \fB\-m31\fR is specified, generate code compliant to the |
|
9537 GNU/Linux for S/390 \s-1ABI\s0. When \fB\-m64\fR is specified, generate |
|
9538 code compliant to the GNU/Linux for zSeries \s-1ABI\s0. This allows \s-1GCC\s0 in |
|
9539 particular to generate 64\-bit instructions. For the \fBs390\fR |
|
9540 targets, the default is \fB\-m31\fR, while the \fBs390x\fR |
|
9541 targets default to \fB\-m64\fR. |
|
9542 .Ip "\fB\-mzarch\fR" 4 |
|
9543 .IX Item "-mzarch" |
|
9544 .PD 0 |
|
9545 .Ip "\fB\-mesa\fR" 4 |
|
9546 .IX Item "-mesa" |
|
9547 .PD |
|
9548 When \fB\-mzarch\fR is specified, generate code using the |
|
9549 instructions available on z/Architecture. |
|
9550 When \fB\-mesa\fR is specified, generate code using the |
|
9551 instructions available on \s-1ESA/390\s0. Note that \fB\-mesa\fR is |
|
9552 not possible with \fB\-m64\fR. |
|
9553 When generating code compliant to the GNU/Linux for S/390 \s-1ABI\s0, |
|
9554 the default is \fB\-mesa\fR. When generating code compliant |
|
9555 to the GNU/Linux for zSeries \s-1ABI\s0, the default is \fB\-mzarch\fR. |
|
9556 .Ip "\fB\-mmvcle\fR" 4 |
|
9557 .IX Item "-mmvcle" |
|
9558 .PD 0 |
|
9559 .Ip "\fB\-mno-mvcle\fR" 4 |
|
9560 .IX Item "-mno-mvcle" |
|
9561 .PD |
|
9562 Generate (or do not generate) code using the \f(CW\*(C`mvcle\*(C'\fR instruction |
|
9563 to perform block moves. When \fB\-mno-mvcle\fR is specified, |
|
9564 use a \f(CW\*(C`mvc\*(C'\fR loop instead. This is the default. |
|
9565 .Ip "\fB\-mdebug\fR" 4 |
|
9566 .IX Item "-mdebug" |
|
9567 .PD 0 |
|
9568 .Ip "\fB\-mno-debug\fR" 4 |
|
9569 .IX Item "-mno-debug" |
|
9570 .PD |
|
9571 Print (or do not print) additional debug information when compiling. |
|
9572 The default is to not print debug information. |
|
9573 .Ip "\fB\-march=\fR\fIcpu-type\fR" 4 |
|
9574 .IX Item "-march=cpu-type" |
|
9575 Generate code that will run on \fIcpu-type\fR, which is the name of a system |
|
9576 representing a certain processor type. Possible values for |
|
9577 \&\fIcpu-type\fR are \fBg5\fR, \fBg6\fR, \fBz900\fR, and \fBz990\fR. |
|
9578 When generating code using the instructions available on z/Architecture, |
|
9579 the default is \fB\-march=z900\fR. Otherwise, the default is |
|
9580 \&\fB\-march=g5\fR. |
|
9581 .Ip "\fB\-mtune=\fR\fIcpu-type\fR" 4 |
|
9582 .IX Item "-mtune=cpu-type" |
|
9583 Tune to \fIcpu-type\fR everything applicable about the generated code, |
|
9584 except for the \s-1ABI\s0 and the set of available instructions. |
|
9585 The list of \fIcpu-type\fR values is the same as for \fB\-march\fR. |
|
9586 The default is the value used for \fB\-march\fR. |
|
9587 .Ip "\fB\-mfused-madd\fR" 4 |
|
9588 .IX Item "-mfused-madd" |
|
9589 .PD 0 |
|
9590 .Ip "\fB\-mno-fused-madd\fR" 4 |
|
9591 .IX Item "-mno-fused-madd" |
|
9592 .PD |
|
9593 Generate code that uses (does not use) the floating point multiply and |
|
9594 accumulate instructions. These instructions are generated by default if |
|
9595 hardware floating point is used. |
|
9596 .PP |
|
9597 .I "\s-1CRIS\s0 Options" |
|
9598 .IX Subsection "CRIS Options" |
|
9599 .PP |
|
9600 These options are defined specifically for the \s-1CRIS\s0 ports. |
|
9601 .Ip "\fB\-march=\fR\fIarchitecture-type\fR" 4 |
|
9602 .IX Item "-march=architecture-type" |
|
9603 .PD 0 |
|
9604 .Ip "\fB\-mcpu=\fR\fIarchitecture-type\fR" 4 |
|
9605 .IX Item "-mcpu=architecture-type" |
|
9606 .PD |
|
9607 Generate code for the specified architecture. The choices for |
|
9608 \&\fIarchitecture-type\fR are \fBv3\fR, \fBv8\fR and \fBv10\fR for |
|
9609 respectively \s-1ETRAX\s0\ 4, \s-1ETRAX\s0\ 100, and \s-1ETRAX\s0\ 100\ \s-1LX\s0. |
|
9610 Default is \fBv0\fR except for cris-axis-linux-gnu, where the default is |
|
9611 \&\fBv10\fR. |
|
9612 .Ip "\fB\-mtune=\fR\fIarchitecture-type\fR" 4 |
|
9613 .IX Item "-mtune=architecture-type" |
|
9614 Tune to \fIarchitecture-type\fR everything applicable about the generated |
|
9615 code, except for the \s-1ABI\s0 and the set of available instructions. The |
|
9616 choices for \fIarchitecture-type\fR are the same as for |
|
9617 \&\fB\-march=\fR\fIarchitecture-type\fR. |
|
9618 .Ip "\fB\-mmax-stack-frame=\fR\fIn\fR" 4 |
|
9619 .IX Item "-mmax-stack-frame=n" |
|
9620 Warn when the stack frame of a function exceeds \fIn\fR bytes. |
|
9621 .Ip "\fB\-melinux-stacksize=\fR\fIn\fR" 4 |
|
9622 .IX Item "-melinux-stacksize=n" |
|
9623 Only available with the \fBcris-axis-aout\fR target. Arranges for |
|
9624 indications in the program to the kernel loader that the stack of the |
|
9625 program should be set to \fIn\fR bytes. |
|
9626 .Ip "\fB\-metrax4\fR" 4 |
|
9627 .IX Item "-metrax4" |
|
9628 .PD 0 |
|
9629 .Ip "\fB\-metrax100\fR" 4 |
|
9630 .IX Item "-metrax100" |
|
9631 .PD |
|
9632 The options \fB\-metrax4\fR and \fB\-metrax100\fR are synonyms for |
|
9633 \&\fB\-march=v3\fR and \fB\-march=v8\fR respectively. |
|
9634 .Ip "\fB\-mmul-bug-workaround\fR" 4 |
|
9635 .IX Item "-mmul-bug-workaround" |
|
9636 .PD 0 |
|
9637 .Ip "\fB\-mno-mul-bug-workaround\fR" 4 |
|
9638 .IX Item "-mno-mul-bug-workaround" |
|
9639 .PD |
|
9640 Work around a bug in the \f(CW\*(C`muls\*(C'\fR and \f(CW\*(C`mulu\*(C'\fR instructions for \s-1CPU\s0 |
|
9641 models where it applies. This option is active by default. |
|
9642 .Ip "\fB\-mpdebug\fR" 4 |
|
9643 .IX Item "-mpdebug" |
|
9644 Enable CRIS-specific verbose debug-related information in the assembly |
|
9645 code. This option also has the effect to turn off the \fB#NO_APP\fR |
|
9646 formatted-code indicator to the assembler at the beginning of the |
|
9647 assembly file. |
|
9648 .Ip "\fB\-mcc-init\fR" 4 |
|
9649 .IX Item "-mcc-init" |
|
9650 Do not use condition-code results from previous instruction; always emit |
|
9651 compare and test instructions before use of condition codes. |
|
9652 .Ip "\fB\-mno-side-effects\fR" 4 |
|
9653 .IX Item "-mno-side-effects" |
|
9654 Do not emit instructions with side-effects in addressing modes other than |
|
9655 post-increment. |
|
9656 .Ip "\fB\-mstack-align\fR" 4 |
|
9657 .IX Item "-mstack-align" |
|
9658 .PD 0 |
|
9659 .Ip "\fB\-mno-stack-align\fR" 4 |
|
9660 .IX Item "-mno-stack-align" |
|
9661 .Ip "\fB\-mdata-align\fR" 4 |
|
9662 .IX Item "-mdata-align" |
|
9663 .Ip "\fB\-mno-data-align\fR" 4 |
|
9664 .IX Item "-mno-data-align" |
|
9665 .Ip "\fB\-mconst-align\fR" 4 |
|
9666 .IX Item "-mconst-align" |
|
9667 .Ip "\fB\-mno-const-align\fR" 4 |
|
9668 .IX Item "-mno-const-align" |
|
9669 .PD |
|
9670 These options (no-options) arranges (eliminate arrangements) for the |
|
9671 stack-frame, individual data and constants to be aligned for the maximum |
|
9672 single data access size for the chosen \s-1CPU\s0 model. The default is to |
|
9673 arrange for 32\-bit alignment. \s-1ABI\s0 details such as structure layout are |
|
9674 not affected by these options. |
|
9675 .Ip "\fB\-m32\-bit\fR" 4 |
|
9676 .IX Item "-m32-bit" |
|
9677 .PD 0 |
|
9678 .Ip "\fB\-m16\-bit\fR" 4 |
|
9679 .IX Item "-m16-bit" |
|
9680 .Ip "\fB\-m8\-bit\fR" 4 |
|
9681 .IX Item "-m8-bit" |
|
9682 .PD |
|
9683 Similar to the stack- data- and const-align options above, these options |
|
9684 arrange for stack-frame, writable data and constants to all be 32\-bit, |
|
9685 16\-bit or 8\-bit aligned. The default is 32\-bit alignment. |
|
9686 .Ip "\fB\-mno-prologue-epilogue\fR" 4 |
|
9687 .IX Item "-mno-prologue-epilogue" |
|
9688 .PD 0 |
|
9689 .Ip "\fB\-mprologue-epilogue\fR" 4 |
|
9690 .IX Item "-mprologue-epilogue" |
|
9691 .PD |
|
9692 With \fB\-mno-prologue-epilogue\fR, the normal function prologue and |
|
9693 epilogue that sets up the stack-frame are omitted and no return |
|
9694 instructions or return sequences are generated in the code. Use this |
|
9695 option only together with visual inspection of the compiled code: no |
|
9696 warnings or errors are generated when call-saved registers must be saved, |
|
9697 or storage for local variable needs to be allocated. |
|
9698 .Ip "\fB\-mno-gotplt\fR" 4 |
|
9699 .IX Item "-mno-gotplt" |
|
9700 .PD 0 |
|
9701 .Ip "\fB\-mgotplt\fR" 4 |
|
9702 .IX Item "-mgotplt" |
|
9703 .PD |
|
9704 With \fB\-fpic\fR and \fB\-fPIC\fR, don't generate (do generate) |
|
9705 instruction sequences that load addresses for functions from the \s-1PLT\s0 part |
|
9706 of the \s-1GOT\s0 rather than (traditional on other architectures) calls to the |
|
9707 \&\s-1PLT\s0. The default is \fB\-mgotplt\fR. |
|
9708 .Ip "\fB\-maout\fR" 4 |
|
9709 .IX Item "-maout" |
|
9710 Legacy no-op option only recognized with the cris-axis-aout target. |
|
9711 .Ip "\fB\-melf\fR" 4 |
|
9712 .IX Item "-melf" |
|
9713 Legacy no-op option only recognized with the cris-axis-elf and |
|
9714 cris-axis-linux-gnu targets. |
|
9715 .Ip "\fB\-melinux\fR" 4 |
|
9716 .IX Item "-melinux" |
|
9717 Only recognized with the cris-axis-aout target, where it selects a |
|
9718 GNU/linux-like multilib, include files and instruction set for |
|
9719 \&\fB\-march=v8\fR. |
|
9720 .Ip "\fB\-mlinux\fR" 4 |
|
9721 .IX Item "-mlinux" |
|
9722 Legacy no-op option only recognized with the cris-axis-linux-gnu target. |
|
9723 .Ip "\fB\-sim\fR" 4 |
|
9724 .IX Item "-sim" |
|
9725 This option, recognized for the cris-axis-aout and cris-axis-elf arranges |
|
9726 to link with input-output functions from a simulator library. Code, |
|
9727 initialized data and zero-initialized data are allocated consecutively. |
|
9728 .Ip "\fB\-sim2\fR" 4 |
|
9729 .IX Item "-sim2" |
|
9730 Like \fB\-sim\fR, but pass linker options to locate initialized data at |
|
9731 0x40000000 and zero-initialized data at 0x80000000. |
|
9732 .PP |
|
9733 .I "\s-1MMIX\s0 Options" |
|
9734 .IX Subsection "MMIX Options" |
|
9735 .PP |
|
9736 These options are defined for the \s-1MMIX:\s0 |
|
9737 .Ip "\fB\-mlibfuncs\fR" 4 |
|
9738 .IX Item "-mlibfuncs" |
|
9739 .PD 0 |
|
9740 .Ip "\fB\-mno-libfuncs\fR" 4 |
|
9741 .IX Item "-mno-libfuncs" |
|
9742 .PD |
|
9743 Specify that intrinsic library functions are being compiled, passing all |
|
9744 values in registers, no matter the size. |
|
9745 .Ip "\fB\-mepsilon\fR" 4 |
|
9746 .IX Item "-mepsilon" |
|
9747 .PD 0 |
|
9748 .Ip "\fB\-mno-epsilon\fR" 4 |
|
9749 .IX Item "-mno-epsilon" |
|
9750 .PD |
|
9751 Generate floating-point comparison instructions that compare with respect |
|
9752 to the \f(CW\*(C`rE\*(C'\fR epsilon register. |
|
9753 .Ip "\fB\-mabi=mmixware\fR" 4 |
|
9754 .IX Item "-mabi=mmixware" |
|
9755 .PD 0 |
|
9756 .Ip "\fB\-mabi=gnu\fR" 4 |
|
9757 .IX Item "-mabi=gnu" |
|
9758 .PD |
|
9759 Generate code that passes function parameters and return values that (in |
|
9760 the called function) are seen as registers \f(CW\*(C`$0\*(C'\fR and up, as opposed to |
|
9761 the \s-1GNU\s0 \s-1ABI\s0 which uses global registers \f(CW\*(C`$231\*(C'\fR and up. |
|
9762 .Ip "\fB\-mzero-extend\fR" 4 |
|
9763 .IX Item "-mzero-extend" |
|
9764 .PD 0 |
|
9765 .Ip "\fB\-mno-zero-extend\fR" 4 |
|
9766 .IX Item "-mno-zero-extend" |
|
9767 .PD |
|
9768 When reading data from memory in sizes shorter than 64 bits, use (do not |
|
9769 use) zero-extending load instructions by default, rather than |
|
9770 sign-extending ones. |
|
9771 .Ip "\fB\-mknuthdiv\fR" 4 |
|
9772 .IX Item "-mknuthdiv" |
|
9773 .PD 0 |
|
9774 .Ip "\fB\-mno-knuthdiv\fR" 4 |
|
9775 .IX Item "-mno-knuthdiv" |
|
9776 .PD |
|
9777 Make the result of a division yielding a remainder have the same sign as |
|
9778 the divisor. With the default, \fB\-mno-knuthdiv\fR, the sign of the |
|
9779 remainder follows the sign of the dividend. Both methods are |
|
9780 arithmetically valid, the latter being almost exclusively used. |
|
9781 .Ip "\fB\-mtoplevel-symbols\fR" 4 |
|
9782 .IX Item "-mtoplevel-symbols" |
|
9783 .PD 0 |
|
9784 .Ip "\fB\-mno-toplevel-symbols\fR" 4 |
|
9785 .IX Item "-mno-toplevel-symbols" |
|
9786 .PD |
|
9787 Prepend (do not prepend) a \fB:\fR to all global symbols, so the assembly |
|
9788 code can be used with the \f(CW\*(C`PREFIX\*(C'\fR assembly directive. |
|
9789 .Ip "\fB\-melf\fR" 4 |
|
9790 .IX Item "-melf" |
|
9791 Generate an executable in the \s-1ELF\s0 format, rather than the default |
|
9792 \&\fBmmo\fR format used by the \fBmmix\fR simulator. |
|
9793 .Ip "\fB\-mbranch-predict\fR" 4 |
|
9794 .IX Item "-mbranch-predict" |
|
9795 .PD 0 |
|
9796 .Ip "\fB\-mno-branch-predict\fR" 4 |
|
9797 .IX Item "-mno-branch-predict" |
|
9798 .PD |
|
9799 Use (do not use) the probable-branch instructions, when static branch |
|
9800 prediction indicates a probable branch. |
|
9801 .Ip "\fB\-mbase-addresses\fR" 4 |
|
9802 .IX Item "-mbase-addresses" |
|
9803 .PD 0 |
|
9804 .Ip "\fB\-mno-base-addresses\fR" 4 |
|
9805 .IX Item "-mno-base-addresses" |
|
9806 .PD |
|
9807 Generate (do not generate) code that uses \fIbase addresses\fR. Using a |
|
9808 base address automatically generates a request (handled by the assembler |
|
9809 and the linker) for a constant to be set up in a global register. The |
|
9810 register is used for one or more base address requests within the range 0 |
|
9811 to 255 from the value held in the register. The generally leads to short |
|
9812 and fast code, but the number of different data items that can be |
|
9813 addressed is limited. This means that a program that uses lots of static |
|
9814 data may require \fB\-mno-base-addresses\fR. |
|
9815 .Ip "\fB\-msingle-exit\fR" 4 |
|
9816 .IX Item "-msingle-exit" |
|
9817 .PD 0 |
|
9818 .Ip "\fB\-mno-single-exit\fR" 4 |
|
9819 .IX Item "-mno-single-exit" |
|
9820 .PD |
|
9821 Force (do not force) generated code to have a single exit point in each |
|
9822 function. |
|
9823 .PP |
|
9824 .I "\s-1PDP-11\s0 Options" |
|
9825 .IX Subsection "PDP-11 Options" |
|
9826 .PP |
|
9827 These options are defined for the \s-1PDP-11:\s0 |
|
9828 .Ip "\fB\-mfpu\fR" 4 |
|
9829 .IX Item "-mfpu" |
|
9830 Use hardware \s-1FPP\s0 floating point. This is the default. (\s-1FIS\s0 floating |
|
9831 point on the \s-1PDP-11/40\s0 is not supported.) |
|
9832 .Ip "\fB\-msoft-float\fR" 4 |
|
9833 .IX Item "-msoft-float" |
|
9834 Do not use hardware floating point. |
|
9835 .Ip "\fB\-mac0\fR" 4 |
|
9836 .IX Item "-mac0" |
|
9837 Return floating-point results in ac0 (fr0 in Unix assembler syntax). |
|
9838 .Ip "\fB\-mno-ac0\fR" 4 |
|
9839 .IX Item "-mno-ac0" |
|
9840 Return floating-point results in memory. This is the default. |
|
9841 .Ip "\fB\-m40\fR" 4 |
|
9842 .IX Item "-m40" |
|
9843 Generate code for a \s-1PDP-11/40\s0. |
|
9844 .Ip "\fB\-m45\fR" 4 |
|
9845 .IX Item "-m45" |
|
9846 Generate code for a \s-1PDP-11/45\s0. This is the default. |
|
9847 .Ip "\fB\-m10\fR" 4 |
|
9848 .IX Item "-m10" |
|
9849 Generate code for a \s-1PDP-11/10\s0. |
|
9850 .Ip "\fB\-mbcopy-builtin\fR" 4 |
|
9851 .IX Item "-mbcopy-builtin" |
|
9852 Use inline \f(CW\*(C`movstrhi\*(C'\fR patterns for copying memory. This is the |
|
9853 default. |
|
9854 .Ip "\fB\-mbcopy\fR" 4 |
|
9855 .IX Item "-mbcopy" |
|
9856 Do not use inline \f(CW\*(C`movstrhi\*(C'\fR patterns for copying memory. |
|
9857 .Ip "\fB\-mint16\fR" 4 |
|
9858 .IX Item "-mint16" |
|
9859 .PD 0 |
|
9860 .Ip "\fB\-mno-int32\fR" 4 |
|
9861 .IX Item "-mno-int32" |
|
9862 .PD |
|
9863 Use 16\-bit \f(CW\*(C`int\*(C'\fR. This is the default. |
|
9864 .Ip "\fB\-mint32\fR" 4 |
|
9865 .IX Item "-mint32" |
|
9866 .PD 0 |
|
9867 .Ip "\fB\-mno-int16\fR" 4 |
|
9868 .IX Item "-mno-int16" |
|
9869 .PD |
|
9870 Use 32\-bit \f(CW\*(C`int\*(C'\fR. |
|
9871 .Ip "\fB\-mfloat64\fR" 4 |
|
9872 .IX Item "-mfloat64" |
|
9873 .PD 0 |
|
9874 .Ip "\fB\-mno-float32\fR" 4 |
|
9875 .IX Item "-mno-float32" |
|
9876 .PD |
|
9877 Use 64\-bit \f(CW\*(C`float\*(C'\fR. This is the default. |
|
9878 .Ip "\fB\-mfloat32\fR" 4 |
|
9879 .IX Item "-mfloat32" |
|
9880 .PD 0 |
|
9881 .Ip "\fB\-mno-float64\fR" 4 |
|
9882 .IX Item "-mno-float64" |
|
9883 .PD |
|
9884 Use 32\-bit \f(CW\*(C`float\*(C'\fR. |
|
9885 .Ip "\fB\-mabshi\fR" 4 |
|
9886 .IX Item "-mabshi" |
|
9887 Use \f(CW\*(C`abshi2\*(C'\fR pattern. This is the default. |
|
9888 .Ip "\fB\-mno-abshi\fR" 4 |
|
9889 .IX Item "-mno-abshi" |
|
9890 Do not use \f(CW\*(C`abshi2\*(C'\fR pattern. |
|
9891 .Ip "\fB\-mbranch-expensive\fR" 4 |
|
9892 .IX Item "-mbranch-expensive" |
|
9893 Pretend that branches are expensive. This is for experimenting with |
|
9894 code generation only. |
|
9895 .Ip "\fB\-mbranch-cheap\fR" 4 |
|
9896 .IX Item "-mbranch-cheap" |
|
9897 Do not pretend that branches are expensive. This is the default. |
|
9898 .Ip "\fB\-msplit\fR" 4 |
|
9899 .IX Item "-msplit" |
|
9900 Generate code for a system with split I&D. |
|
9901 .Ip "\fB\-mno-split\fR" 4 |
|
9902 .IX Item "-mno-split" |
|
9903 Generate code for a system without split I&D. This is the default. |
|
9904 .Ip "\fB\-munix-asm\fR" 4 |
|
9905 .IX Item "-munix-asm" |
|
9906 Use Unix assembler syntax. This is the default when configured for |
|
9907 \&\fBpdp11\-*\-bsd\fR. |
|
9908 .Ip "\fB\-mdec-asm\fR" 4 |
|
9909 .IX Item "-mdec-asm" |
|
9910 Use \s-1DEC\s0 assembler syntax. This is the default when configured for any |
|
9911 \&\s-1PDP-11\s0 target other than \fBpdp11\-*\-bsd\fR. |
|
9912 .PP |
|
9913 .I "Xstormy16 Options" |
|
9914 .IX Subsection "Xstormy16 Options" |
|
9915 .PP |
|
9916 These options are defined for Xstormy16: |
|
9917 .Ip "\fB\-msim\fR" 4 |
|
9918 .IX Item "-msim" |
|
9919 Choose startup files and linker script suitable for the simulator. |
|
9920 .PP |
|
9921 .I "\s-1FRV\s0 Options" |
|
9922 .IX Subsection "FRV Options" |
|
9923 .Ip "\fB\-mgpr-32\fR" 4 |
|
9924 .IX Item "-mgpr-32" |
|
9925 Only use the first 32 general purpose registers. |
|
9926 .Ip "\fB\-mgpr-64\fR" 4 |
|
9927 .IX Item "-mgpr-64" |
|
9928 Use all 64 general purpose registers. |
|
9929 .Ip "\fB\-mfpr-32\fR" 4 |
|
9930 .IX Item "-mfpr-32" |
|
9931 Use only the first 32 floating point registers. |
|
9932 .Ip "\fB\-mfpr-64\fR" 4 |
|
9933 .IX Item "-mfpr-64" |
|
9934 Use all 64 floating point registers |
|
9935 .Ip "\fB\-mhard-float\fR" 4 |
|
9936 .IX Item "-mhard-float" |
|
9937 Use hardware instructions for floating point operations. |
|
9938 .Ip "\fB\-msoft-float\fR" 4 |
|
9939 .IX Item "-msoft-float" |
|
9940 Use library routines for floating point operations. |
|
9941 .Ip "\fB\-malloc-cc\fR" 4 |
|
9942 .IX Item "-malloc-cc" |
|
9943 Dynamically allocate condition code registers. |
|
9944 .Ip "\fB\-mfixed-cc\fR" 4 |
|
9945 .IX Item "-mfixed-cc" |
|
9946 Do not try to dynamically allocate condition code registers, only |
|
9947 use \f(CW\*(C`icc0\*(C'\fR and \f(CW\*(C`fcc0\*(C'\fR. |
|
9948 .Ip "\fB\-mdword\fR" 4 |
|
9949 .IX Item "-mdword" |
|
9950 Change \s-1ABI\s0 to use double word insns. |
|
9951 .Ip "\fB\-mno-dword\fR" 4 |
|
9952 .IX Item "-mno-dword" |
|
9953 Do not use double word instructions. |
|
9954 .Ip "\fB\-mdouble\fR" 4 |
|
9955 .IX Item "-mdouble" |
|
9956 Use floating point double instructions. |
|
9957 .Ip "\fB\-mno-double\fR" 4 |
|
9958 .IX Item "-mno-double" |
|
9959 Do not use floating point double instructions. |
|
9960 .Ip "\fB\-mmedia\fR" 4 |
|
9961 .IX Item "-mmedia" |
|
9962 Use media instructions. |
|
9963 .Ip "\fB\-mno-media\fR" 4 |
|
9964 .IX Item "-mno-media" |
|
9965 Do not use media instructions. |
|
9966 .Ip "\fB\-mmuladd\fR" 4 |
|
9967 .IX Item "-mmuladd" |
|
9968 Use multiply and add/subtract instructions. |
|
9969 .Ip "\fB\-mno-muladd\fR" 4 |
|
9970 .IX Item "-mno-muladd" |
|
9971 Do not use multiply and add/subtract instructions. |
|
9972 .Ip "\fB\-mlibrary-pic\fR" 4 |
|
9973 .IX Item "-mlibrary-pic" |
|
9974 Enable \s-1PIC\s0 support for building libraries |
|
9975 .Ip "\fB\-macc-4\fR" 4 |
|
9976 .IX Item "-macc-4" |
|
9977 Use only the first four media accumulator registers. |
|
9978 .Ip "\fB\-macc-8\fR" 4 |
|
9979 .IX Item "-macc-8" |
|
9980 Use all eight media accumulator registers. |
|
9981 .Ip "\fB\-mpack\fR" 4 |
|
9982 .IX Item "-mpack" |
|
9983 Pack \s-1VLIW\s0 instructions. |
|
9984 .Ip "\fB\-mno-pack\fR" 4 |
|
9985 .IX Item "-mno-pack" |
|
9986 Do not pack \s-1VLIW\s0 instructions. |
|
9987 .Ip "\fB\-mno-eflags\fR" 4 |
|
9988 .IX Item "-mno-eflags" |
|
9989 Do not mark \s-1ABI\s0 switches in e_flags. |
|
9990 .Ip "\fB\-mcond-move\fR" 4 |
|
9991 .IX Item "-mcond-move" |
|
9992 Enable the use of conditional-move instructions (default). |
|
9993 .Sp |
|
9994 This switch is mainly for debugging the compiler and will likely be removed |
|
9995 in a future version. |
|
9996 .Ip "\fB\-mno-cond-move\fR" 4 |
|
9997 .IX Item "-mno-cond-move" |
|
9998 Disable the use of conditional-move instructions. |
|
9999 .Sp |
|
10000 This switch is mainly for debugging the compiler and will likely be removed |
|
10001 in a future version. |
|
10002 .Ip "\fB\-mscc\fR" 4 |
|
10003 .IX Item "-mscc" |
|
10004 Enable the use of conditional set instructions (default). |
|
10005 .Sp |
|
10006 This switch is mainly for debugging the compiler and will likely be removed |
|
10007 in a future version. |
|
10008 .Ip "\fB\-mno-scc\fR" 4 |
|
10009 .IX Item "-mno-scc" |
|
10010 Disable the use of conditional set instructions. |
|
10011 .Sp |
|
10012 This switch is mainly for debugging the compiler and will likely be removed |
|
10013 in a future version. |
|
10014 .Ip "\fB\-mcond-exec\fR" 4 |
|
10015 .IX Item "-mcond-exec" |
|
10016 Enable the use of conditional execution (default). |
|
10017 .Sp |
|
10018 This switch is mainly for debugging the compiler and will likely be removed |
|
10019 in a future version. |
|
10020 .Ip "\fB\-mno-cond-exec\fR" 4 |
|
10021 .IX Item "-mno-cond-exec" |
|
10022 Disable the use of conditional execution. |
|
10023 .Sp |
|
10024 This switch is mainly for debugging the compiler and will likely be removed |
|
10025 in a future version. |
|
10026 .Ip "\fB\-mvliw-branch\fR" 4 |
|
10027 .IX Item "-mvliw-branch" |
|
10028 Run a pass to pack branches into \s-1VLIW\s0 instructions (default). |
|
10029 .Sp |
|
10030 This switch is mainly for debugging the compiler and will likely be removed |
|
10031 in a future version. |
|
10032 .Ip "\fB\-mno-vliw-branch\fR" 4 |
|
10033 .IX Item "-mno-vliw-branch" |
|
10034 Do not run a pass to pack branches into \s-1VLIW\s0 instructions. |
|
10035 .Sp |
|
10036 This switch is mainly for debugging the compiler and will likely be removed |
|
10037 in a future version. |
|
10038 .Ip "\fB\-mmulti-cond-exec\fR" 4 |
|
10039 .IX Item "-mmulti-cond-exec" |
|
10040 Enable optimization of \f(CW\*(C`&&\*(C'\fR and \f(CW\*(C`||\*(C'\fR in conditional execution |
|
10041 (default). |
|
10042 .Sp |
|
10043 This switch is mainly for debugging the compiler and will likely be removed |
|
10044 in a future version. |
|
10045 .Ip "\fB\-mno-multi-cond-exec\fR" 4 |
|
10046 .IX Item "-mno-multi-cond-exec" |
|
10047 Disable optimization of \f(CW\*(C`&&\*(C'\fR and \f(CW\*(C`||\*(C'\fR in conditional execution. |
|
10048 .Sp |
|
10049 This switch is mainly for debugging the compiler and will likely be removed |
|
10050 in a future version. |
|
10051 .Ip "\fB\-mnested-cond-exec\fR" 4 |
|
10052 .IX Item "-mnested-cond-exec" |
|
10053 Enable nested conditional execution optimizations (default). |
|
10054 .Sp |
|
10055 This switch is mainly for debugging the compiler and will likely be removed |
|
10056 in a future version. |
|
10057 .Ip "\fB\-mno-nested-cond-exec\fR" 4 |
|
10058 .IX Item "-mno-nested-cond-exec" |
|
10059 Disable nested conditional execution optimizations. |
|
10060 .Sp |
|
10061 This switch is mainly for debugging the compiler and will likely be removed |
|
10062 in a future version. |
|
10063 .Ip "\fB\-mtomcat-stats\fR" 4 |
|
10064 .IX Item "-mtomcat-stats" |
|
10065 Cause gas to print out tomcat statistics. |
|
10066 .Ip "\fB\-mcpu=\fR\fIcpu\fR" 4 |
|
10067 .IX Item "-mcpu=cpu" |
|
10068 Select the processor type for which to generate code. Possible values are |
|
10069 \&\fBsimple\fR, \fBtomcat\fR, \fBfr500\fR, \fBfr400\fR, \fBfr300\fR, |
|
10070 \&\fBfrv\fR. |
|
10071 .PP |
|
10072 .I "Xtensa Options" |
|
10073 .IX Subsection "Xtensa Options" |
|
10074 .PP |
|
10075 These options are supported for Xtensa targets: |
|
10076 .Ip "\fB\-mconst16\fR" 4 |
|
10077 .IX Item "-mconst16" |
|
10078 .PD 0 |
|
10079 .Ip "\fB\-mno-const16\fR" 4 |
|
10080 .IX Item "-mno-const16" |
|
10081 .PD |
|
10082 Enable or disable use of \f(CW\*(C`CONST16\*(C'\fR instructions for loading |
|
10083 constant values. The \f(CW\*(C`CONST16\*(C'\fR instruction is currently not a |
|
10084 standard option from Tensilica. When enabled, \f(CW\*(C`CONST16\*(C'\fR |
|
10085 instructions are always used in place of the standard \f(CW\*(C`L32R\*(C'\fR |
|
10086 instructions. The use of \f(CW\*(C`CONST16\*(C'\fR is enabled by default only if |
|
10087 the \f(CW\*(C`L32R\*(C'\fR instruction is not available. |
|
10088 .Ip "\fB\-mfused-madd\fR" 4 |
|
10089 .IX Item "-mfused-madd" |
|
10090 .PD 0 |
|
10091 .Ip "\fB\-mno-fused-madd\fR" 4 |
|
10092 .IX Item "-mno-fused-madd" |
|
10093 .PD |
|
10094 Enable or disable use of fused multiply/add and multiply/subtract |
|
10095 instructions in the floating-point option. This has no effect if the |
|
10096 floating-point option is not also enabled. Disabling fused multiply/add |
|
10097 and multiply/subtract instructions forces the compiler to use separate |
|
10098 instructions for the multiply and add/subtract operations. This may be |
|
10099 desirable in some cases where strict \s-1IEEE\s0 754\-compliant results are |
|
10100 required: the fused multiply add/subtract instructions do not round the |
|
10101 intermediate result, thereby producing results with \fImore\fR bits of |
|
10102 precision than specified by the \s-1IEEE\s0 standard. Disabling fused multiply |
|
10103 add/subtract instructions also ensures that the program output is not |
|
10104 sensitive to the compiler's ability to combine multiply and add/subtract |
|
10105 operations. |
|
10106 .Ip "\fB\-mtext-section-literals\fR" 4 |
|
10107 .IX Item "-mtext-section-literals" |
|
10108 .PD 0 |
|
10109 .Ip "\fB\-mno-text-section-literals\fR" 4 |
|
10110 .IX Item "-mno-text-section-literals" |
|
10111 .PD |
|
10112 Control the treatment of literal pools. The default is |
|
10113 \&\fB\-mno-text-section-literals\fR, which places literals in a separate |
|
10114 section in the output file. This allows the literal pool to be placed |
|
10115 in a data \s-1RAM/ROM\s0, and it also allows the linker to combine literal |
|
10116 pools from separate object files to remove redundant literals and |
|
10117 improve code size. With \fB\-mtext-section-literals\fR, the literals |
|
10118 are interspersed in the text section in order to keep them as close as |
|
10119 possible to their references. This may be necessary for large assembly |
|
10120 files. |
|
10121 .Ip "\fB\-mtarget-align\fR" 4 |
|
10122 .IX Item "-mtarget-align" |
|
10123 .PD 0 |
|
10124 .Ip "\fB\-mno-target-align\fR" 4 |
|
10125 .IX Item "-mno-target-align" |
|
10126 .PD |
|
10127 When this option is enabled, \s-1GCC\s0 instructs the assembler to |
|
10128 automatically align instructions to reduce branch penalties at the |
|
10129 expense of some code density. The assembler attempts to widen density |
|
10130 instructions to align branch targets and the instructions following call |
|
10131 instructions. If there are not enough preceding safe density |
|
10132 instructions to align a target, no widening will be performed. The |
|
10133 default is \fB\-mtarget-align\fR. These options do not affect the |
|
10134 treatment of auto-aligned instructions like \f(CW\*(C`LOOP\*(C'\fR, which the |
|
10135 assembler will always align, either by widening density instructions or |
|
10136 by inserting no-op instructions. |
|
10137 .Ip "\fB\-mlongcalls\fR" 4 |
|
10138 .IX Item "-mlongcalls" |
|
10139 .PD 0 |
|
10140 .Ip "\fB\-mno-longcalls\fR" 4 |
|
10141 .IX Item "-mno-longcalls" |
|
10142 .PD |
|
10143 When this option is enabled, \s-1GCC\s0 instructs the assembler to translate |
|
10144 direct calls to indirect calls unless it can determine that the target |
|
10145 of a direct call is in the range allowed by the call instruction. This |
|
10146 translation typically occurs for calls to functions in other source |
|
10147 files. Specifically, the assembler translates a direct \f(CW\*(C`CALL\*(C'\fR |
|
10148 instruction into an \f(CW\*(C`L32R\*(C'\fR followed by a \f(CW\*(C`CALLX\*(C'\fR instruction. |
|
10149 The default is \fB\-mno-longcalls\fR. This option should be used in |
|
10150 programs where the call target can potentially be out of range. This |
|
10151 option is implemented in the assembler, not the compiler, so the |
|
10152 assembly code generated by \s-1GCC\s0 will still show direct call |
|
10153 instructions\-\-\-look at the disassembled object code to see the actual |
|
10154 instructions. Note that the assembler will use an indirect call for |
|
10155 every cross-file call, not just those that really will be out of range. |
|
10156 .Sh "Options for Code Generation Conventions" |
|
10157 .IX Subsection "Options for Code Generation Conventions" |
|
10158 These machine-independent options control the interface conventions |
|
10159 used in code generation. |
|
10160 .PP |
|
10161 Most of them have both positive and negative forms; the negative form |
|
10162 of \fB\-ffoo\fR would be \fB\-fno-foo\fR. In the table below, only |
|
10163 one of the forms is listed\-\-\-the one which is not the default. You |
|
10164 can figure out the other form by either removing \fBno-\fR or adding |
|
10165 it. |
|
10166 .Ip "\fB\-fbounds-check\fR" 4 |
|
10167 .IX Item "-fbounds-check" |
|
10168 For front-ends that support it, generate additional code to check that |
|
10169 indices used to access arrays are within the declared range. This is |
|
10170 currently only supported by the Java and Fortran 77 front-ends, where |
|
10171 this option defaults to true and false respectively. |
|
10172 .Ip "\fB\-ftrapv\fR" 4 |
|
10173 .IX Item "-ftrapv" |
|
10174 This option generates traps for signed overflow on addition, subtraction, |
|
10175 multiplication operations. |
|
10176 .Ip "\fB\-fwrapv\fR" 4 |
|
10177 .IX Item "-fwrapv" |
|
10178 This option instructs the compiler to assume that signed arithmetic |
|
10179 overflow of addition, subtraction and multiplication wraps around |
|
10180 using twos-complement representation. This flag enables some optimizations |
|
10181 and disables other. This option is enabled by default for the Java |
|
10182 front-end, as required by the Java language specification. |
|
10183 .Ip "\fB\-fexceptions\fR" 4 |
|
10184 .IX Item "-fexceptions" |
|
10185 Enable exception handling. Generates extra code needed to propagate |
|
10186 exceptions. For some targets, this implies \s-1GCC\s0 will generate frame |
|
10187 unwind information for all functions, which can produce significant data |
|
10188 size overhead, although it does not affect execution. If you do not |
|
10189 specify this option, \s-1GCC\s0 will enable it by default for languages like |
|
10190 \&\*(C+ which normally require exception handling, and disable it for |
|
10191 languages like C that do not normally require it. However, you may need |
|
10192 to enable this option when compiling C code that needs to interoperate |
|
10193 properly with exception handlers written in \*(C+. You may also wish to |
|
10194 disable this option if you are compiling older \*(C+ programs that don't |
|
10195 use exception handling. |
|
10196 .Ip "\fB\-fnon-call-exceptions\fR" 4 |
|
10197 .IX Item "-fnon-call-exceptions" |
|
10198 Generate code that allows trapping instructions to throw exceptions. |
|
10199 Note that this requires platform-specific runtime support that does |
|
10200 not exist everywhere. Moreover, it only allows \fItrapping\fR |
|
10201 instructions to throw exceptions, i.e. memory references or floating |
|
10202 point instructions. It does not allow exceptions to be thrown from |
|
10203 arbitrary signal handlers such as \f(CW\*(C`SIGALRM\*(C'\fR. |
|
10204 .Ip "\fB\-funwind-tables\fR" 4 |
|
10205 .IX Item "-funwind-tables" |
|
10206 Similar to \fB\-fexceptions\fR, except that it will just generate any needed |
|
10207 static data, but will not affect the generated code in any other way. |
|
10208 You will normally not enable this option; instead, a language processor |
|
10209 that needs this handling would enable it on your behalf. |
|
10210 .Ip "\fB\-fasynchronous-unwind-tables\fR" 4 |
|
10211 .IX Item "-fasynchronous-unwind-tables" |
|
10212 Generate unwind table in dwarf2 format, if supported by target machine. The |
|
10213 table is exact at each instruction boundary, so it can be used for stack |
|
10214 unwinding from asynchronous events (such as debugger or garbage collector). |
|
10215 .Ip "\fB\-fpcc-struct-return\fR" 4 |
|
10216 .IX Item "-fpcc-struct-return" |
|
10217 Return ``short'' \f(CW\*(C`struct\*(C'\fR and \f(CW\*(C`union\*(C'\fR values in memory like |
|
10218 longer ones, rather than in registers. This convention is less |
|
10219 efficient, but it has the advantage of allowing intercallability between |
|
10220 GCC-compiled files and files compiled with other compilers, particularly |
|
10221 the Portable C Compiler (pcc). |
|
10222 .Sp |
|
10223 The precise convention for returning structures in memory depends |
|
10224 on the target configuration macros. |
|
10225 .Sp |
|
10226 Short structures and unions are those whose size and alignment match |
|
10227 that of some integer type. |
|
10228 .Sp |
|
10229 \&\fBWarning:\fR code compiled with the \fB\-fpcc-struct-return\fR |
|
10230 switch is not binary compatible with code compiled with the |
|
10231 \&\fB\-freg-struct-return\fR switch. |
|
10232 Use it to conform to a non-default application binary interface. |
|
10233 .Ip "\fB\-freg-struct-return\fR" 4 |
|
10234 .IX Item "-freg-struct-return" |
|
10235 Return \f(CW\*(C`struct\*(C'\fR and \f(CW\*(C`union\*(C'\fR values in registers when possible. |
|
10236 This is more efficient for small structures than |
|
10237 \&\fB\-fpcc-struct-return\fR. |
|
10238 .Sp |
|
10239 If you specify neither \fB\-fpcc-struct-return\fR nor |
|
10240 \&\fB\-freg-struct-return\fR, \s-1GCC\s0 defaults to whichever convention is |
|
10241 standard for the target. If there is no standard convention, \s-1GCC\s0 |
|
10242 defaults to \fB\-fpcc-struct-return\fR, except on targets where \s-1GCC\s0 is |
|
10243 the principal compiler. In those cases, we can choose the standard, and |
|
10244 we chose the more efficient register return alternative. |
|
10245 .Sp |
|
10246 \&\fBWarning:\fR code compiled with the \fB\-freg-struct-return\fR |
|
10247 switch is not binary compatible with code compiled with the |
|
10248 \&\fB\-fpcc-struct-return\fR switch. |
|
10249 Use it to conform to a non-default application binary interface. |
|
10250 .Ip "\fB\-fshort-enums\fR" 4 |
|
10251 .IX Item "-fshort-enums" |
|
10252 Allocate to an \f(CW\*(C`enum\*(C'\fR type only as many bytes as it needs for the |
|
10253 declared range of possible values. Specifically, the \f(CW\*(C`enum\*(C'\fR type |
|
10254 will be equivalent to the smallest integer type which has enough room. |
|
10255 .Sp |
|
10256 \&\fBWarning:\fR the \fB\-fshort-enums\fR switch causes \s-1GCC\s0 to generate |
|
10257 code that is not binary compatible with code generated without that switch. |
|
10258 Use it to conform to a non-default application binary interface. |
|
10259 .Ip "\fB\-fshort-double\fR" 4 |
|
10260 .IX Item "-fshort-double" |
|
10261 Use the same size for \f(CW\*(C`double\*(C'\fR as for \f(CW\*(C`float\*(C'\fR. |
|
10262 .Sp |
|
10263 \&\fBWarning:\fR the \fB\-fshort-double\fR switch causes \s-1GCC\s0 to generate |
|
10264 code that is not binary compatible with code generated without that switch. |
|
10265 Use it to conform to a non-default application binary interface. |
|
10266 .Ip "\fB\-fshort-wchar\fR" 4 |
|
10267 .IX Item "-fshort-wchar" |
|
10268 Override the underlying type for \fBwchar_t\fR to be \fBshort |
|
10269 unsigned int\fR instead of the default for the target. This option is |
|
10270 useful for building programs to run under \s-1WINE\s0. |
|
10271 .Sp |
|
10272 \&\fBWarning:\fR the \fB\-fshort-wchar\fR switch causes \s-1GCC\s0 to generate |
|
10273 code that is not binary compatible with code generated without that switch. |
|
10274 Use it to conform to a non-default application binary interface. |
|
10275 .Ip "\fB\-fshared-data\fR" 4 |
|
10276 .IX Item "-fshared-data" |
|
10277 Requests that the data and non-\f(CW\*(C`const\*(C'\fR variables of this |
|
10278 compilation be shared data rather than private data. The distinction |
|
10279 makes sense only on certain operating systems, where shared data is |
|
10280 shared between processes running the same program, while private data |
|
10281 exists in one copy per process. |
|
10282 .Ip "\fB\-fno-common\fR" 4 |
|
10283 .IX Item "-fno-common" |
|
10284 In C, allocate even uninitialized global variables in the data section of the |
|
10285 object file, rather than generating them as common blocks. This has the |
|
10286 effect that if the same variable is declared (without \f(CW\*(C`extern\*(C'\fR) in |
|
10287 two different compilations, you will get an error when you link them. |
|
10288 The only reason this might be useful is if you wish to verify that the |
|
10289 program will work on other systems which always work this way. |
|
10290 .Ip "\fB\-fno-ident\fR" 4 |
|
10291 .IX Item "-fno-ident" |
|
10292 Ignore the \fB#ident\fR directive. |
|
10293 .Ip "\fB\-finhibit-size-directive\fR" 4 |
|
10294 .IX Item "-finhibit-size-directive" |
|
10295 Don't output a \f(CW\*(C`.size\*(C'\fR assembler directive, or anything else that |
|
10296 would cause trouble if the function is split in the middle, and the |
|
10297 two halves are placed at locations far apart in memory. This option is |
|
10298 used when compiling \fIcrtstuff.c\fR; you should not need to use it |
|
10299 for anything else. |
|
10300 .Ip "\fB\-fverbose-asm\fR" 4 |
|
10301 .IX Item "-fverbose-asm" |
|
10302 Put extra commentary information in the generated assembly code to |
|
10303 make it more readable. This option is generally only of use to those |
|
10304 who actually need to read the generated assembly code (perhaps while |
|
10305 debugging the compiler itself). |
|
10306 .Sp |
|
10307 \&\fB\-fno-verbose-asm\fR, the default, causes the |
|
10308 extra information to be omitted and is useful when comparing two assembler |
|
10309 files. |
|
10310 .Ip "\fB\-fpic\fR" 4 |
|
10311 .IX Item "-fpic" |
|
10312 Generate position-independent code (\s-1PIC\s0) suitable for use in a shared |
|
10313 library, if supported for the target machine. Such code accesses all |
|
10314 constant addresses through a global offset table (\s-1GOT\s0). The dynamic |
|
10315 loader resolves the \s-1GOT\s0 entries when the program starts (the dynamic |
|
10316 loader is not part of \s-1GCC\s0; it is part of the operating system). If |
|
10317 the \s-1GOT\s0 size for the linked executable exceeds a machine-specific |
|
10318 maximum size, you get an error message from the linker indicating that |
|
10319 \&\fB\-fpic\fR does not work; in that case, recompile with \fB\-fPIC\fR |
|
10320 instead. (These maximums are 8k on the \s-1SPARC\s0 and 32k |
|
10321 on the m68k and \s-1RS/6000\s0. The 386 has no such limit.) |
|
10322 .Sp |
|
10323 Position-independent code requires special support, and therefore works |
|
10324 only on certain machines. For the 386, \s-1GCC\s0 supports \s-1PIC\s0 for System V |
|
10325 but not for the Sun 386i. Code generated for the \s-1IBM\s0 \s-1RS/6000\s0 is always |
|
10326 position-independent. |
|
10327 .Ip "\fB\-fPIC\fR" 4 |
|
10328 .IX Item "-fPIC" |
|
10329 If supported for the target machine, emit position-independent code, |
|
10330 suitable for dynamic linking and avoiding any limit on the size of the |
|
10331 global offset table. This option makes a difference on the m68k |
|
10332 and the \s-1SPARC\s0. |
|
10333 .Sp |
|
10334 Position-independent code requires special support, and therefore works |
|
10335 only on certain machines. |
|
10336 .Ip "\fB\-fpie\fR" 4 |
|
10337 .IX Item "-fpie" |
|
10338 .PD 0 |
|
10339 .Ip "\fB\-fPIE\fR" 4 |
|
10340 .IX Item "-fPIE" |
|
10341 .PD |
|
10342 These options are similar to \fB\-fpic\fR and \fB\-fPIC\fR, but |
|
10343 generated position independent code can be only linked into executables. |
|
10344 Usually these options are used when \fB\-pie\fR \s-1GCC\s0 option will be |
|
10345 used during linking. |
|
10346 .Ip "\fB\-ffixed-\fR\fIreg\fR" 4 |
|
10347 .IX Item "-ffixed-reg" |
|
10348 Treat the register named \fIreg\fR as a fixed register; generated code |
|
10349 should never refer to it (except perhaps as a stack pointer, frame |
|
10350 pointer or in some other fixed role). |
|
10351 .Sp |
|
10352 \&\fIreg\fR must be the name of a register. The register names accepted |
|
10353 are machine-specific and are defined in the \f(CW\*(C`REGISTER_NAMES\*(C'\fR |
|
10354 macro in the machine description macro file. |
|
10355 .Sp |
|
10356 This flag does not have a negative form, because it specifies a |
|
10357 three-way choice. |
|
10358 .Ip "\fB\-fcall-used-\fR\fIreg\fR" 4 |
|
10359 .IX Item "-fcall-used-reg" |
|
10360 Treat the register named \fIreg\fR as an allocable register that is |
|
10361 clobbered by function calls. It may be allocated for temporaries or |
|
10362 variables that do not live across a call. Functions compiled this way |
|
10363 will not save and restore the register \fIreg\fR. |
|
10364 .Sp |
|
10365 It is an error to used this flag with the frame pointer or stack pointer. |
|
10366 Use of this flag for other registers that have fixed pervasive roles in |
|
10367 the machine's execution model will produce disastrous results. |
|
10368 .Sp |
|
10369 This flag does not have a negative form, because it specifies a |
|
10370 three-way choice. |
|
10371 .Ip "\fB\-fcall-saved-\fR\fIreg\fR" 4 |
|
10372 .IX Item "-fcall-saved-reg" |
|
10373 Treat the register named \fIreg\fR as an allocable register saved by |
|
10374 functions. It may be allocated even for temporaries or variables that |
|
10375 live across a call. Functions compiled this way will save and restore |
|
10376 the register \fIreg\fR if they use it. |
|
10377 .Sp |
|
10378 It is an error to used this flag with the frame pointer or stack pointer. |
|
10379 Use of this flag for other registers that have fixed pervasive roles in |
|
10380 the machine's execution model will produce disastrous results. |
|
10381 .Sp |
|
10382 A different sort of disaster will result from the use of this flag for |
|
10383 a register in which function values may be returned. |
|
10384 .Sp |
|
10385 This flag does not have a negative form, because it specifies a |
|
10386 three-way choice. |
|
10387 .Ip "\fB\-fpack-struct\fR" 4 |
|
10388 .IX Item "-fpack-struct" |
|
10389 Pack all structure members together without holes. |
|
10390 .Sp |
|
10391 \&\fBWarning:\fR the \fB\-fpack-struct\fR switch causes \s-1GCC\s0 to generate |
|
10392 code that is not binary compatible with code generated without that switch. |
|
10393 Additionally, it makes the code suboptimal. |
|
10394 Use it to conform to a non-default application binary interface. |
|
10395 .Ip "\fB\-finstrument-functions\fR" 4 |
|
10396 .IX Item "-finstrument-functions" |
|
10397 Generate instrumentation calls for entry and exit to functions. Just |
|
10398 after function entry and just before function exit, the following |
|
10399 profiling functions will be called with the address of the current |
|
10400 function and its call site. (On some platforms, |
|
10401 \&\f(CW\*(C`_\|_builtin_return_address\*(C'\fR does not work beyond the current |
|
10402 function, so the call site information may not be available to the |
|
10403 profiling functions otherwise.) |
|
10404 .Sp |
|
10405 .Vb 4 |
|
10406 \& void __cyg_profile_func_enter (void *this_fn, |
|
10407 \& void *call_site); |
|
10408 \& void __cyg_profile_func_exit (void *this_fn, |
|
10409 \& void *call_site); |
|
10410 .Ve |
|
10411 The first argument is the address of the start of the current function, |
|
10412 which may be looked up exactly in the symbol table. |
|
10413 .Sp |
|
10414 This currently disables function inlining. This restriction is |
|
10415 expected to be removed in future releases. |
|
10416 .Sp |
|
10417 A function may be given the attribute \f(CW\*(C`no_instrument_function\*(C'\fR, in |
|
10418 which case this instrumentation will not be done. This can be used, for |
|
10419 example, for the profiling functions listed above, high-priority |
|
10420 interrupt routines, and any functions from which the profiling functions |
|
10421 cannot safely be called (perhaps signal handlers, if the profiling |
|
10422 routines generate output or allocate memory). |
|
10423 .Ip "\fB\-fstack-check\fR" 4 |
|
10424 .IX Item "-fstack-check" |
|
10425 Generate code to verify that you do not go beyond the boundary of the |
|
10426 stack. You should specify this flag if you are running in an |
|
10427 environment with multiple threads, but only rarely need to specify it in |
|
10428 a single-threaded environment since stack overflow is automatically |
|
10429 detected on nearly all systems if there is only one stack. |
|
10430 .Sp |
|
10431 Note that this switch does not actually cause checking to be done; the |
|
10432 operating system must do that. The switch causes generation of code |
|
10433 to ensure that the operating system sees the stack being extended. |
|
10434 .Ip "\fB\-fstack-limit-register=\fR\fIreg\fR" 4 |
|
10435 .IX Item "-fstack-limit-register=reg" |
|
10436 .PD 0 |
|
10437 .Ip "\fB\-fstack-limit-symbol=\fR\fIsym\fR" 4 |
|
10438 .IX Item "-fstack-limit-symbol=sym" |
|
10439 .Ip "\fB\-fno-stack-limit\fR" 4 |
|
10440 .IX Item "-fno-stack-limit" |
|
10441 .PD |
|
10442 Generate code to ensure that the stack does not grow beyond a certain value, |
|
10443 either the value of a register or the address of a symbol. If the stack |
|
10444 would grow beyond the value, a signal is raised. For most targets, |
|
10445 the signal is raised before the stack overruns the boundary, so |
|
10446 it is possible to catch the signal without taking special precautions. |
|
10447 .Sp |
|
10448 For instance, if the stack starts at absolute address \fB0x80000000\fR |
|
10449 and grows downwards, you can use the flags |
|
10450 \&\fB\-fstack-limit-symbol=_\|_stack_limit\fR and |
|
10451 \&\fB\-Wl,\-\-defsym,_\|_stack_limit=0x7ffe0000\fR to enforce a stack limit |
|
10452 of 128KB. Note that this may only work with the \s-1GNU\s0 linker. |
|
10453 .Ip "\fB\-fargument-alias\fR" 4 |
|
10454 .IX Item "-fargument-alias" |
|
10455 .PD 0 |
|
10456 .Ip "\fB\-fargument-noalias\fR" 4 |
|
10457 .IX Item "-fargument-noalias" |
|
10458 .Ip "\fB\-fargument-noalias-global\fR" 4 |
|
10459 .IX Item "-fargument-noalias-global" |
|
10460 .PD |
|
10461 Specify the possible relationships among parameters and between |
|
10462 parameters and global data. |
|
10463 .Sp |
|
10464 \&\fB\-fargument-alias\fR specifies that arguments (parameters) may |
|
10465 alias each other and may alias global storage.\fB\-fargument-noalias\fR specifies that arguments do not alias |
|
10466 each other, but may alias global storage.\fB\-fargument-noalias-global\fR specifies that arguments do not |
|
10467 alias each other and do not alias global storage. |
|
10468 .Sp |
|
10469 Each language will automatically use whatever option is required by |
|
10470 the language standard. You should not need to use these options yourself. |
|
10471 .Ip "\fB\-fleading-underscore\fR" 4 |
|
10472 .IX Item "-fleading-underscore" |
|
10473 This option and its counterpart, \fB\-fno-leading-underscore\fR, forcibly |
|
10474 change the way C symbols are represented in the object file. One use |
|
10475 is to help link with legacy assembly code. |
|
10476 .Sp |
|
10477 \&\fBWarning:\fR the \fB\-fleading-underscore\fR switch causes \s-1GCC\s0 to |
|
10478 generate code that is not binary compatible with code generated without that |
|
10479 switch. Use it to conform to a non-default application binary interface. |
|
10480 Not all targets provide complete support for this switch. |
|
10481 .Ip "\fB\-ftls-model=\fR\fImodel\fR" 4 |
|
10482 .IX Item "-ftls-model=model" |
|
10483 Alter the thread-local storage model to be used. |
|
10484 The \fImodel\fR argument should be one of \f(CW\*(C`global\-dynamic\*(C'\fR, |
|
10485 \&\f(CW\*(C`local\-dynamic\*(C'\fR, \f(CW\*(C`initial\-exec\*(C'\fR or \f(CW\*(C`local\-exec\*(C'\fR. |
|
10486 .Sp |
|
10487 The default without \fB\-fpic\fR is \f(CW\*(C`initial\-exec\*(C'\fR; with |
|
10488 \&\fB\-fpic\fR the default is \f(CW\*(C`global\-dynamic\*(C'\fR. |
|
10489 .SH "ENVIRONMENT" |
|
10490 .IX Header "ENVIRONMENT" |
|
10491 This section describes several environment variables that affect how \s-1GCC\s0 |
|
10492 operates. Some of them work by specifying directories or prefixes to use |
|
10493 when searching for various kinds of files. Some are used to specify other |
|
10494 aspects of the compilation environment. |
|
10495 .PP |
|
10496 Note that you can also specify places to search using options such as |
|
10497 \&\fB\-B\fR, \fB\-I\fR and \fB\-L\fR. These |
|
10498 take precedence over places specified using environment variables, which |
|
10499 in turn take precedence over those specified by the configuration of \s-1GCC\s0. |
|
10500 .Ip "\fB\s-1LANG\s0\fR" 4 |
|
10501 .IX Item "LANG" |
|
10502 .PD 0 |
|
10503 .Ip "\fB\s-1LC_CTYPE\s0\fR" 4 |
|
10504 .IX Item "LC_CTYPE" |
|
10505 .Ip "\fB\s-1LC_MESSAGES\s0\fR" 4 |
|
10506 .IX Item "LC_MESSAGES" |
|
10507 .Ip "\fB\s-1LC_ALL\s0\fR" 4 |
|
10508 .IX Item "LC_ALL" |
|
10509 .PD |
|
10510 These environment variables control the way that \s-1GCC\s0 uses |
|
10511 localization information that allow \s-1GCC\s0 to work with different |
|
10512 national conventions. \s-1GCC\s0 inspects the locale categories |
|
10513 \&\fB\s-1LC_CTYPE\s0\fR and \fB\s-1LC_MESSAGES\s0\fR if it has been configured to do |
|
10514 so. These locale categories can be set to any value supported by your |
|
10515 installation. A typical value is \fBen_GB.UTF-8\fR for English in the United |
|
10516 Kingdom encoded in \s-1UTF-8\s0. |
|
10517 .Sp |
|
10518 The \fB\s-1LC_CTYPE\s0\fR environment variable specifies character |
|
10519 classification. \s-1GCC\s0 uses it to determine the character boundaries in |
|
10520 a string; this is needed for some multibyte encodings that contain quote |
|
10521 and escape characters that would otherwise be interpreted as a string |
|
10522 end or escape. |
|
10523 .Sp |
|
10524 The \fB\s-1LC_MESSAGES\s0\fR environment variable specifies the language to |
|
10525 use in diagnostic messages. |
|
10526 .Sp |
|
10527 If the \fB\s-1LC_ALL\s0\fR environment variable is set, it overrides the value |
|
10528 of \fB\s-1LC_CTYPE\s0\fR and \fB\s-1LC_MESSAGES\s0\fR; otherwise, \fB\s-1LC_CTYPE\s0\fR |
|
10529 and \fB\s-1LC_MESSAGES\s0\fR default to the value of the \fB\s-1LANG\s0\fR |
|
10530 environment variable. If none of these variables are set, \s-1GCC\s0 |
|
10531 defaults to traditional C English behavior. |
|
10532 .Ip "\fB\s-1TMPDIR\s0\fR" 4 |
|
10533 .IX Item "TMPDIR" |
|
10534 If \fB\s-1TMPDIR\s0\fR is set, it specifies the directory to use for temporary |
|
10535 files. \s-1GCC\s0 uses temporary files to hold the output of one stage of |
|
10536 compilation which is to be used as input to the next stage: for example, |
|
10537 the output of the preprocessor, which is the input to the compiler |
|
10538 proper. |
|
10539 .Ip "\fB\s-1GCC_EXEC_PREFIX\s0\fR" 4 |
|
10540 .IX Item "GCC_EXEC_PREFIX" |
|
10541 If \fB\s-1GCC_EXEC_PREFIX\s0\fR is set, it specifies a prefix to use in the |
|
10542 names of the subprograms executed by the compiler. No slash is added |
|
10543 when this prefix is combined with the name of a subprogram, but you can |
|
10544 specify a prefix that ends with a slash if you wish. |
|
10545 .Sp |
|
10546 If \fB\s-1GCC_EXEC_PREFIX\s0\fR is not set, \s-1GCC\s0 will attempt to figure out |
|
10547 an appropriate prefix to use based on the pathname it was invoked with. |
|
10548 .Sp |
|
10549 If \s-1GCC\s0 cannot find the subprogram using the specified prefix, it |
|
10550 tries looking in the usual places for the subprogram. |
|
10551 .Sp |
|
10552 The default value of \fB\s-1GCC_EXEC_PREFIX\s0\fR is |
|
10553 \&\fI\fIprefix\fI/lib/gcc/\fR where \fIprefix\fR is the value |
|
10554 of \f(CW\*(C`prefix\*(C'\fR when you ran the \fIconfigure\fR script. |
|
10555 .Sp |
|
10556 Other prefixes specified with \fB\-B\fR take precedence over this prefix. |
|
10557 .Sp |
|
10558 This prefix is also used for finding files such as \fIcrt0.o\fR that are |
|
10559 used for linking. |
|
10560 .Sp |
|
10561 In addition, the prefix is used in an unusual way in finding the |
|
10562 directories to search for header files. For each of the standard |
|
10563 directories whose name normally begins with \fB/usr/local/lib/gcc\fR |
|
10564 (more precisely, with the value of \fB\s-1GCC_INCLUDE_DIR\s0\fR), \s-1GCC\s0 tries |
|
10565 replacing that beginning with the specified prefix to produce an |
|
10566 alternate directory name. Thus, with \fB\-Bfoo/\fR, \s-1GCC\s0 will search |
|
10567 \&\fIfoo/bar\fR where it would normally search \fI/usr/local/lib/bar\fR. |
|
10568 These alternate directories are searched first; the standard directories |
|
10569 come next. |
|
10570 .Ip "\fB\s-1COMPILER_PATH\s0\fR" 4 |
|
10571 .IX Item "COMPILER_PATH" |
|
10572 The value of \fB\s-1COMPILER_PATH\s0\fR is a colon-separated list of |
|
10573 directories, much like \fB\s-1PATH\s0\fR. \s-1GCC\s0 tries the directories thus |
|
10574 specified when searching for subprograms, if it can't find the |
|
10575 subprograms using \fB\s-1GCC_EXEC_PREFIX\s0\fR. |
|
10576 .Ip "\fB\s-1LIBRARY_PATH\s0\fR" 4 |
|
10577 .IX Item "LIBRARY_PATH" |
|
10578 The value of \fB\s-1LIBRARY_PATH\s0\fR is a colon-separated list of |
|
10579 directories, much like \fB\s-1PATH\s0\fR. When configured as a native compiler, |
|
10580 \&\s-1GCC\s0 tries the directories thus specified when searching for special |
|
10581 linker files, if it can't find them using \fB\s-1GCC_EXEC_PREFIX\s0\fR. Linking |
|
10582 using \s-1GCC\s0 also uses these directories when searching for ordinary |
|
10583 libraries for the \fB\-l\fR option (but directories specified with |
|
10584 \&\fB\-L\fR come first). |
|
10585 .Ip "\fB\s-1LANG\s0\fR" 4 |
|
10586 .IX Item "LANG" |
|
10587 This variable is used to pass locale information to the compiler. One way in |
|
10588 which this information is used is to determine the character set to be used |
|
10589 when character literals, string literals and comments are parsed in C and \*(C+. |
|
10590 When the compiler is configured to allow multibyte characters, |
|
10591 the following values for \fB\s-1LANG\s0\fR are recognized: |
|
10592 .RS 4 |
|
10593 .Ip "\fBC-JIS\fR" 4 |
|
10594 .IX Item "C-JIS" |
|
10595 Recognize \s-1JIS\s0 characters. |
|
10596 .Ip "\fBC-SJIS\fR" 4 |
|
10597 .IX Item "C-SJIS" |
|
10598 Recognize \s-1SJIS\s0 characters. |
|
10599 .Ip "\fBC-EUCJP\fR" 4 |
|
10600 .IX Item "C-EUCJP" |
|
10601 Recognize \s-1EUCJP\s0 characters. |
|
10602 .RE |
|
10603 .RS 4 |
|
10604 .Sp |
|
10605 If \fB\s-1LANG\s0\fR is not defined, or if it has some other value, then the |
|
10606 compiler will use mblen and mbtowc as defined by the default locale to |
|
10607 recognize and translate multibyte characters. |
|
10608 .RE |
|
10609 .PP |
|
10610 Some additional environments variables affect the behavior of the |
|
10611 preprocessor. |
|
10612 .Ip "\fB\s-1CPATH\s0\fR" 4 |
|
10613 .IX Item "CPATH" |
|
10614 .PD 0 |
|
10615 .Ip "\fBC_INCLUDE_PATH\fR" 4 |
|
10616 .IX Item "C_INCLUDE_PATH" |
|
10617 .Ip "\fB\s-1CPLUS_INCLUDE_PATH\s0\fR" 4 |
|
10618 .IX Item "CPLUS_INCLUDE_PATH" |
|
10619 .Ip "\fB\s-1OBJC_INCLUDE_PATH\s0\fR" 4 |
|
10620 .IX Item "OBJC_INCLUDE_PATH" |
|
10621 .PD |
|
10622 Each variable's value is a list of directories separated by a special |
|
10623 character, much like \fB\s-1PATH\s0\fR, in which to look for header files. |
|
10624 The special character, \f(CW\*(C`PATH_SEPARATOR\*(C'\fR, is target-dependent and |
|
10625 determined at \s-1GCC\s0 build time. For Microsoft Windows-based targets it is a |
|
10626 semicolon, and for almost all other targets it is a colon. |
|
10627 .Sp |
|
10628 \&\fB\s-1CPATH\s0\fR specifies a list of directories to be searched as if |
|
10629 specified with \fB\-I\fR, but after any paths given with \fB\-I\fR |
|
10630 options on the command line. This environment variable is used |
|
10631 regardless of which language is being preprocessed. |
|
10632 .Sp |
|
10633 The remaining environment variables apply only when preprocessing the |
|
10634 particular language indicated. Each specifies a list of directories |
|
10635 to be searched as if specified with \fB\-isystem\fR, but after any |
|
10636 paths given with \fB\-isystem\fR options on the command line. |
|
10637 .Sp |
|
10638 In all these variables, an empty element instructs the compiler to |
|
10639 search its current working directory. Empty elements can appear at the |
|
10640 beginning or end of a path. For instance, if the value of |
|
10641 \&\fB\s-1CPATH\s0\fR is \f(CW\*(C`:/special/include\*(C'\fR, that has the same |
|
10642 effect as \fB\-I.\ \-I/special/include\fR. |
|
10643 .Ip "\fB\s-1DEPENDENCIES_OUTPUT\s0\fR" 4 |
|
10644 .IX Item "DEPENDENCIES_OUTPUT" |
|
10645 If this variable is set, its value specifies how to output |
|
10646 dependencies for Make based on the non-system header files processed |
|
10647 by the compiler. System header files are ignored in the dependency |
|
10648 output. |
|
10649 .Sp |
|
10650 The value of \fB\s-1DEPENDENCIES_OUTPUT\s0\fR can be just a file name, in |
|
10651 which case the Make rules are written to that file, guessing the target |
|
10652 name from the source file name. Or the value can have the form |
|
10653 \&\fIfile\fR\fB \fR\fItarget\fR, in which case the rules are written to |
|
10654 file \fIfile\fR using \fItarget\fR as the target name. |
|
10655 .Sp |
|
10656 In other words, this environment variable is equivalent to combining |
|
10657 the options \fB\-MM\fR and \fB\-MF\fR, |
|
10658 with an optional \fB\-MT\fR switch too. |
|
10659 .Ip "\fB\s-1SUNPRO_DEPENDENCIES\s0\fR" 4 |
|
10660 .IX Item "SUNPRO_DEPENDENCIES" |
|
10661 This variable is the same as \fB\s-1DEPENDENCIES_OUTPUT\s0\fR (see above), |
|
10662 except that system header files are not ignored, so it implies |
|
10663 \&\fB\-M\fR rather than \fB\-MM\fR. However, the dependence on the |
|
10664 main input file is omitted. |
|
10665 .SH "BUGS" |
|
10666 .IX Header "BUGS" |
|
10667 For instructions on reporting bugs, see |
|
10668 <\fBhttp://gcc.gnu.org/bugs.html\fR>. Use of the \fBgccbug\fR |
|
10669 script to report bugs is recommended. |
|
10670 .SH "FOOTNOTES" |
|
10671 .IX Header "FOOTNOTES" |
|
10672 .Ip "1." 4 |
|
10673 On some systems, \fBgcc \-shared\fR |
|
10674 needs to build supplementary stub code for constructors to work. On |
|
10675 multi-libbed systems, \fBgcc \-shared\fR must select the correct support |
|
10676 libraries to link against. Failing to supply the correct flags may lead |
|
10677 to subtle defects. Supplying them in cases where they are not necessary |
|
10678 is innocuous. |
|
10679 .SH "SEE ALSO" |
|
10680 .IX Header "SEE ALSO" |
|
10681 \&\fIgpl\fR\|(7), \fIgfdl\fR\|(7), \fIfsf-funding\fR\|(7), |
|
10682 \&\fIcpp\fR\|(1), \fIgcov\fR\|(1), \fIg77\fR\|(1), \fIas\fR\|(1), \fIld\fR\|(1), \fIgdb\fR\|(1), \fIadb\fR\|(1), \fIdbx\fR\|(1), \fIsdb\fR\|(1) |
|
10683 and the Info entries for \fIgcc\fR, \fIcpp\fR, \fIg77\fR, \fIas\fR, |
|
10684 \&\fIld\fR, \fIbinutils\fR and \fIgdb\fR. |
|
10685 .SH "AUTHOR" |
|
10686 .IX Header "AUTHOR" |
|
10687 See the Info entry for \fBgcc\fR, or |
|
10688 <\fBhttp://gcc.gnu.org/onlinedocs/gcc/Contributors.html\fR>, |
|
10689 for contributors to \s-1GCC\s0. |
|
10690 .SH "COPYRIGHT" |
|
10691 .IX Header "COPYRIGHT" |
|
10692 Copyright (c) 1988, 1989, 1992, 1993, 1994, 1995, 1996, 1997, |
|
10693 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005 Free Software Foundation, Inc. |
|
10694 .PP |
|
10695 Permission is granted to copy, distribute and/or modify this document |
|
10696 under the terms of the \s-1GNU\s0 Free Documentation License, Version 1.2 or |
|
10697 any later version published by the Free Software Foundation; with the |
|
10698 Invariant Sections being ``\s-1GNU\s0 General Public License'' and ``Funding |
|
10699 Free Software'', the Front-Cover texts being (a) (see below), and with |
|
10700 the Back-Cover Texts being (b) (see below). A copy of the license is |
|
10701 included in the \fIgfdl\fR\|(7) man page. |
|
10702 .PP |
|
10703 (a) The \s-1FSF\s0's Front-Cover Text is: |
|
10704 .PP |
|
10705 .Vb 1 |
|
10706 \& A GNU Manual |
|
10707 .Ve |
|
10708 (b) The \s-1FSF\s0's Back-Cover Text is: |
|
10709 .PP |
|
10710 .Vb 3 |
|
10711 \& You have freedom to copy and modify this GNU Manual, like GNU |
|
10712 \& software. Copies published by the Free Software Foundation raise |
|
10713 \& funds for GNU development. |
|
10714 .Ve |