SMP Overview

Purpose

An SMP operating system enables any CPU to work on any task, enabling multiple threads (processes or multiple threads within a process, and therefore applications) to run in parallel.

A system with 2 CPUs, for example, can allow 2 threads to run concurrently; one on each processor. This provides better responsiveness and asynchronicity compared to a system with a single CPU.

An SMP system can deliver a similar level of CPU performance as a larger and faster uni-processor CPU, while using less power. SMP also provides additional power management flexibility, running a single CPU when the system is under utilised then switching on extra CPUs to give scalable performance on demand for media rich applications. The ARM SMP architecture allows power control with voltage / frequency scaling and the ability to switch individual cores on and off.

However, the benefits of SMP come at the cost of OS and application complexity (the requirement of extra locks and the multithreading of code) and the associated debugging challenges of parallel processing.

Description

SMP is a microprocessor architecture where two or more identical CPUs are connected to a single shared main memory system and run a single OS instance.

The diagram below shows how this would apply on the Symbian platform with four CPU cores.

Figure 1. The Simplified Architecture of an SMP Platform Executing on the Symbian Platform.

The figure shows a simplified block diagram of an SMP system, where 4 CPUs are connected through their own cache to shared RAM and peripherals. The Cache Coherency Control block is responsible for ensuring that each CPU cache is consistent with those of the other CPUs. A single instance of OS spans the CPUs, the scheduler decides which thread to execute next and upon which CPU it should execute.

SMP features

SMP limitations

The disadvantages of using SMP are:

• The original emulator for the Symbian platform will not emulate an SMP environment

  The emulator is being replaced by a new emulation environment that is capable of simulating the multiprocessor environment.

• Software changes are required

  Assumptions that can be made in a single core environment, are not necessarily true on a multi-core system. The SMP-safe documentation you are reading now will provide you with guidance on a number of issues sure to come up while migrating your software to work in an SMP environment.

• Debugging Challenges

  Debugging on a multi-processor system is extremely difficult. The standard tooling solutions, such as the Lauterbach debugger and BTrace2 (also known as the modified BTrace) have been revised to handle the special requirements of an SMP system.

• Access to memory is serialized

  All the CPU cores use the same memory, memory access must occur serially. This can cause a performance lag.