author | Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com> |
Mon, 15 Mar 2010 12:45:50 +0200 | |
branch | RCL_3 |
changeset 21 | e7d2d738d3c2 |
parent 0 | a41df078684a |
permissions | -rw-r--r-- |
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// Copyright (c) 2004-2009 Nokia Corporation and/or its subsidiary(-ies). |
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// All rights reserved. |
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// This component and the accompanying materials are made available |
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// under the terms of the License "Eclipse Public License v1.0" |
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// which accompanies this distribution, and is available |
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// at the URL "http://www.eclipse.org/legal/epl-v10.html". |
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// |
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// Initial Contributors: |
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// Nokia Corporation - initial contribution. |
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// |
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// Contributors: |
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// |
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// Description: |
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// This file contains stepping code refactored from rm_debug_kerneldriver.cpp/rm_debug_kerneldriver.h |
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// |
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#include <e32def.h> |
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#include <e32def_private.h> |
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#include <e32cmn.h> |
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#include <e32cmn_private.h> |
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#include <kernel/kernel.h> |
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#include <kernel/kern_priv.h> |
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#include <nk_trace.h> |
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#include <arm.h> |
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#include <rm_debug_api.h> |
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#include "d_rmd_stepping.h" |
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#include "d_rmd_breakpoints.h" |
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#include "rm_debug_kerneldriver.h" // needed to access DRM_DebugChannel |
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#include "rm_debug_driver.h" |
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#include "debug_logging.h" |
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using namespace Debug; |
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// |
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// DRMDStepping::DRMDStepping |
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// |
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DRMDStepping::DRMDStepping(DRM_DebugChannel* aChannel) |
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: |
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iChannel(aChannel) |
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{ |
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// to do |
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} |
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// |
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// DRMDStepping::~DRM_DebugChannel |
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// |
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DRMDStepping::~DRMDStepping() |
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{ |
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// to do |
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} |
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// |
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// DRMDStepping::IsExecuted |
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// |
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TBool DRMDStepping::IsExecuted(TUint8 aCondition ,TUint32 aStatusRegister) |
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{ |
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LOG_MSG("DRMDStepping::IsExecuted()"); |
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TBool N = ((aStatusRegister >> 28) & 0x0000000F) & 0x00000008; |
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TBool Z = ((aStatusRegister >> 28) & 0x0000000F) & 0x00000004; |
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TBool C = ((aStatusRegister >> 28) & 0x0000000F) & 0x00000002; |
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TBool V = ((aStatusRegister >> 28) & 0x0000000F) & 0x00000001; |
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switch(aCondition) |
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{ |
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case 0: |
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return Z; |
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case 1: |
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return !Z; |
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case 2: |
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return C; |
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case 3: |
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return !C; |
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case 4: |
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return N; |
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case 5: |
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return !N; |
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case 6: |
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return V; |
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case 7: |
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return !V; |
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case 8: |
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return (C && !Z); |
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case 9: |
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return (!C || Z); |
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case 10: |
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return (N == V); |
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case 11: |
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return (N != V); |
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case 12: |
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return ((N == V) && !Z); |
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case 13: |
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return (Z || (N != V)); |
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case 14: |
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case 15: |
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return ETrue; |
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} |
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return EFalse; |
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} |
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// |
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// DRMDStepping::IsPreviousInstructionMovePCToLR |
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// |
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TBool DRMDStepping::IsPreviousInstructionMovePCToLR(DThread *aThread) |
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{ |
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LOG_MSG("DRMDStepping::IsPreviousInstructionMovePCToLR()"); |
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TInt err = KErrNone; |
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// there are several types of instructions that modify the PC that aren't |
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// designated as linked or non linked branches. the way gcc generates the |
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// code can tell us whether or not these instructions are to be treated as |
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// linked branches. the main cases are bx and any type of mov or load or |
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// arithmatic operation that changes the PC. if these are really just |
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// function calls that will return, gcc will generate a mov lr, pc |
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// instruction as the previous instruction. note that this is just for arm |
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// and armi |
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// get the address of the previous instruction |
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TUint32 address = 0; |
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err = iChannel->ReadKernelRegisterValue(aThread, PC_REGISTER, address); |
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if(err != KErrNone) |
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{ |
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LOG_MSG2("Non-zero error code discarded: %d", err); |
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} |
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address -= 4; |
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TBuf8<4> previousInstruction; |
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err = iChannel->DoReadMemory(aThread, address, 4, previousInstruction); |
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if (KErrNone != err) |
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{ |
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LOG_MSG2("Error %d reading memory at address %x", address); |
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return EFalse; |
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} |
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const TUint32 movePCToLRIgnoringCondition = 0x01A0E00F; |
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TUint32 inst = *(TUint32 *)previousInstruction.Ptr(); |
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if ((inst & 0x0FFFFFFF) == movePCToLRIgnoringCondition) |
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{ |
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return ETrue; |
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} |
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return EFalse; |
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} |
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// |
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// DRMDStepping::DecodeDataProcessingInstruction |
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// |
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void DRMDStepping::DecodeDataProcessingInstruction(TUint8 aOpcode, TUint32 aOp1, TUint32 aOp2, TUint32 aStatusRegister, TUint32 &aBreakAddress) |
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{ |
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LOG_MSG("DRMDStepping::DecodeDataProcessingInstruction()"); |
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switch(aOpcode) |
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{ |
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case 0: |
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{ |
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// AND |
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aBreakAddress = aOp1 & aOp2; |
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break; |
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} |
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case 1: |
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{ |
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// EOR |
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aBreakAddress = aOp1 ^ aOp2; |
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break; |
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} |
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case 2: |
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{ |
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// SUB |
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aBreakAddress = aOp1 - aOp2; |
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break; |
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} |
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case 3: |
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{ |
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// RSB |
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aBreakAddress = aOp2 - aOp1; |
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break; |
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} |
0 | 183 |
case 4: |
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{ |
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// ADD |
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aBreakAddress = aOp1 + aOp2; |
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break; |
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} |
0 | 189 |
case 5: |
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{ |
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// ADC |
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aBreakAddress = aOp1 + aOp2 + (aStatusRegister & arm_carry_bit()) ? 1 : 0; |
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break; |
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} |
0 | 195 |
case 6: |
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{ |
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// SBC |
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aBreakAddress = aOp1 - aOp2 - (aStatusRegister & arm_carry_bit()) ? 0 : 1; |
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break; |
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} |
0 | 201 |
case 7: |
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{ |
0 | 203 |
// RSC |
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aBreakAddress = aOp2 - aOp1 - (aStatusRegister & arm_carry_bit()) ? 0 : 1; |
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break; |
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} |
0 | 207 |
case 12: |
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{ |
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// ORR |
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aBreakAddress = aOp1 | aOp2; |
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break; |
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} |
0 | 213 |
case 13: |
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{ |
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// MOV |
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aBreakAddress = aOp2; |
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break; |
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} |
0 | 219 |
case 14: |
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{ |
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// BIC |
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aBreakAddress = aOp1 & ~aOp2; |
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break; |
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} |
0 | 225 |
case 15: |
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{ |
0 | 227 |
// MVN |
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aBreakAddress = ~aOp2; |
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break; |
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} |
0 | 231 |
} |
232 |
} |
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// |
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// DRMDStepping::CurrentInstruction |
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// |
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// Returns the current instruction bitpattern (either 32-bits or 16-bits) if possible |
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TInt DRMDStepping::CurrentInstruction(DThread* aThread, TUint32& aInstruction) |
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{ |
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LOG_MSG("DRMDStepping::CurrentInstruction"); |
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// What is the current PC? |
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TUint32 pc; |
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ReturnIfError(CurrentPC(aThread,pc)); |
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245 |
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// Read it one byte at a time to ensure alignment doesn't matter |
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TUint32 inst = 0; |
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for(TInt i=3;i>=0;i--) |
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{ |
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TBuf8<1> instruction; |
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TInt err = iChannel->DoReadMemory(aThread, (pc+i), 1, instruction); |
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if (KErrNone != err) |
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{ |
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LOG_MSG2("DRMDStepping::CurrentInstruction : Failed to read memory at current PC: return 0x%08x",pc); |
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return err; |
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} |
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inst = (inst << 8) | (*(TUint8 *)instruction.Ptr()); |
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} |
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aInstruction = inst; |
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LOG_MSG2("DRMDStepping::CurrentInstruction 0x%08x", aInstruction); |
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return KErrNone; |
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} |
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268 |
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// |
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270 |
// DRMDStepping::CurrentArchMode |
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// |
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// Determines architecture mode from the supplied cpsr |
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TInt DRMDStepping::CurrentArchMode(const TUint32 aCpsr, Debug::TArchitectureMode& aMode) |
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{ |
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// Thumb2 work will depend on having a suitable cpu architecture to compile for... |
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#ifdef ECpuJf |
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// State table as per ARM ARM DDI0406A, section A.2.5.1 |
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if(aCpsr & ECpuJf) |
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{ |
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if (aCpsr & ECpuThumb) |
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{ |
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// ThumbEE (Thumb2) |
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aMode = Debug::EThumb2EEMode; |
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} |
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else |
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{ |
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// Jazelle mode - not supported |
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return KErrNotSupported; |
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289 |
} |
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} |
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291 |
else |
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292 |
#endif |
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{ |
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294 |
if (aCpsr & ECpuThumb) |
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{ |
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// Thumb mode |
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aMode = Debug::EThumbMode; |
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} |
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else |
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{ |
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// ARM mode |
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aMode = Debug::EArmMode; |
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} |
|
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} |
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305 |
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return KErrNone; |
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} |
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// |
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// DRMDStepping::PCAfterInstructionExecutes |
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// |
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// Note, this function pretty much ignores all the arguments except for aThread. |
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// The arguments continue to exist so that the function has the same prototype as |
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// the original from Nokia. In the long term this function will be re-factored |
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// to remove obsolete parameters. |
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// |
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TUint32 DRMDStepping::PCAfterInstructionExecutes(DThread *aThread, TUint32 aCurrentPC, TUint32 aStatusRegister, TInt aInstSize, /*TBool aStepInto,*/ TUint32 &aNewRangeEnd, TBool &aChangingModes) |
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{ |
0 | 319 |
LOG_MSG("DRMDStepping::PCAfterInstructionExecutes()"); |
320 |
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321 |
// by default we will set the breakpoint at the next instruction |
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TUint32 breakAddress = aCurrentPC + aInstSize; |
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323 |
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TInt err = KErrNone; |
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325 |
||
326 |
// determine the architecture |
|
21
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diff
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|
327 |
TUint32 cpuid; |
e7d2d738d3c2
Revision: 201010
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diff
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|
328 |
asm("mrc p15, 0, cpuid, c0, c0, 0 "); |
0 | 329 |
LOG_MSG2("DRMDStepping::PCAfterInstructionExecutes() - cpuid = 0x%08x\n",cpuid); |
330 |
||
21
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diff
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|
331 |
cpuid >>= 8; |
e7d2d738d3c2
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diff
changeset
|
332 |
cpuid &= 0xFF; |
0 | 333 |
|
334 |
// determine the architecture mode for the current instruction |
|
335 |
TArchitectureMode mode = EArmMode; // Default assumption is ARM |
|
336 |
||
337 |
// Now we must examine the CPSR to read the T and J bits. See ARM ARM DDI0406A, section B1.3.3 |
|
338 |
TUint32 cpsr; |
|
339 |
||
340 |
ReturnIfError(CurrentCPSR(aThread,cpsr)); |
|
341 |
LOG_MSG2("DRMDStepping::PCAfterInstructionExecutes() - cpsr = 0x%08x\n",cpsr); |
|
342 |
||
343 |
// Determine the mode |
|
344 |
ReturnIfError(CurrentArchMode(cpsr,mode)); |
|
345 |
||
346 |
// Decode instruction based on current CPU mode |
|
347 |
switch(mode) |
|
21
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diff
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|
348 |
{ |
0 | 349 |
case Debug::EArmMode: |
21
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Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
350 |
{ |
0 | 351 |
// Obtain the current instruction bit pattern |
352 |
TUint32 inst; |
|
353 |
ReturnIfError(CurrentInstruction(aThread,inst)); |
|
354 |
||
355 |
LOG_MSG2("Current instruction: %x", inst); |
|
356 |
||
357 |
// check the conditions to see if this will actually get executed |
|
358 |
if (IsExecuted(((inst>>28) & 0x0000000F), aStatusRegister)) |
|
21
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0
diff
changeset
|
359 |
{ |
0 | 360 |
switch(arm_opcode(inst)) // bits 27-25 |
21
e7d2d738d3c2
Revision: 201010
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parents:
0
diff
changeset
|
361 |
{ |
0 | 362 |
case 0: |
363 |
{ |
|
21
e7d2d738d3c2
Revision: 201010
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
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|
364 |
switch((inst & 0x00000010) >> 4) // bit 4 |
e7d2d738d3c2
Revision: 201010
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
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0
diff
changeset
|
365 |
{ |
0 | 366 |
case 0: |
21
e7d2d738d3c2
Revision: 201010
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parents:
0
diff
changeset
|
367 |
{ |
0 | 368 |
switch((inst & 0x01800000) >> 23) // bits 24-23 |
21
e7d2d738d3c2
Revision: 201010
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parents:
0
diff
changeset
|
369 |
{ |
0 | 370 |
case 2: |
21
e7d2d738d3c2
Revision: 201010
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parents:
0
diff
changeset
|
371 |
{ |
0 | 372 |
// move to/from status register. pc updates not allowed |
373 |
// or TST, TEQ, CMP, CMN which don't modify the PC |
|
374 |
break; |
|
21
e7d2d738d3c2
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parents:
0
diff
changeset
|
375 |
} |
0 | 376 |
default: |
21
e7d2d738d3c2
Revision: 201010
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
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0
diff
changeset
|
377 |
{ |
0 | 378 |
// Data processing immediate shift |
379 |
if (arm_rd(inst) == PC_REGISTER) |
|
21
e7d2d738d3c2
Revision: 201010
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
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0
diff
changeset
|
380 |
{ |
0 | 381 |
TUint32 rn = aCurrentPC + 8; |
382 |
if (arm_rn(inst) != PC_REGISTER) // bits 19-16 |
|
21
e7d2d738d3c2
Revision: 201010
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
383 |
{ |
0 | 384 |
err = iChannel->ReadKernelRegisterValue(aThread, arm_rn(inst), rn); |
385 |
if(err != KErrNone) |
|
21
e7d2d738d3c2
Revision: 201010
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
386 |
{ |
0 | 387 |
LOG_MSG2("Non-zero error code discarded: %d", err); |
21
e7d2d738d3c2
Revision: 201010
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
388 |
} |
0 | 389 |
} |
390 |
||
391 |
TUint32 shifter = ShiftedRegValue(aThread, inst, aCurrentPC, aStatusRegister); |
|
392 |
||
393 |
DecodeDataProcessingInstruction(((inst & 0x01E00000) >> 21), rn, shifter, aStatusRegister, breakAddress); |
|
21
e7d2d738d3c2
Revision: 201010
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
394 |
} |
e7d2d738d3c2
Revision: 201010
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
395 |
break; |
0 | 396 |
} |
397 |
} |
|
21
e7d2d738d3c2
Revision: 201010
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
398 |
break; |
0 | 399 |
} |
400 |
case 1: |
|
21
e7d2d738d3c2
Revision: 201010
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
401 |
{ |
0 | 402 |
switch((inst & 0x00000080) >> 7) // bit 7 |
403 |
{ |
|
21
e7d2d738d3c2
Revision: 201010
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
404 |
case 0: |
0 | 405 |
{ |
21
e7d2d738d3c2
Revision: 201010
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
406 |
switch((inst & 0x01900000) >> 20) // bits 24-23 and bit 20 |
e7d2d738d3c2
Revision: 201010
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
407 |
{ |
0 | 408 |
case 0x10: |
21
e7d2d738d3c2
Revision: 201010
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
409 |
{ |
0 | 410 |
// from figure 3-3 |
411 |
switch((inst & 0x000000F0) >> 4) // bits 7-4 |
|
21
e7d2d738d3c2
Revision: 201010
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
412 |
{ |
0 | 413 |
case 1: |
21
e7d2d738d3c2
Revision: 201010
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
414 |
{ |
0 | 415 |
if (((inst & 0x00400000) >> 22) == 0) // bit 22 |
21
e7d2d738d3c2
Revision: 201010
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
416 |
{ |
0 | 417 |
// BX |
418 |
// this is a strange case. normally this is used in the epilogue to branch the the link |
|
419 |
// register. sometimes it is used to call a function, and the LR is stored in the previous |
|
420 |
// instruction. since what we want to do is different for the two cases when stepping over, |
|
421 |
// we need to read the previous instruction to see what we should do |
|
422 |
err = iChannel->ReadKernelRegisterValue(aThread, (inst & 0x0000000F), breakAddress); |
|
423 |
if(err != KErrNone) |
|
21
e7d2d738d3c2
Revision: 201010
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
424 |
{ |
0 | 425 |
LOG_MSG2("Non-zero error code discarded: %d", err); |
21
e7d2d738d3c2
Revision: 201010
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
426 |
} |
0 | 427 |
|
428 |
if ((breakAddress & 0x00000001) == 1) |
|
21
e7d2d738d3c2
Revision: 201010
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
429 |
{ |
0 | 430 |
aChangingModes = ETrue; |
21
e7d2d738d3c2
Revision: 201010
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
431 |
} |
0 | 432 |
|
433 |
breakAddress &= 0xFFFFFFFE; |
|
21
e7d2d738d3c2
Revision: 201010
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
434 |
} |
0 | 435 |
break; |
21
e7d2d738d3c2
Revision: 201010
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
436 |
} |
0 | 437 |
case 3: |
21
e7d2d738d3c2
Revision: 201010
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
438 |
{ |
0 | 439 |
// BLX |
21
e7d2d738d3c2
Revision: 201010
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
440 |
{ |
0 | 441 |
err = iChannel->ReadKernelRegisterValue(aThread, (inst & 0x0000000F), breakAddress); |
442 |
if(err != KErrNone) |
|
21
e7d2d738d3c2
Revision: 201010
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
443 |
{ |
0 | 444 |
LOG_MSG2("Non-zero error code discarded: %d", err); |
21
e7d2d738d3c2
Revision: 201010
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
445 |
} |
0 | 446 |
|
447 |
if ((breakAddress & 0x00000001) == 1) |
|
21
e7d2d738d3c2
Revision: 201010
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
448 |
{ |
0 | 449 |
aChangingModes = ETrue; |
21
e7d2d738d3c2
Revision: 201010
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
450 |
} |
0 | 451 |
|
452 |
breakAddress &= 0xFFFFFFFE; |
|
21
e7d2d738d3c2
Revision: 201010
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
453 |
} |
0 | 454 |
break; |
21
e7d2d738d3c2
Revision: 201010
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
455 |
} |
0 | 456 |
default: |
21
e7d2d738d3c2
Revision: 201010
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
457 |
{ |
0 | 458 |
// either doesn't modify the PC or it is illegal to |
459 |
break; |
|
21
e7d2d738d3c2
Revision: 201010
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
460 |
} |
0 | 461 |
} |
462 |
break; |
|
21
e7d2d738d3c2
Revision: 201010
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
463 |
} |
0 | 464 |
default: |
21
e7d2d738d3c2
Revision: 201010
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
465 |
{ |
0 | 466 |
// Data processing register shift |
467 |
if (((inst & 0x01800000) >> 23) == 2) // bits 24-23 |
|
21
e7d2d738d3c2
Revision: 201010
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
468 |
{ |
0 | 469 |
// TST, TEQ, CMP, CMN don't modify the PC |
21
e7d2d738d3c2
Revision: 201010
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
470 |
} |
0 | 471 |
else if (arm_rd(inst) == PC_REGISTER) |
21
e7d2d738d3c2
Revision: 201010
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
472 |
{ |
0 | 473 |
// destination register is the PC |
474 |
TUint32 rn = aCurrentPC + 8; |
|
475 |
if (arm_rn(inst) != PC_REGISTER) // bits 19-16 |
|
21
e7d2d738d3c2
Revision: 201010
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
476 |
{ |
0 | 477 |
err = iChannel->ReadKernelRegisterValue(aThread, arm_rn(inst), rn); |
478 |
if(err != KErrNone) |
|
21
e7d2d738d3c2
Revision: 201010
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
479 |
{ |
0 | 480 |
LOG_MSG2("Non-zero error code discarded: %d", err); |
21
e7d2d738d3c2
Revision: 201010
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
481 |
} |
0 | 482 |
} |
483 |
||
484 |
TUint32 shifter = ShiftedRegValue(aThread, inst, aCurrentPC, aStatusRegister); |
|
485 |
||
486 |
DecodeDataProcessingInstruction(((inst & 0x01E00000) >> 21), rn, shifter, aStatusRegister, breakAddress); |
|
21
e7d2d738d3c2
Revision: 201010
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
487 |
} |
0 | 488 |
break; |
21
e7d2d738d3c2
Revision: 201010
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
489 |
} |
0 | 490 |
} |
21
e7d2d738d3c2
Revision: 201010
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
491 |
break; |
0 | 492 |
} |
493 |
default: |
|
21
e7d2d738d3c2
Revision: 201010
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
494 |
{ |
0 | 495 |
// from figure 3-2, updates to the PC illegal |
496 |
break; |
|
21
e7d2d738d3c2
Revision: 201010
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
497 |
} |
0 | 498 |
} |
499 |
break; |
|
21
e7d2d738d3c2
Revision: 201010
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
500 |
} |
0 | 501 |
} |
502 |
break; |
|
21
e7d2d738d3c2
Revision: 201010
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
503 |
} |
0 | 504 |
case 1: |
21
e7d2d738d3c2
Revision: 201010
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
505 |
{ |
0 | 506 |
if (((inst & 0x01800000) >> 23) == 2) // bits 24-23 |
21
e7d2d738d3c2
Revision: 201010
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
507 |
{ |
0 | 508 |
// cannot modify the PC |
509 |
break; |
|
21
e7d2d738d3c2
Revision: 201010
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
510 |
} |
0 | 511 |
else if (arm_rd(inst) == PC_REGISTER) |
21
e7d2d738d3c2
Revision: 201010
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
512 |
{ |
0 | 513 |
// destination register is the PC |
514 |
TUint32 rn; |
|
515 |
err = iChannel->ReadKernelRegisterValue(aThread, arm_rn(inst), rn); // bits 19-16 |
|
516 |
if(err != KErrNone) |
|
21
e7d2d738d3c2
Revision: 201010
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
517 |
{ |
0 | 518 |
LOG_MSG2("Non-zero error code discarded: %d", err); |
21
e7d2d738d3c2
Revision: 201010
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
519 |
} |
0 | 520 |
TUint32 shifter = ((arm_data_imm(inst) >> arm_data_rot(inst)) | (arm_data_imm(inst) << (32 - arm_data_rot(inst)))) & 0xffffffff; |
521 |
||
522 |
DecodeDataProcessingInstruction(((inst & 0x01E00000) >> 21), rn, shifter, aStatusRegister, breakAddress); |
|
21
e7d2d738d3c2
Revision: 201010
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
523 |
} |
0 | 524 |
break; |
21
e7d2d738d3c2
Revision: 201010
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
525 |
} |
0 | 526 |
case 2: |
21
e7d2d738d3c2
Revision: 201010
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
527 |
{ |
0 | 528 |
// load/store immediate offset |
529 |
if (arm_load(inst)) // bit 20 |
|
21
e7d2d738d3c2
Revision: 201010
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
530 |
{ |
0 | 531 |
// loading a register from memory |
532 |
if (arm_rd(inst) == PC_REGISTER) |
|
21
e7d2d738d3c2
Revision: 201010
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
533 |
{ |
0 | 534 |
// loading the PC register |
535 |
TUint32 base; |
|
536 |
err = iChannel->ReadKernelRegisterValue(aThread, arm_rn(inst), base); |
|
537 |
if(err != KErrNone) |
|
21
e7d2d738d3c2
Revision: 201010
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
538 |
{ |
0 | 539 |
LOG_MSG2("Non-zero error code discarded: %d", err); |
21
e7d2d738d3c2
Revision: 201010
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
540 |
} |
0 | 541 |
|
542 |
/* Note: At runtime the PC would be 8 further on |
|
543 |
*/ |
|
544 |
if (arm_rn(inst) == PC_REGISTER) |
|
21
e7d2d738d3c2
Revision: 201010
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
545 |
{ |
0 | 546 |
base = aCurrentPC + 8; |
21
e7d2d738d3c2
Revision: 201010
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
547 |
} |
0 | 548 |
|
549 |
TUint32 offset = 0; |
|
21
e7d2d738d3c2
Revision: 201010
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
550 |
|
e7d2d738d3c2
Revision: 201010
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
551 |
if (arm_single_pre(inst)) |
0 | 552 |
{ |
21
e7d2d738d3c2
Revision: 201010
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
553 |
// Pre-indexing |
e7d2d738d3c2
Revision: 201010
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
554 |
offset = arm_single_imm(inst); |
e7d2d738d3c2
Revision: 201010
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
555 |
|
e7d2d738d3c2
Revision: 201010
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
556 |
if (arm_single_u(inst)) |
e7d2d738d3c2
Revision: 201010
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
557 |
{ |
e7d2d738d3c2
Revision: 201010
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
558 |
base += offset; |
e7d2d738d3c2
Revision: 201010
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
559 |
} |
0 | 560 |
else |
21
e7d2d738d3c2
Revision: 201010
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
561 |
{ |
e7d2d738d3c2
Revision: 201010
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
562 |
base -= offset; |
e7d2d738d3c2
Revision: 201010
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
563 |
} |
0 | 564 |
} |
565 |
||
566 |
TBuf8<4> destination; |
|
567 |
err = iChannel->DoReadMemory(aThread, base, 4, destination); |
|
568 |
||
569 |
if (KErrNone == err) |
|
21
e7d2d738d3c2
Revision: 201010
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
570 |
{ |
0 | 571 |
breakAddress = *(TUint32 *)destination.Ptr(); |
21
e7d2d738d3c2
Revision: 201010
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
572 |
|
0 | 573 |
if ((breakAddress & 0x00000001) == 1) |
21
e7d2d738d3c2
Revision: 201010
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
574 |
{ |
0 | 575 |
aChangingModes = ETrue; |
21
e7d2d738d3c2
Revision: 201010
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
576 |
} |
0 | 577 |
breakAddress &= 0xFFFFFFFE; |
21
e7d2d738d3c2
Revision: 201010
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
578 |
} |
0 | 579 |
else |
21
e7d2d738d3c2
Revision: 201010
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
580 |
{ |
0 | 581 |
LOG_MSG("Error reading memory in decoding step instruction"); |
21
e7d2d738d3c2
Revision: 201010
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
582 |
} |
0 | 583 |
} |
584 |
} |
|
585 |
break; |
|
21
e7d2d738d3c2
Revision: 201010
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
586 |
} |
0 | 587 |
case 3: |
21
e7d2d738d3c2
Revision: 201010
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
588 |
{ |
0 | 589 |
if (((inst & 0xF0000000) != 0xF0000000) && ((inst & 0x00000010) == 0)) |
21
e7d2d738d3c2
Revision: 201010
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
590 |
{ |
0 | 591 |
// load/store register offset |
592 |
if (arm_load(inst)) // bit 20 |
|
21
e7d2d738d3c2
Revision: 201010
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
593 |
{ |
0 | 594 |
// loading a register from memory |
595 |
if (arm_rd(inst) == PC_REGISTER) |
|
21
e7d2d738d3c2
Revision: 201010
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
596 |
{ |
0 | 597 |
// loading the PC register |
598 |
TUint32 base = 0; |
|
599 |
if(arm_rn(inst) == PC_REGISTER) |
|
21
e7d2d738d3c2
Revision: 201010
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
600 |
{ |
0 | 601 |
base = aCurrentPC + 8; |
21
e7d2d738d3c2
Revision: 201010
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
602 |
} |
0 | 603 |
else |
21
e7d2d738d3c2
Revision: 201010
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
604 |
{ |
0 | 605 |
err = iChannel->ReadKernelRegisterValue(aThread, arm_rn(inst), base); |
606 |
if(err != KErrNone) |
|
21
e7d2d738d3c2
Revision: 201010
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
607 |
{ |
0 | 608 |
LOG_MSG2("Non-zero error code discarded: %d", err); |
21
e7d2d738d3c2
Revision: 201010
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
609 |
} |
0 | 610 |
} |
611 |
||
612 |
TUint32 offset = 0; |
|
613 |
||
614 |
if (arm_single_pre(inst)) |
|
21
e7d2d738d3c2
Revision: 201010
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
615 |
{ |
0 | 616 |
offset = ShiftedRegValue(aThread, inst, aCurrentPC, aStatusRegister); |
617 |
||
618 |
if (arm_single_u(inst)) |
|
21
e7d2d738d3c2
Revision: 201010
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
619 |
{ |
0 | 620 |
base += offset; |
21
e7d2d738d3c2
Revision: 201010
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
621 |
} |
0 | 622 |
else |
21
e7d2d738d3c2
Revision: 201010
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
623 |
{ |
0 | 624 |
base -= offset; |
21
e7d2d738d3c2
Revision: 201010
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
625 |
} |
0 | 626 |
} |
627 |
||
628 |
TBuf8<4> destination; |
|
629 |
err = iChannel->DoReadMemory(aThread, base, 4, destination); |
|
630 |
||
631 |
if (KErrNone == err) |
|
21
e7d2d738d3c2
Revision: 201010
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
632 |
{ |
0 | 633 |
breakAddress = *(TUint32 *)destination.Ptr(); |
634 |
||
635 |
if ((breakAddress & 0x00000001) == 1) |
|
21
e7d2d738d3c2
Revision: 201010
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
636 |
{ |
0 | 637 |
aChangingModes = ETrue; |
21
e7d2d738d3c2
Revision: 201010
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
638 |
} |
0 | 639 |
breakAddress &= 0xFFFFFFFE; |
21
e7d2d738d3c2
Revision: 201010
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
640 |
} |
0 | 641 |
else |
21
e7d2d738d3c2
Revision: 201010
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
642 |
{ |
0 | 643 |
LOG_MSG("Error reading memory in decoding step instruction"); |
21
e7d2d738d3c2
Revision: 201010
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
644 |
} |
0 | 645 |
} |
646 |
} |
|
21
e7d2d738d3c2
Revision: 201010
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
647 |
} |
0 | 648 |
break; |
21
e7d2d738d3c2
Revision: 201010
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
649 |
} |
0 | 650 |
case 4: |
21
e7d2d738d3c2
Revision: 201010
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
651 |
{ |
0 | 652 |
if ((inst & 0xF0000000) != 0xF0000000) |
21
e7d2d738d3c2
Revision: 201010
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
653 |
{ |
0 | 654 |
// load/store multiple |
655 |
if (arm_load(inst)) // bit 20 |
|
21
e7d2d738d3c2
Revision: 201010
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
656 |
{ |
0 | 657 |
// loading a register from memory |
658 |
if (((inst & 0x00008000) >> 15)) |
|
21
e7d2d738d3c2
Revision: 201010
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
659 |
{ |
0 | 660 |
// loading the PC register |
661 |
TInt offset = 0; |
|
662 |
if (arm_block_u(inst)) |
|
21
e7d2d738d3c2
Revision: 201010
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
663 |
{ |
0 | 664 |
TUint32 reglist = arm_block_reglist(inst); |
665 |
offset = iChannel->Bitcount(reglist) * 4 - 4; |
|
666 |
if (arm_block_pre(inst)) |
|
667 |
offset += 4; |
|
21
e7d2d738d3c2
Revision: 201010
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
668 |
} |
0 | 669 |
else if (arm_block_pre(inst)) |
21
e7d2d738d3c2
Revision: 201010
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
670 |
{ |
0 | 671 |
offset = -4; |
21
e7d2d738d3c2
Revision: 201010
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
672 |
} |
e7d2d738d3c2
Revision: 201010
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
673 |
|
0 | 674 |
TUint32 temp = 0; |
675 |
err = iChannel->ReadKernelRegisterValue(aThread, arm_rn(inst), temp); |
|
676 |
if(err != KErrNone) |
|
21
e7d2d738d3c2
Revision: 201010
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
677 |
{ |
0 | 678 |
LOG_MSG2("Non-zero error code discarded: %d", err); |
21
e7d2d738d3c2
Revision: 201010
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
679 |
} |
e7d2d738d3c2
Revision: 201010
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
680 |
|
0 | 681 |
temp += offset; |
682 |
||
683 |
TBuf8<4> destination; |
|
684 |
err = iChannel->DoReadMemory(aThread, temp, 4, destination); |
|
21
e7d2d738d3c2
Revision: 201010
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
685 |
|
0 | 686 |
if (KErrNone == err) |
21
e7d2d738d3c2
Revision: 201010
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
687 |
{ |
0 | 688 |
breakAddress = *(TUint32 *)destination.Ptr(); |
689 |
if ((breakAddress & 0x00000001) == 1) |
|
21
e7d2d738d3c2
Revision: 201010
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
690 |
{ |
0 | 691 |
aChangingModes = ETrue; |
21
e7d2d738d3c2
Revision: 201010
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
692 |
} |
0 | 693 |
breakAddress &= 0xFFFFFFFE; |
21
e7d2d738d3c2
Revision: 201010
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
694 |
} |
0 | 695 |
else |
21
e7d2d738d3c2
Revision: 201010
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
696 |
{ |
0 | 697 |
LOG_MSG("Error reading memory in decoding step instruction"); |
21
e7d2d738d3c2
Revision: 201010
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
698 |
} |
0 | 699 |
} |
700 |
} |
|
21
e7d2d738d3c2
Revision: 201010
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
701 |
} |
e7d2d738d3c2
Revision: 201010
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
702 |
break; |
0 | 703 |
} |
704 |
case 5: |
|
21
e7d2d738d3c2
Revision: 201010
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
705 |
{ |
0 | 706 |
if ((inst & 0xF0000000) == 0xF0000000) |
21
e7d2d738d3c2
Revision: 201010
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
707 |
{ |
0 | 708 |
// BLX |
21
e7d2d738d3c2
Revision: 201010
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
709 |
breakAddress = (TUint32)arm_instr_b_dest(inst, aCurrentPC); |
0 | 710 |
|
21
e7d2d738d3c2
Revision: 201010
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
711 |
// Unconditionally change into Thumb mode |
e7d2d738d3c2
Revision: 201010
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
712 |
aChangingModes = ETrue; |
e7d2d738d3c2
Revision: 201010
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
713 |
breakAddress &= 0xFFFFFFFE; |
0 | 714 |
} |
715 |
else |
|
21
e7d2d738d3c2
Revision: 201010
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
716 |
{ |
0 | 717 |
if ((inst & 0x01000000)) // bit 24 |
21
e7d2d738d3c2
Revision: 201010
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
718 |
{ |
0 | 719 |
// BL |
720 |
breakAddress = (TUint32)arm_instr_b_dest(inst, aCurrentPC); |
|
721 |
} |
|
722 |
else |
|
21
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Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
723 |
{ |
0 | 724 |
// B |
725 |
breakAddress = (TUint32)arm_instr_b_dest(inst, aCurrentPC); |
|
21
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Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
726 |
} |
0 | 727 |
} |
728 |
break; |
|
21
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parents:
0
diff
changeset
|
729 |
} // case 5 |
e7d2d738d3c2
Revision: 201010
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
730 |
} //switch(arm_opcode(inst)) // bits 27-25 |
e7d2d738d3c2
Revision: 201010
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
731 |
} // if (IsExecuted(((inst>>28) & 0x0000000F), aStatusRegister)) |
e7d2d738d3c2
Revision: 201010
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
732 |
} // case Debug::EArmMode: |
0 | 733 |
break; |
734 |
||
735 |
case Debug::EThumbMode: |
|
21
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Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
736 |
{ |
0 | 737 |
// Thumb Mode |
738 |
// |
|
739 |
// Notes: This now includes the extra code |
|
740 |
// required to decode V6T2 instructions |
|
741 |
||
742 |
LOG_MSG("DRMDStepping::PCAfterInstructionExecutes: Thumb Instruction"); |
|
743 |
||
744 |
TUint16 inst; |
|
745 |
||
746 |
// Obtain the current instruction bit pattern |
|
747 |
TUint32 inst32; |
|
748 |
ReturnIfError(CurrentInstruction(aThread,inst32)); |
|
749 |
||
750 |
inst = static_cast<TUint16>(inst32 & 0xFFFF); |
|
751 |
||
752 |
LOG_MSG2("Current Thumb instruction: 0x%x", inst); |
|
753 |
||
754 |
// v6T2 instructions |
|
755 |
||
21
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Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
756 |
// Note: v6T2 decoding is only enabled for DEBUG builds or if using an |
e7d2d738d3c2
Revision: 201010
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
757 |
// an ARM_V6T2 supporting build system. At the time of writing, no |
e7d2d738d3c2
Revision: 201010
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
758 |
// ARM_V6T2 supporting build system exists, so the stepping code cannot |
e7d2d738d3c2
Revision: 201010
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
759 |
// be said to be known to work. Hence it is not run for release builds |
0 | 760 |
|
761 |
TBool use_v6t2_decodings = EFalse; |
|
762 |
||
763 |
#if defined(DEBUG) || defined(__ARMV6T2__) |
|
764 |
use_v6t2_decodings = ETrue; |
|
765 |
#endif |
|
766 |
// coverity[dead_error_line] |
|
767 |
if (use_v6t2_decodings) |
|
21
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Revision: 201010
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
768 |
{ |
0 | 769 |
// 16-bit encodings |
21
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Revision: 201010
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
770 |
|
0 | 771 |
// A6.2.5 Misc 16-bit instructions |
772 |
// DONE Compare and branch on zero (page A8-66) |
|
773 |
// If then hints |
|
774 |
||
775 |
// ARM ARM DDI0406A - section A8.6.27 CBNZ, CBZ |
|
776 |
// |
|
777 |
// Compare and branch on Nonzero and Compare and Branch on Zero. |
|
778 |
if ((inst & 0xF500) == 0xB100) |
|
21
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Revision: 201010
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
779 |
{ |
0 | 780 |
LOG_MSG("ARM ARM DDI0406A - section A8.6.27 CBNZ, CBZ"); |
781 |
||
782 |
// Decoding as per ARM ARM description |
|
783 |
TUint32 op = (inst & 0x0800) >> 11; |
|
784 |
TUint32 i = (inst & 0x0200) >> 9; |
|
785 |
TUint32 imm5 = (inst & 0x00F8) >> 3; |
|
786 |
TUint32 Rn = inst & 0x0007; |
|
787 |
||
788 |
TUint32 imm32 = (i << 6) | (imm5 << 1); |
|
789 |
||
790 |
// Obtain value for register Rn |
|
791 |
TUint32 RnVal = 0; |
|
792 |
ReturnIfError(RegisterValue(aThread,Rn,RnVal)); |
|
793 |
||
794 |
if (op) |
|
795 |
{ |
|
796 |
// nonzero |
|
797 |
if (RnVal != 0x0) |
|
798 |
{ |
|
799 |
// Branch |
|
800 |
breakAddress = aCurrentPC + imm32; |
|
801 |
} |
|
802 |
} |
|
803 |
else |
|
804 |
{ |
|
805 |
// zero |
|
806 |
if (RnVal == 0x0) |
|
807 |
{ |
|
808 |
// Branch |
|
809 |
breakAddress = aCurrentPC + imm32; |
|
810 |
} |
|
811 |
} |
|
812 |
} |
|
813 |
||
814 |
// ARM ARM DDI0406A - section A8.6.50 IT |
|
815 |
// |
|
816 |
// If Then instruction |
|
817 |
if ((inst & 0xFF00) == 0xBF00) |
|
21
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Revision: 201010
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
818 |
{ |
0 | 819 |
LOG_MSG("ARM ARM DDI0406A - section A8.6.50 IT"); |
820 |
||
821 |
// Decoding as per ARM ARM description |
|
822 |
TUint32 firstcond = inst & 0x00F0 >> 4; |
|
823 |
TUint32 mask = inst & 0x000F; |
|
824 |
||
825 |
if (firstcond == 0xF) |
|
21
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Revision: 201010
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
826 |
{ |
0 | 827 |
// unpredictable |
828 |
LOG_MSG("ARM ARM DDI0406A - section A8.6.50 IT - Unpredictable"); |
|
829 |
break; |
|
21
e7d2d738d3c2
Revision: 201010
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
830 |
} |
0 | 831 |
|
832 |
if ((firstcond == 0xE) && (BitCount(mask) != 1)) |
|
21
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Revision: 201010
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
833 |
{ |
0 | 834 |
// unpredictable |
835 |
LOG_MSG("ARM ARM DDI0406A - section A8.6.50 IT - Unpredictable"); |
|
836 |
break; |
|
21
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Revision: 201010
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
837 |
} |
0 | 838 |
|
839 |
// should check if 'in-it-block' |
|
840 |
LOG_MSG("Cannot step IT instructions."); |
|
841 |
||
842 |
// all the conds are as per Table A8-1 (i.e. the usual 16 cases) |
|
843 |
// no idea how to decode the it block 'after-the-fact' |
|
844 |
// so probably need to treat instructions in the it block |
|
845 |
// as 'may' be executed. So breakpoints at both possible locations |
|
846 |
// depending on whether the instruction is executed or not. |
|
847 |
||
848 |
// also, how do we know if we have hit a breakpoint whilst 'in' an it block? |
|
849 |
// can we check the status registers to find out? |
|
850 |
// |
|
851 |
// see arm arm page 390. |
|
852 |
// |
|
853 |
// seems to depend on the itstate field. this also says what the condition code |
|
854 |
// actually is, and how many instructions are left in the itblock. |
|
855 |
// perhaps we can just totally ignore this state, and always do the two-instruction |
|
856 |
// breakpoint thing? Not if there is any possibility that the address target |
|
857 |
// would be invalid for the non-taken branch address... |
|
21
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Revision: 201010
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
858 |
} |
0 | 859 |
|
860 |
||
861 |
// 32-bit encodings. |
|
862 |
// |
|
863 |
||
864 |
// Load word A6-23 |
|
865 |
// Data processing instructions a6-28 |
|
866 |
// |
|
867 |
||
868 |
// ARM ARM DDI0406A - section A8.6.26 |
|
869 |
if (inst32 & 0xFFF0FFFF == 0xE3C08F00) |
|
21
e7d2d738d3c2
Revision: 201010
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
870 |
{ |
0 | 871 |
LOG_MSG("ARM ARM DDI0406A - section A8.6.26 - BXJ is not supported"); |
872 |
||
873 |
// Decoding as per ARM ARM description |
|
874 |
// TUint32 Rm = inst32 & 0x000F0000; // not needed yet |
|
21
e7d2d738d3c2
Revision: 201010
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
875 |
} |
0 | 876 |
|
877 |
// return from exception... SUBS PC,LR. page b6-25 |
|
878 |
// |
|
879 |
// ARM ARM DDi046A - section B6.1.13 - SUBS PC,LR |
|
880 |
// |
|
881 |
// Encoding T1 |
|
882 |
if (inst32 & 0xFFFFFF00 == 0xF3DE8F00) |
|
21
e7d2d738d3c2
Revision: 201010
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
883 |
{ |
0 | 884 |
LOG_MSG("ARM ARM DDI0406A - section B6.1.13 - SUBS PC,LR Encoding T1"); |
885 |
||
886 |
// Decoding as per ARM ARM description |
|
887 |
TUint32 imm8 = inst32 & 0x000000FF; |
|
888 |
TUint32 imm32 = imm8; |
|
889 |
||
890 |
// TUint32 register_form = EFalse; // not needed for this decoding |
|
891 |
// TUint32 opcode = 0x2; // SUB // not needed for this decoding |
|
892 |
TUint32 n = 14; |
|
893 |
||
894 |
// Obtain LR |
|
895 |
TUint32 lrVal; |
|
896 |
ReturnIfError(RegisterValue(aThread,n,lrVal)); |
|
897 |
||
898 |
TUint32 operand2 = imm32; // always for Encoding T1 |
|
899 |
||
900 |
TUint32 result = lrVal - operand2; |
|
901 |
||
902 |
breakAddress = result; |
|
21
e7d2d738d3c2
Revision: 201010
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
903 |
} |
e7d2d738d3c2
Revision: 201010
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
904 |
|
0 | 905 |
// ARM ARM DDI0406A - section A8.6.16 - B |
906 |
// |
|
907 |
// Branch Encoding T3 |
|
908 |
if (inst32 & 0xF800D000 == 0xF0008000) |
|
21
e7d2d738d3c2
Revision: 201010
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
909 |
{ |
0 | 910 |
LOG_MSG("ARM ARM DDI0406A - section A8.6.16 - B Encoding T3"); |
911 |
||
912 |
// Decoding as per ARM ARM description |
|
913 |
TUint32 S = inst32 & 0x04000000 >> 26; |
|
914 |
// TUint32 cond = inst32 & 0x03C00000 >> 22; // not needed for this decoding |
|
915 |
TUint32 imm6 = inst32 & 0x003F0000 >> 16; |
|
916 |
TUint32 J1 = inst32 & 0x00002000 >> 13; |
|
917 |
TUint32 J2 = inst32 & 0x00000800 >> 11; |
|
918 |
TUint32 imm11 = inst32 & 0x000007FF; |
|
919 |
||
920 |
TUint32 imm32 = S ? 0xFFFFFFFF : 0 ; |
|
921 |
imm32 = (imm32 << 1) | J2; |
|
922 |
imm32 = (imm32 << 1) | J1; |
|
923 |
imm32 = (imm32 << 6) | imm6; |
|
924 |
imm32 = (imm32 << 11) | imm11; |
|
925 |
imm32 = (imm32 << 1) | 0; |
|
926 |
||
927 |
breakAddress = aCurrentPC + imm32; |
|
21
e7d2d738d3c2
Revision: 201010
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
928 |
} |
0 | 929 |
|
930 |
// ARM ARM DDI0406A - section A8.6.16 - B |
|
931 |
// |
|
932 |
// Branch Encoding T4 |
|
933 |
if (inst32 & 0xF800D000 == 0xF0009000) |
|
21
e7d2d738d3c2
Revision: 201010
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
934 |
{ |
0 | 935 |
LOG_MSG("ARM ARM DDI0406A - section A8.6.16 - B"); |
936 |
||
937 |
// Decoding as per ARM ARM description |
|
938 |
TUint32 S = inst32 & 0x04000000 >> 26; |
|
939 |
TUint32 imm10 = inst32 & 0x03FF0000 >> 16; |
|
940 |
TUint32 J1 = inst32 & 0x00002000 >> 12; |
|
941 |
TUint32 J2 = inst32 & 0x00000800 >> 11; |
|
942 |
TUint32 imm11 = inst32 & 0x000003FF; |
|
943 |
||
944 |
TUint32 I1 = !(J1 ^ S); |
|
945 |
TUint32 I2 = !(J2 ^ S); |
|
946 |
||
947 |
TUint32 imm32 = S ? 0xFFFFFFFF : 0; |
|
948 |
imm32 = (imm32 << 1) | S; |
|
949 |
imm32 = (imm32 << 1) | I1; |
|
950 |
imm32 = (imm32 << 1) | I2; |
|
951 |
imm32 = (imm32 << 10) | imm10; |
|
952 |
imm32 = (imm32 << 11) | imm11; |
|
953 |
imm32 = (imm32 << 1) | 0; |
|
954 |
||
955 |
breakAddress = aCurrentPC + imm32; |
|
21
e7d2d738d3c2
Revision: 201010
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
956 |
} |
0 | 957 |
|
958 |
||
959 |
// ARM ARM DDI0406A - section A8.6.225 - TBB, TBH |
|
960 |
// |
|
961 |
// Table Branch Byte, Table Branch Halfword |
|
962 |
if (inst32 & 0xFFF0FFE0 == 0xE8D0F000) |
|
21
e7d2d738d3c2
Revision: 201010
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
963 |
{ |
0 | 964 |
LOG_MSG("ARM ARM DDI0406A - section A8.6.225 TBB,TBH Encoding T1"); |
965 |
||
966 |
// Decoding as per ARM ARM description |
|
967 |
TUint32 Rn = inst32 & 0x000F0000 >> 16; |
|
968 |
TUint32 H = inst32 & 0x00000010 >> 4; |
|
969 |
TUint32 Rm = inst32 & 0x0000000F; |
|
970 |
||
971 |
// Unpredictable? |
|
972 |
if (Rm == 13 || Rm == 15) |
|
21
e7d2d738d3c2
Revision: 201010
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
973 |
{ |
0 | 974 |
LOG_MSG("ARM ARM DDI0406A - section A8.6.225 TBB,TBH Encoding T1 - Unpredictable"); |
975 |
break; |
|
21
e7d2d738d3c2
Revision: 201010
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
976 |
} |
0 | 977 |
|
978 |
TUint32 halfwords; |
|
979 |
TUint32 address; |
|
980 |
ReturnIfError(RegisterValue(aThread,Rn,address)); |
|
981 |
||
982 |
TUint32 offset; |
|
983 |
ReturnIfError(RegisterValue(aThread,Rm,offset)); |
|
984 |
||
985 |
if (H) |
|
21
e7d2d738d3c2
Revision: 201010
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
986 |
{ |
0 | 987 |
address += offset << 1; |
21
e7d2d738d3c2
Revision: 201010
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
988 |
} |
0 | 989 |
else |
21
e7d2d738d3c2
Revision: 201010
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
990 |
{ |
0 | 991 |
address += offset; |
21
e7d2d738d3c2
Revision: 201010
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
992 |
} |
0 | 993 |
|
994 |
ReturnIfError(ReadMem32(aThread,address,halfwords)); |
|
995 |
||
996 |
breakAddress = aCurrentPC + 2*halfwords; |
|
997 |
break; |
|
21
e7d2d738d3c2
Revision: 201010
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
998 |
} |
0 | 999 |
|
1000 |
// ARM ARM DDI0406A - section A8.6.55 - LDMDB, LDMEA |
|
1001 |
// |
|
1002 |
// LDMDB Encoding T1 |
|
1003 |
if (inst32 & 0xFFD02000 == 0xE9100000) |
|
21
e7d2d738d3c2
Revision: 201010
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
1004 |
{ |
0 | 1005 |
LOG_MSG("ARM ARM DDI0406 - section A8.6.55 LDMDB Encoding T1"); |
1006 |
||
1007 |
// Decoding as per ARM ARM description |
|
1008 |
// TUint32 W = inst32 & 0x00200000 >> 21; // Not needed for this encoding |
|
1009 |
TUint32 Rn = inst32 & 0x000F0000 >> 16; |
|
1010 |
TUint32 P = inst32 & 0x00008000 >> 15; |
|
1011 |
TUint32 M = inst32 & 0x00004000 >> 14; |
|
1012 |
TUint32 registers = inst32 & 0x00001FFF; |
|
1013 |
||
1014 |
//TBool wback = (W == 1); // not needed for this encoding |
|
1015 |
||
1016 |
// Unpredictable? |
|
1017 |
if (Rn == 15 || BitCount(registers) < 2 || ((P == 1) && (M==1))) |
|
21
e7d2d738d3c2
Revision: 201010
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
1018 |
{ |
0 | 1019 |
LOG_MSG("ARM ARM DDI0406 - section A8.6.55 LDMDB Encoding T1 - Unpredictable"); |
1020 |
break; |
|
21
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Revision: 201010
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
1021 |
} |
0 | 1022 |
|
1023 |
TUint32 address; |
|
1024 |
ReturnIfError(RegisterValue(aThread,Rn,address)); |
|
1025 |
||
1026 |
address -= 4*BitCount(registers); |
|
1027 |
||
1028 |
for(TInt i=0; i<15; i++) |
|
21
e7d2d738d3c2
Revision: 201010
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
1029 |
{ |
0 | 1030 |
if (IsBitSet(registers,i)) |
21
e7d2d738d3c2
Revision: 201010
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
1031 |
{ |
0 | 1032 |
address +=4; |
21
e7d2d738d3c2
Revision: 201010
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
1033 |
} |
0 | 1034 |
} |
1035 |
||
1036 |
if (IsBitSet(registers,15)) |
|
21
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Revision: 201010
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
1037 |
{ |
0 | 1038 |
TUint32 RnVal = 0; |
1039 |
ReturnIfError(ReadMem32(aThread,address,RnVal)); |
|
1040 |
||
1041 |
breakAddress = RnVal; |
|
21
e7d2d738d3c2
Revision: 201010
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
1042 |
} |
0 | 1043 |
break; |
21
e7d2d738d3c2
Revision: 201010
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
1044 |
} |
0 | 1045 |
|
1046 |
// ARM ARM DDI0406A - section A8.6.121 POP |
|
1047 |
// |
|
1048 |
// POP.W Encoding T2 |
|
1049 |
if (inst32 & 0xFFFF2000 == 0xE8BD0000) |
|
21
e7d2d738d3c2
Revision: 201010
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
1050 |
{ |
0 | 1051 |
LOG_MSG("ARM ARM DDI0406A - section A8.6.121 POP Encoding T2"); |
1052 |
||
1053 |
// Decoding as per ARM ARM description |
|
1054 |
TUint32 registers = inst32 & 0x00001FFF; |
|
1055 |
TUint32 P = inst32 & 0x00008000; |
|
1056 |
TUint32 M = inst32 & 0x00004000; |
|
1057 |
||
1058 |
// Unpredictable? |
|
1059 |
if ( (BitCount(registers)<2) || ((P == 1)&&(M == 1)) ) |
|
21
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Revision: 201010
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
1060 |
{ |
0 | 1061 |
LOG_MSG("ARM ARM DDI0406A - section A8.6.121 POP Encoding T2 - Unpredictable"); |
1062 |
break; |
|
21
e7d2d738d3c2
Revision: 201010
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
1063 |
} |
0 | 1064 |
|
1065 |
TUint32 address; |
|
1066 |
ReturnIfError(RegisterValue(aThread,13,address)); |
|
1067 |
||
1068 |
for(TInt i=0; i< 15; i++) |
|
21
e7d2d738d3c2
Revision: 201010
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
1069 |
{ |
0 | 1070 |
if (IsBitSet(registers,i)) |
21
e7d2d738d3c2
Revision: 201010
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
1071 |
{ |
0 | 1072 |
address += 4; |
21
e7d2d738d3c2
Revision: 201010
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
1073 |
} |
0 | 1074 |
} |
1075 |
||
1076 |
// Is the PC written? |
|
1077 |
if (IsBitSet(registers,15)) |
|
21
e7d2d738d3c2
Revision: 201010
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
1078 |
{ |
0 | 1079 |
// Yes |
1080 |
ReturnIfError(ReadMem32(aThread,address,breakAddress)); |
|
21
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Revision: 201010
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
1081 |
} |
0 | 1082 |
} |
1083 |
||
1084 |
// POP Encoding T3 |
|
1085 |
if (inst32 & 0xFFFF0FFFF == 0xF85D0B04) |
|
21
e7d2d738d3c2
Revision: 201010
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
1086 |
{ |
0 | 1087 |
LOG_MSG("ARM ARM DDI0406A - section A8.6.121 POP Encoding T3"); |
1088 |
||
1089 |
// Decoding as per ARM ARM description |
|
1090 |
TUint32 Rt = inst32 & 0x0000F000 >> 12; |
|
1091 |
TUint32 registers = 1 << Rt; |
|
1092 |
||
1093 |
// Unpredictable? |
|
1094 |
if (Rt == 13 || Rt == 15) |
|
21
e7d2d738d3c2
Revision: 201010
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
1095 |
{ |
0 | 1096 |
LOG_MSG("ARM ARM DDI0406A - section A8.6.121 POP Encoding T3 - Unpredictable"); |
1097 |
break; |
|
21
e7d2d738d3c2
Revision: 201010
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
1098 |
} |
0 | 1099 |
|
1100 |
TUint32 address; |
|
1101 |
ReturnIfError(RegisterValue(aThread,13,address)); |
|
1102 |
||
1103 |
for(TInt i=0; i< 15; i++) |
|
21
e7d2d738d3c2
Revision: 201010
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
1104 |
{ |
0 | 1105 |
if (IsBitSet(registers,i)) |
21
e7d2d738d3c2
Revision: 201010
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
1106 |
{ |
0 | 1107 |
address += 4; |
21
e7d2d738d3c2
Revision: 201010
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
1108 |
} |
0 | 1109 |
} |
1110 |
||
1111 |
// Is the PC written? |
|
1112 |
if (IsBitSet(registers,15)) |
|
21
e7d2d738d3c2
Revision: 201010
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
1113 |
{ |
0 | 1114 |
// Yes |
1115 |
ReturnIfError(ReadMem32(aThread,address,breakAddress)); |
|
21
e7d2d738d3c2
Revision: 201010
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
1116 |
} |
0 | 1117 |
|
1118 |
break; |
|
21
e7d2d738d3c2
Revision: 201010
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
1119 |
} |
0 | 1120 |
|
1121 |
// ARM ARM DDI0406A - section A8.6.53 LDM |
|
1122 |
// |
|
1123 |
// Load Multiple Encoding T2 |
|
1124 |
if ((inst32 & 0xFFD02000) == 0xE8900000) |
|
21
e7d2d738d3c2
Revision: 201010
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
1125 |
{ |
0 | 1126 |
LOG_MSG("ARM ARM DDI0406A - section A8.6.53 LDM Encoding T2"); |
1127 |
||
1128 |
// Decoding as per ARM ARM description |
|
1129 |
TUint32 W = inst32 & 0x0020000 >> 21; |
|
1130 |
TUint32 Rn = inst32 & 0x000F0000 >> 16; |
|
1131 |
TUint32 P = inst32 & 0x00008000 >> 15; |
|
1132 |
TUint32 M = inst32 & 0x00004000 >> 14; |
|
1133 |
TUint32 registers = inst32 & 0x0000FFFF; |
|
1134 |
TUint32 register_list = inst32 & 0x00001FFF; |
|
1135 |
||
1136 |
// POP? |
|
1137 |
if ( (W == 1) && (Rn == 13) ) |
|
21
e7d2d738d3c2
Revision: 201010
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
1138 |
{ |
0 | 1139 |
// POP instruction |
1140 |
LOG_MSG("ARM ARM DDI0406A - section A8.6.53 LDM Encoding T2 - POP"); |
|
21
e7d2d738d3c2
Revision: 201010
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
1141 |
} |
0 | 1142 |
|
1143 |
// Unpredictable? |
|
1144 |
if (Rn == 15 || BitCount(register_list) < 2 || ((P == 1) && (M == 1)) ) |
|
21
e7d2d738d3c2
Revision: 201010
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
1145 |
{ |
0 | 1146 |
LOG_MSG("ARM ARM DDI0406A - section A8.6.53 LDM Encoding T2 - Unpredictable"); |
1147 |
break; |
|
21
e7d2d738d3c2
Revision: 201010
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
1148 |
} |
0 | 1149 |
|
1150 |
TUint32 RnVal; |
|
1151 |
ReturnIfError(RegisterValue(aThread,Rn,RnVal)); |
|
1152 |
||
1153 |
TUint32 address = RnVal; |
|
1154 |
||
1155 |
// Calculate offset of address |
|
1156 |
for(TInt i = 0; i < 15; i++) |
|
21
e7d2d738d3c2
Revision: 201010
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
1157 |
{ |
0 | 1158 |
if (IsBitSet(registers,i)) |
1159 |
{ |
|
1160 |
address += 4; |
|
1161 |
} |
|
21
e7d2d738d3c2
Revision: 201010
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
1162 |
} |
0 | 1163 |
|
1164 |
// Does it load the PC? |
|
1165 |
if (IsBitSet(registers,15)) |
|
21
e7d2d738d3c2
Revision: 201010
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
1166 |
{ |
0 | 1167 |
// Obtain the value loaded into the PC |
1168 |
ReturnIfError(ReadMem32(aThread,address,breakAddress)); |
|
21
e7d2d738d3c2
Revision: 201010
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
1169 |
} |
0 | 1170 |
break; |
1171 |
||
21
e7d2d738d3c2
Revision: 201010
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
1172 |
} |
0 | 1173 |
|
1174 |
// ARM ARM DDI0406A - section B6.1.8 RFE |
|
1175 |
// |
|
1176 |
// Return From Exception Encoding T1 RFEDB |
|
1177 |
if ((inst32 & 0xFFD0FFFF) == 0xE810C000) |
|
21
e7d2d738d3c2
Revision: 201010
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
1178 |
{ |
0 | 1179 |
LOG_MSG("ARM ARM DDI0406A - section B6.1.8 RFE Encoding T1"); |
1180 |
||
1181 |
// Decoding as per ARM ARM description |
|
1182 |
// TUint32 W = (inst32 & 0x00200000) >> 21; // not needed for this encoding |
|
1183 |
TUint32 Rn = (inst32 & 0x000F0000) >> 16; |
|
1184 |
||
1185 |
// TBool wback = (W == 1); // not needed for this encoding |
|
1186 |
TBool increment = EFalse; |
|
1187 |
TBool wordhigher = EFalse; |
|
1188 |
||
1189 |
// Do calculation |
|
1190 |
if (Rn == 15) |
|
21
e7d2d738d3c2
Revision: 201010
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
1191 |
{ |
0 | 1192 |
// Unpredictable |
1193 |
LOG_MSG("ARM ARM DDI0406A - section B6.1.8 RFE Encoding T1 - Unpredictable"); |
|
1194 |
break; |
|
21
e7d2d738d3c2
Revision: 201010
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
1195 |
} |
0 | 1196 |
|
1197 |
TUint32 RnVal = 0; |
|
1198 |
ReturnIfError(RegisterValue(aThread,Rn,RnVal)); |
|
1199 |
||
1200 |
TUint32 address = 0; |
|
1201 |
ReturnIfError(ReadMem32(aThread,RnVal,address)); |
|
1202 |
||
1203 |
if (increment) |
|
21
e7d2d738d3c2
Revision: 201010
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
1204 |
{ |
0 | 1205 |
address -= 8; |
21
e7d2d738d3c2
Revision: 201010
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
1206 |
} |
0 | 1207 |
|
1208 |
if (wordhigher) |
|
21
e7d2d738d3c2
Revision: 201010
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
1209 |
{ |
0 | 1210 |
address += 4; |
21
e7d2d738d3c2
Revision: 201010
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
1211 |
} |
0 | 1212 |
|
1213 |
breakAddress = address; |
|
1214 |
break; |
|
21
e7d2d738d3c2
Revision: 201010
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
1215 |
} |
0 | 1216 |
|
1217 |
// Return From Exception Encoding T2 RFEIA |
|
1218 |
if ((inst32 & 0xFFD0FFFF) == 0xE990C000) |
|
21
e7d2d738d3c2
Revision: 201010
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
1219 |
{ |
0 | 1220 |
LOG_MSG("ARM ARM DDI0406A - section B6.1.8 RFE Encoding T2"); |
1221 |
||
1222 |
// Decoding as per ARM ARM description |
|
1223 |
// TUint32 W = (inst32 & 0x00200000) >> 21; // not needed for this encoding |
|
1224 |
TUint32 Rn = (inst32 & 0x000F0000) >> 16; |
|
1225 |
||
1226 |
// TBool wback = (W == 1); // not needed for this encoding |
|
1227 |
TBool increment = ETrue; |
|
1228 |
TBool wordhigher = EFalse; |
|
1229 |
||
1230 |
// Do calculation |
|
1231 |
if (Rn == 15) |
|
21
e7d2d738d3c2
Revision: 201010
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
1232 |
{ |
0 | 1233 |
// Unpredictable |
1234 |
LOG_MSG("ARM ARM DDI0406A - section B6.1.8 RFE Encoding T2 - Unpredictable"); |
|
1235 |
break; |
|
21
e7d2d738d3c2
Revision: 201010
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
1236 |
} |
0 | 1237 |
|
1238 |
TUint32 RnVal = 0; |
|
1239 |
ReturnIfError(RegisterValue(aThread,Rn,RnVal)); |
|
1240 |
||
1241 |
TUint32 address = 0; |
|
1242 |
ReturnIfError(ReadMem32(aThread,RnVal,address)); |
|
1243 |
||
1244 |
if (increment) |
|
21
e7d2d738d3c2
Revision: 201010
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
1245 |
{ |
0 | 1246 |
address -= 8; |
21
e7d2d738d3c2
Revision: 201010
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
1247 |
} |
0 | 1248 |
|
1249 |
if (wordhigher) |
|
21
e7d2d738d3c2
Revision: 201010
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
1250 |
{ |
0 | 1251 |
address += 4; |
21
e7d2d738d3c2
Revision: 201010
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
1252 |
} |
0 | 1253 |
|
1254 |
breakAddress = RnVal; |
|
1255 |
break; |
|
21
e7d2d738d3c2
Revision: 201010
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
1256 |
} |
0 | 1257 |
|
1258 |
// Return From Exception Encoding A1 RFE<amode> |
|
1259 |
if ((inst32 & 0xFE50FFFF) == 0xF8100A00) |
|
21
e7d2d738d3c2
Revision: 201010
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
1260 |
{ |
0 | 1261 |
LOG_MSG("ARM ARM DDI0406A - section B6.1.8 RFE Encoding A1"); |
1262 |
||
1263 |
// Decoding as per ARM ARM description |
|
1264 |
TUint32 P = (inst32 & 0x01000000) >> 24; |
|
1265 |
TUint32 U = (inst32 & 0x00800000) >> 23; |
|
1266 |
// TUint32 W = (inst32 & 0x00200000) >> 21; // not needed for this encoding |
|
1267 |
TUint32 Rn = (inst32 & 0x000F0000) >> 16; |
|
1268 |
||
1269 |
// TBool wback = (W == 1); // not needed for this encoding |
|
1270 |
TBool increment = (U == 1); |
|
1271 |
TBool wordhigher = (P == U); |
|
1272 |
||
1273 |
// Do calculation |
|
1274 |
if (Rn == 15) |
|
21
e7d2d738d3c2
Revision: 201010
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
1275 |
{ |
0 | 1276 |
// Unpredictable |
1277 |
LOG_MSG("ARM ARM DDI0406A - section B6.1.8 RFE Encoding A1 - Unpredictable"); |
|
1278 |
break; |
|
21
e7d2d738d3c2
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Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
1279 |
} |
0 | 1280 |
|
1281 |
TUint32 RnVal = 0; |
|
1282 |
ReturnIfError(RegisterValue(aThread,Rn,RnVal)); |
|
1283 |
||
1284 |
TUint32 address = 0; |
|
1285 |
ReturnIfError(ReadMem32(aThread,RnVal,address)); |
|
1286 |
||
1287 |
if (increment) |
|
21
e7d2d738d3c2
Revision: 201010
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
1288 |
{ |
0 | 1289 |
address -= 8; |
21
e7d2d738d3c2
Revision: 201010
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
1290 |
} |
0 | 1291 |
|
1292 |
if (wordhigher) |
|
21
e7d2d738d3c2
Revision: 201010
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
1293 |
{ |
0 | 1294 |
address += 4; |
21
e7d2d738d3c2
Revision: 201010
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
1295 |
} |
0 | 1296 |
|
1297 |
breakAddress = address; |
|
1298 |
break; |
|
21
e7d2d738d3c2
Revision: 201010
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
1299 |
} |
0 | 1300 |
} |
1301 |
||
1302 |
// v4T/v5T/v6T instructions |
|
1303 |
switch(thumb_opcode(inst)) |
|
21
e7d2d738d3c2
Revision: 201010
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
1304 |
{ |
0 | 1305 |
case 0x08: |
21
e7d2d738d3c2
Revision: 201010
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
1306 |
{ |
0 | 1307 |
// Data-processing. See ARM ARM DDI0406A, section A6-8, A6.2.2. |
1308 |
||
1309 |
if ((thumb_inst_7_15(inst) == 0x08F)) |
|
21
e7d2d738d3c2
Revision: 201010
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
1310 |
{ |
0 | 1311 |
// BLX(2) |
1312 |
err = iChannel->ReadKernelRegisterValue(aThread, ((inst & 0x0078) >> 3), breakAddress); |
|
1313 |
if(err != KErrNone) |
|
21
e7d2d738d3c2
Revision: 201010
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
1314 |
{ |
0 | 1315 |
LOG_MSG2("Non-zero error code discarded: %d", err); |
21
e7d2d738d3c2
Revision: 201010
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
1316 |
} |
0 | 1317 |
|
1318 |
if ((breakAddress & 0x00000001) == 0) |
|
21
e7d2d738d3c2
Revision: 201010
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
1319 |
{ |
0 | 1320 |
aChangingModes = ETrue; |
21
e7d2d738d3c2
Revision: 201010
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
1321 |
} |
e7d2d738d3c2
Revision: 201010
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
1322 |
|
0 | 1323 |
breakAddress &= 0xFFFFFFFE; |
1324 |
||
1325 |
// Report how we decoded this instruction |
|
1326 |
LOG_MSG("DRMDStepping::PCAfterInstructionExecutes: Decoded as BLX (2)"); |
|
21
e7d2d738d3c2
Revision: 201010
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
1327 |
} |
0 | 1328 |
else if (thumb_inst_7_15(inst) == 0x08E) |
21
e7d2d738d3c2
Revision: 201010
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
1329 |
{ |
0 | 1330 |
// BX |
1331 |
err = iChannel->ReadKernelRegisterValue(aThread, ((inst & 0x0078) >> 3), breakAddress); |
|
1332 |
if(err != KErrNone) |
|
21
e7d2d738d3c2
Revision: 201010
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
1333 |
{ |
0 | 1334 |
LOG_MSG2("Non-zero error code discarded: %d", err); |
21
e7d2d738d3c2
Revision: 201010
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
1335 |
} |
0 | 1336 |
|
1337 |
if ((breakAddress & 0x00000001) == 0) |
|
21
e7d2d738d3c2
Revision: 201010
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
1338 |
{ |
0 | 1339 |
aChangingModes = ETrue; |
21
e7d2d738d3c2
Revision: 201010
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
1340 |
} |
0 | 1341 |
|
1342 |
breakAddress &= 0xFFFFFFFE; |
|
1343 |
||
1344 |
// Report how we decoded this instruction |
|
1345 |
LOG_MSG("DRMDStepping::PCAfterInstructionExecutes: Decoded as BX"); |
|
21
e7d2d738d3c2
Revision: 201010
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
1346 |
} |
0 | 1347 |
else if ((thumb_inst_8_15(inst) == 0x46) && ((inst & 0x87) == 0x87)) |
21
e7d2d738d3c2
Revision: 201010
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
1348 |
{ |
0 | 1349 |
// MOV with PC as the destination |
1350 |
err = iChannel->ReadKernelRegisterValue(aThread, ((inst & 0x0078) >> 3), breakAddress); |
|
1351 |
if(err != KErrNone) |
|
21
e7d2d738d3c2
Revision: 201010
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
1352 |
{ |
0 | 1353 |
LOG_MSG2("Non-zero error code discarded: %d", err); |
21
e7d2d738d3c2
Revision: 201010
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
1354 |
} |
0 | 1355 |
|
1356 |
// Report how we decoded this instruction |
|
1357 |
LOG_MSG("DRMDStepping::PCAfterInstructionExecutes: Decoded as MOV with PC as the destination"); |
|
21
e7d2d738d3c2
Revision: 201010
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
1358 |
} |
0 | 1359 |
else if ((thumb_inst_8_15(inst) == 0x44) && ((inst & 0x87) == 0x87)) |
21
e7d2d738d3c2
Revision: 201010
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
1360 |
{ |
0 | 1361 |
// ADD with PC as the destination |
1362 |
err = iChannel->ReadKernelRegisterValue(aThread, ((inst & 0x0078) >> 3), breakAddress); |
|
1363 |
if(err != KErrNone) |
|
21
e7d2d738d3c2
Revision: 201010
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
1364 |
{ |
0 | 1365 |
LOG_MSG2("Non-zero error code discarded: %d", err); |
21
e7d2d738d3c2
Revision: 201010
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
1366 |
} |
0 | 1367 |
breakAddress += aCurrentPC + 4; // +4 because we need to use the PC+4 according to ARM ARM DDI0406A, section A6.1.2. |
1368 |
||
1369 |
// Report how we decoded this instruction |
|
1370 |
LOG_MSG("DRMDStepping::PCAfterInstructionExecutes: Decoded as ADD with PC as the destination"); |
|
21
e7d2d738d3c2
Revision: 201010
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
1371 |
} |
0 | 1372 |
break; |
21
e7d2d738d3c2
Revision: 201010
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
1373 |
} |
0 | 1374 |
case 0x13: |
21
e7d2d738d3c2
Revision: 201010
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
1375 |
{ |
0 | 1376 |
// Load/Store single data item. See ARM ARM DDI0406A, section A6-10 |
1377 |
||
1378 |
//This instruction doesn't modify the PC. |
|
1379 |
||
1380 |
//if (thumb_inst_8_15(inst) == 0x9F) |
|
1381 |
//{ |
|
1382 |
// LDR(4) with the PC as the destination |
|
1383 |
// breakAddress = ReadRegister(aThread, SP_REGISTER) + (4 * (inst & 0x00FF)); |
|
1384 |
//} |
|
1385 |
||
1386 |
// Report how we decoded this instruction |
|
1387 |
LOG_MSG("DRMDStepping::PCAfterInstructionExecutes: Decoded as This instruction doesn't modify the PC."); |
|
1388 |
break; |
|
21
e7d2d738d3c2
Revision: 201010
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
1389 |
} |
0 | 1390 |
case 0x17: |
21
e7d2d738d3c2
Revision: 201010
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
1391 |
{ |
0 | 1392 |
// Misc 16-bit instruction. See ARM ARM DDI0406A, section A6-11 |
1393 |
||
1394 |
if (thumb_inst_8_15(inst) == 0xBD) |
|
21
e7d2d738d3c2
Revision: 201010
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
1395 |
{ |
0 | 1396 |
// POP with the PC in the list |
1397 |
TUint32 regList = (inst & 0x00FF); |
|
1398 |
TInt offset = 0; |
|
1399 |
err = iChannel->ReadKernelRegisterValue(aThread, SP_REGISTER, (T4ByteRegisterValue&)offset); |
|
1400 |
if(err != KErrNone) |
|
21
e7d2d738d3c2
Revision: 201010
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
1401 |
{ |
0 | 1402 |
LOG_MSG2("Non-zero error code discarded: %d", err); |
21
e7d2d738d3c2
Revision: 201010
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
1403 |
} |
0 | 1404 |
offset += (iChannel->Bitcount(regList) * 4); |
1405 |
||
1406 |
TBuf8<4> destination; |
|
1407 |
err = iChannel->DoReadMemory(aThread, offset, 4, destination); |
|
1408 |
||
1409 |
if (KErrNone == err) |
|
21
e7d2d738d3c2
Revision: 201010
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
1410 |
{ |
0 | 1411 |
breakAddress = *(TUint32 *)destination.Ptr(); |
1412 |
||
1413 |
if ((breakAddress & 0x00000001) == 0) |
|
21
e7d2d738d3c2
Revision: 201010
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
1414 |
{ |
0 | 1415 |
aChangingModes = ETrue; |
21
e7d2d738d3c2
Revision: 201010
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
1416 |
} |
0 | 1417 |
|
1418 |
breakAddress &= 0xFFFFFFFE; |
|
21
e7d2d738d3c2
Revision: 201010
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
1419 |
} |
0 | 1420 |
else |
21
e7d2d738d3c2
Revision: 201010
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
1421 |
{ |
0 | 1422 |
LOG_MSG("Error reading memory in decoding step instruction"); |
21
e7d2d738d3c2
Revision: 201010
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
1423 |
} |
0 | 1424 |
|
1425 |
// Report how we decoded this instruction |
|
1426 |
LOG_MSG("DRMDStepping::PCAfterInstructionExecutes: Decoded as POP with the PC in the list"); |
|
21
e7d2d738d3c2
Revision: 201010
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
1427 |
} |
0 | 1428 |
break; |
21
e7d2d738d3c2
Revision: 201010
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
1429 |
} |
0 | 1430 |
case 0x1A: |
1431 |
case 0x1B: |
|
21
e7d2d738d3c2
Revision: 201010
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
1432 |
{ |
0 | 1433 |
// Conditional branch, and supervisor call. See ARM ARM DDI0406A, section A6-13 |
1434 |
||
1435 |
if (thumb_inst_8_15(inst) < 0xDE) |
|
21
e7d2d738d3c2
Revision: 201010
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
1436 |
{ |
0 | 1437 |
// B(1) conditional branch |
1438 |
if (IsExecuted(((inst & 0x0F00) >> 8), aStatusRegister)) |
|
21
e7d2d738d3c2
Revision: 201010
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
1439 |
{ |
0 | 1440 |
TUint32 offset = ((inst & 0x000000FF) << 1); |
1441 |
if (offset & 0x00000100) |
|
21
e7d2d738d3c2
Revision: 201010
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
1442 |
{ |
0 | 1443 |
offset |= 0xFFFFFF00; |
21
e7d2d738d3c2
Revision: 201010
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
1444 |
} |
0 | 1445 |
|
1446 |
breakAddress = aCurrentPC + 4 + offset; |
|
1447 |
||
1448 |
// Report how we decoded this instruction |
|
1449 |
LOG_MSG("DRMDStepping::PCAfterInstructionExecutes: Decoded as B(1) conditional branch"); |
|
21
e7d2d738d3c2
Revision: 201010
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
1450 |
} |
0 | 1451 |
} |
1452 |
break; |
|
21
e7d2d738d3c2
Revision: 201010
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
1453 |
} |
0 | 1454 |
case 0x1C: |
21
e7d2d738d3c2
Revision: 201010
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
1455 |
{ |
0 | 1456 |
// Unconditional branch, See ARM ARM DDI0406A, section A8-44. |
1457 |
||
1458 |
// B(2) unconditional branch |
|
1459 |
TUint32 offset = (inst & 0x000007FF) << 1; |
|
1460 |
if (offset & 0x00000800) |
|
21
e7d2d738d3c2
Revision: 201010
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
1461 |
{ |
0 | 1462 |
offset |= 0xFFFFF800; |
21
e7d2d738d3c2
Revision: 201010
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
1463 |
} |
0 | 1464 |
|
1465 |
breakAddress = aCurrentPC + 4 + offset; |
|
1466 |
||
1467 |
// Report how we decoded this instruction |
|
1468 |
LOG_MSG("DRMDStepping::PCAfterInstructionExecutes: Decoded as B(2) unconditional branch"); |
|
1469 |
||
1470 |
break; |
|
21
e7d2d738d3c2
Revision: 201010
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
1471 |
} |
0 | 1472 |
case 0x1D: |
21
e7d2d738d3c2
Revision: 201010
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
1473 |
{ |
0 | 1474 |
if (!(inst & 0x0001)) |
21
e7d2d738d3c2
Revision: 201010
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
1475 |
{ |
0 | 1476 |
// BLX(1) |
1477 |
err = iChannel->ReadKernelRegisterValue(aThread, LINK_REGISTER, breakAddress); |
|
1478 |
if(err != KErrNone) |
|
21
e7d2d738d3c2
Revision: 201010
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
1479 |
{ |
0 | 1480 |
LOG_MSG2("Non-zero error code discarded: %d", err); |
21
e7d2d738d3c2
Revision: 201010
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
1481 |
} |
0 | 1482 |
breakAddress += ((inst & 0x07FF) << 1); |
1483 |
if ((breakAddress & 0x00000001) == 0) |
|
21
e7d2d738d3c2
Revision: 201010
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
1484 |
{ |
0 | 1485 |
aChangingModes = ETrue; |
21
e7d2d738d3c2
Revision: 201010
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
1486 |
} |
0 | 1487 |
|
1488 |
breakAddress &= 0xFFFFFFFC; |
|
1489 |
||
1490 |
// Report how we decoded this instruction |
|
1491 |
LOG_MSG("DRMDStepping::PCAfterInstructionExecutes: Decoded as BLX(1)"); |
|
1492 |
||
21
e7d2d738d3c2
Revision: 201010
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
1493 |
} |
0 | 1494 |
break; |
21
e7d2d738d3c2
Revision: 201010
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
1495 |
} |
0 | 1496 |
case 0x1E: |
21
e7d2d738d3c2
Revision: 201010
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
1497 |
{ |
e7d2d738d3c2
Revision: 201010
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
1498 |
// Check for ARMv7 CPU |
e7d2d738d3c2
Revision: 201010
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
1499 |
if(cpuid == 0xC0) |
e7d2d738d3c2
Revision: 201010
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
1500 |
{ |
e7d2d738d3c2
Revision: 201010
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
1501 |
// BL/BLX 32-bit instruction |
e7d2d738d3c2
Revision: 201010
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
1502 |
aNewRangeEnd += 4; |
0 | 1503 |
|
1504 |
breakAddress = (TUint32)thumb_instr_b_dest(inst32, aCurrentPC); |
|
1505 |
||
21
e7d2d738d3c2
Revision: 201010
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
1506 |
if((inst32 >> 27) == 0x1D) |
e7d2d738d3c2
Revision: 201010
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
1507 |
{ |
e7d2d738d3c2
Revision: 201010
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
1508 |
// BLX(1) |
e7d2d738d3c2
Revision: 201010
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
1509 |
if ((breakAddress & 0x00000001) == 0) |
e7d2d738d3c2
Revision: 201010
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
1510 |
{ |
e7d2d738d3c2
Revision: 201010
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
1511 |
aChangingModes = ETrue; |
e7d2d738d3c2
Revision: 201010
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
1512 |
} |
e7d2d738d3c2
Revision: 201010
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
1513 |
|
e7d2d738d3c2
Revision: 201010
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
1514 |
breakAddress &= 0xFFFFFFFC; |
0 | 1515 |
|
21
e7d2d738d3c2
Revision: 201010
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
1516 |
// Report how we decoded this instruction |
e7d2d738d3c2
Revision: 201010
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
1517 |
LOG_MSG("DRMDStepping::PCAfterInstructionExecutes: Decoded as 32-bit BLX(1)"); |
e7d2d738d3c2
Revision: 201010
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
1518 |
} |
e7d2d738d3c2
Revision: 201010
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
1519 |
else |
e7d2d738d3c2
Revision: 201010
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
1520 |
{ |
e7d2d738d3c2
Revision: 201010
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
1521 |
// Report how we decoded this instruction |
e7d2d738d3c2
Revision: 201010
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
1522 |
LOG_MSG("DRMDStepping::PCAfterInstructionExecutes: 32-bit BL instruction"); |
e7d2d738d3c2
Revision: 201010
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
1523 |
} |
e7d2d738d3c2
Revision: 201010
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
1524 |
LOG_MSG2(" 32-bit BL/BLX instruction: breakAddress = 0x%X", breakAddress); |
e7d2d738d3c2
Revision: 201010
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
1525 |
} // if(cpuid == 0xC0) |
e7d2d738d3c2
Revision: 201010
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
1526 |
else |
e7d2d738d3c2
Revision: 201010
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
1527 |
{ |
e7d2d738d3c2
Revision: 201010
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
1528 |
// BL/BLX prefix - destination is encoded in this and the next instruction |
e7d2d738d3c2
Revision: 201010
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
1529 |
aNewRangeEnd += 2; |
0 | 1530 |
|
21
e7d2d738d3c2
Revision: 201010
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
1531 |
// Report how we decoded this instruction |
e7d2d738d3c2
Revision: 201010
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
1532 |
LOG_MSG("DRMDStepping::PCAfterInstructionExecutes: BL/BLX prefix - destination is encoded in this and the next instruction"); |
e7d2d738d3c2
Revision: 201010
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
1533 |
} |
0 | 1534 |
|
1535 |
break; |
|
21
e7d2d738d3c2
Revision: 201010
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
1536 |
} |
0 | 1537 |
case 0x1F: |
1538 |
{ |
|
21
e7d2d738d3c2
Revision: 201010
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
1539 |
// BL |
e7d2d738d3c2
Revision: 201010
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
1540 |
err = iChannel->ReadKernelRegisterValue(aThread, LINK_REGISTER, breakAddress); |
e7d2d738d3c2
Revision: 201010
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
1541 |
if(err != KErrNone) |
0 | 1542 |
{ |
21
e7d2d738d3c2
Revision: 201010
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
1543 |
LOG_MSG2("Non-zero error code discarded: %d", err); |
0 | 1544 |
} |
21
e7d2d738d3c2
Revision: 201010
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
1545 |
breakAddress += ((inst & 0x07FF) << 1); |
0 | 1546 |
|
21
e7d2d738d3c2
Revision: 201010
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
1547 |
// Report how we decoded this instruction |
e7d2d738d3c2
Revision: 201010
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
1548 |
LOG_MSG("DRMDStepping::PCAfterInstructionExecutes: Decoded as BL"); |
e7d2d738d3c2
Revision: 201010
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
1549 |
break; |
e7d2d738d3c2
Revision: 201010
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
1550 |
} |
e7d2d738d3c2
Revision: 201010
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
1551 |
default: |
e7d2d738d3c2
Revision: 201010
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
1552 |
{ |
e7d2d738d3c2
Revision: 201010
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
1553 |
// Don't know any better at this point! |
e7d2d738d3c2
Revision: 201010
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
1554 |
LOG_MSG("DRMDStepping::PCAfterInstructionExecutes:- default to next instruction"); |
0 | 1555 |
} |
1556 |
break; |
|
21
e7d2d738d3c2
Revision: 201010
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
1557 |
} // switch(thumb_opcode(inst)) |
e7d2d738d3c2
Revision: 201010
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
1558 |
} // case Debug::EThumbMode: |
0 | 1559 |
break; |
21
e7d2d738d3c2
Revision: 201010
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
1560 |
|
0 | 1561 |
case Debug::EThumb2EEMode: |
21
e7d2d738d3c2
Revision: 201010
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
1562 |
{ |
0 | 1563 |
// Not yet supported |
1564 |
LOG_MSG("DRMDStepping::PCAfterInstructionExecutes - Debug::EThumb2Mode is not supported"); |
|
1565 |
||
21
e7d2d738d3c2
Revision: 201010
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
1566 |
} |
e7d2d738d3c2
Revision: 201010
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
1567 |
break; |
0 | 1568 |
|
1569 |
default: |
|
1570 |
LOG_MSG("DRMDStepping::PCAfterInstructionExecutes - Cannot determine CPU mode architecture"); |
|
21
e7d2d738d3c2
Revision: 201010
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
1571 |
} // switch(mode) |
0 | 1572 |
|
1573 |
LOG_MSG2("DRMDStepping::PCAfterInstructionExecutes : return 0x%08x",breakAddress); |
|
1574 |
return breakAddress; |
|
21
e7d2d738d3c2
Revision: 201010
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
1575 |
} |
0 | 1576 |
|
1577 |
// Obtain a 32-bit memory value with minimum fuss |
|
1578 |
TInt DRMDStepping::ReadMem32(DThread* aThread, const TUint32 aAddress, TUint32& aValue) |
|
1579 |
{ |
|
1580 |
TBuf8<4> valBuf; |
|
1581 |
TInt err = iChannel->DoReadMemory(aThread, aAddress, 4, valBuf); |
|
1582 |
if (err != KErrNone) |
|
1583 |
{ |
|
1584 |
LOG_MSG2("DRMDStepping::ReadMem32 failed to read memory at 0x%08x", aAddress); |
|
1585 |
return err; |
|
1586 |
} |
|
1587 |
||
1588 |
aValue = *(TUint32 *)valBuf.Ptr(); |
|
1589 |
||
1590 |
return KErrNone; |
|
1591 |
} |
|
1592 |
||
1593 |
// Obtain a 16-bit memory value with minimum fuss |
|
1594 |
TInt DRMDStepping::ReadMem16(DThread* aThread, const TUint32 aAddress, TUint16& aValue) |
|
1595 |
{ |
|
1596 |
TBuf8<2> valBuf; |
|
1597 |
TInt err = iChannel->DoReadMemory(aThread, aAddress, 2, valBuf); |
|
1598 |
if (err != KErrNone) |
|
1599 |
{ |
|
1600 |
LOG_MSG2("DRMDStepping::ReadMem16 failed to read memory at 0x%08x", aAddress); |
|
1601 |
return err; |
|
1602 |
} |
|
1603 |
||
1604 |
aValue = *(TUint16 *)valBuf.Ptr(); |
|
1605 |
||
1606 |
return KErrNone; |
|
1607 |
} |
|
1608 |
||
1609 |
// Obtain a 16-bit memory value with minimum fuss |
|
1610 |
TInt DRMDStepping::ReadMem8(DThread* aThread, const TUint32 aAddress, TUint8& aValue) |
|
1611 |
{ |
|
1612 |
TBuf8<1> valBuf; |
|
1613 |
TInt err = iChannel->DoReadMemory(aThread, aAddress, 1, valBuf); |
|
1614 |
if (err != KErrNone) |
|
1615 |
{ |
|
1616 |
LOG_MSG2("DRMDStepping::ReadMem8 failed to read memory at 0x%08x", aAddress); |
|
1617 |
return err; |
|
1618 |
} |
|
1619 |
||
1620 |
aValue = *(TUint8 *)valBuf.Ptr(); |
|
1621 |
||
1622 |
return KErrNone; |
|
1623 |
} |
|
1624 |
||
1625 |
// Obtain a core register value with minimum fuss |
|
1626 |
TInt DRMDStepping::RegisterValue(DThread *aThread, const TUint32 aKernelRegisterId, TUint32 &aValue) |
|
1627 |
{ |
|
1628 |
TInt err = iChannel->ReadKernelRegisterValue(aThread, aKernelRegisterId, aValue); |
|
1629 |
if(err != KErrNone) |
|
1630 |
{ |
|
1631 |
LOG_MSG3("DRMDStepping::RegisterValue failed to read register %d err = %d", aKernelRegisterId, err); |
|
1632 |
} |
|
1633 |
return err; |
|
1634 |
} |
|
1635 |
||
1636 |
||
1637 |
// Encodings from ARM ARM DDI0406A, section 9.2.1 |
|
1638 |
enum TThumb2EEOpcode |
|
21
e7d2d738d3c2
Revision: 201010
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
1639 |
{ |
0 | 1640 |
EThumb2HDP, // Handler Branch with Parameter |
1641 |
EThumb2UNDEF, // UNDEFINED |
|
1642 |
EThumb2HB, // Handler Branch, Handler Branch with Link |
|
1643 |
EThumb2HBLP, // Handle Branch with Link and Parameter |
|
1644 |
EThumb2LDRF, // Load Register from a frame |
|
1645 |
EThumb2CHKA, // Check Array |
|
1646 |
EThumb2LDRL, // Load Register from a literal pool |
|
1647 |
EThumb2LDRA, // Load Register (array operations) |
|
1648 |
EThumb2STR // Store Register to a frame |
|
21
e7d2d738d3c2
Revision: 201010
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
1649 |
}; |
0 | 1650 |
|
1651 |
// |
|
1652 |
// DRMDStepping::ShiftedRegValue |
|
1653 |
// |
|
1654 |
TUint32 DRMDStepping::ShiftedRegValue(DThread *aThread, TUint32 aInstruction, TUint32 aCurrentPC, TUint32 aStatusRegister) |
|
21
e7d2d738d3c2
Revision: 201010
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
1655 |
{ |
e7d2d738d3c2
Revision: 201010
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
1656 |
LOG_MSG("DRMDStepping::ShiftedRegValue()"); |
0 | 1657 |
|
1658 |
TUint32 shift = 0; |
|
1659 |
if (aInstruction & 0x10) // bit 4 |
|
21
e7d2d738d3c2
Revision: 201010
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
1660 |
{ |
0 | 1661 |
shift = (arm_rs(aInstruction) == PC_REGISTER ? aCurrentPC + 8 : aStatusRegister) & 0xFF; |
21
e7d2d738d3c2
Revision: 201010
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
1662 |
} |
0 | 1663 |
else |
21
e7d2d738d3c2
Revision: 201010
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
1664 |
{ |
0 | 1665 |
shift = arm_data_c(aInstruction); |
21
e7d2d738d3c2
Revision: 201010
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
1666 |
} |
0 | 1667 |
|
1668 |
TInt rm = arm_rm(aInstruction); |
|
1669 |
||
1670 |
TUint32 res = 0; |
|
1671 |
if(rm == PC_REGISTER) |
|
21
e7d2d738d3c2
Revision: 201010
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
1672 |
{ |
0 | 1673 |
res = aCurrentPC + ((aInstruction & 0x10) ? 12 : 8); |
21
e7d2d738d3c2
Revision: 201010
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
1674 |
} |
0 | 1675 |
else |
21
e7d2d738d3c2
Revision: 201010
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
1676 |
{ |
0 | 1677 |
TInt err = iChannel->ReadKernelRegisterValue(aThread, rm, res); |
1678 |
if(err != KErrNone) |
|
21
e7d2d738d3c2
Revision: 201010
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
1679 |
{ |
0 | 1680 |
LOG_MSG2("DRMDStepping::ShiftedRegValue - Non-zero error code discarded: %d", err); |
21
e7d2d738d3c2
Revision: 201010
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
1681 |
} |
0 | 1682 |
} |
1683 |
||
1684 |
switch(arm_data_shift(aInstruction)) |
|
21
e7d2d738d3c2
Revision: 201010
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
1685 |
{ |
0 | 1686 |
case 0: // LSL |
21
e7d2d738d3c2
Revision: 201010
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
1687 |
{ |
0 | 1688 |
res = shift >= 32 ? 0 : res << shift; |
1689 |
break; |
|
21
e7d2d738d3c2
Revision: 201010
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
1690 |
} |
0 | 1691 |
case 1: // LSR |
21
e7d2d738d3c2
Revision: 201010
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
1692 |
{ |
0 | 1693 |
res = shift >= 32 ? 0 : res >> shift; |
1694 |
break; |
|
21
e7d2d738d3c2
Revision: 201010
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
1695 |
} |
0 | 1696 |
case 2: // ASR |
21
e7d2d738d3c2
Revision: 201010
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
1697 |
{ |
0 | 1698 |
if (shift >= 32) |
1699 |
shift = 31; |
|
1700 |
res = ((res & 0x80000000L) ? ~((~res) >> shift) : res >> shift); |
|
1701 |
break; |
|
21
e7d2d738d3c2
Revision: 201010
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
1702 |
} |
0 | 1703 |
case 3: // ROR/RRX |
21
e7d2d738d3c2
Revision: 201010
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
1704 |
{ |
0 | 1705 |
shift &= 31; |
1706 |
if (shift == 0) |
|
21
e7d2d738d3c2
Revision: 201010
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
1707 |
{ |
0 | 1708 |
res = (res >> 1) | ((aStatusRegister & arm_carry_bit()) ? 0x80000000L : 0); |
21
e7d2d738d3c2
Revision: 201010
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
1709 |
} |
0 | 1710 |
else |
21
e7d2d738d3c2
Revision: 201010
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
1711 |
{ |
0 | 1712 |
res = (res >> shift) | (res << (32 - shift)); |
21
e7d2d738d3c2
Revision: 201010
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
1713 |
} |
0 | 1714 |
break; |
21
e7d2d738d3c2
Revision: 201010
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
1715 |
} |
e7d2d738d3c2
Revision: 201010
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
1716 |
} |
0 | 1717 |
|
21
e7d2d738d3c2
Revision: 201010
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
1718 |
return res & 0xFFFFFFFF; |
0 | 1719 |
} |
1720 |
||
1721 |
// |
|
1722 |
// DRMDStepping::CurrentPC |
|
1723 |
// |
|
1724 |
// |
|
1725 |
// |
|
1726 |
TInt DRMDStepping::CurrentPC(DThread* aThread, TUint32& aPC) |
|
1727 |
{ |
|
1728 |
LOG_MSG("DRMDStepping::CurrentPC"); |
|
1729 |
||
1730 |
TInt err = iChannel->ReadKernelRegisterValue(aThread, PC_REGISTER, aPC); |
|
1731 |
if(err != KErrNone) |
|
1732 |
{ |
|
1733 |
// We don't know the current PC for this thread! |
|
1734 |
LOG_MSG("DRMDStepping::CurrentPC - Failed to read the current PC"); |
|
1735 |
||
1736 |
return KErrGeneral; |
|
1737 |
} |
|
1738 |
||
1739 |
LOG_MSG2("DRMDStepping::CurrentPC 0x%08x", aPC); |
|
1740 |
||
1741 |
return KErrNone; |
|
1742 |
} |
|
1743 |
||
1744 |
// |
|
1745 |
// DRMDStepping::CurrentCPSR |
|
1746 |
// |
|
1747 |
// |
|
1748 |
// |
|
1749 |
TInt DRMDStepping::CurrentCPSR(DThread* aThread, TUint32& aCPSR) |
|
1750 |
{ |
|
1751 |
LOG_MSG("DRMDStepping::CurrentCPSR"); |
|
1752 |
||
1753 |
TInt err = iChannel->ReadKernelRegisterValue(aThread, STATUS_REGISTER, aCPSR); |
|
1754 |
if(err != KErrNone) |
|
1755 |
{ |
|
1756 |
// We don't know the current PC for this thread! |
|
1757 |
LOG_MSG("DRMDStepping::CurrentPC - Failed to read the current CPSR"); |
|
1758 |
||
1759 |
return KErrGeneral; |
|
1760 |
} |
|
1761 |
||
1762 |
LOG_MSG2("DRMDStepping::CurrentCPSR 0x%08x", aCPSR); |
|
1763 |
||
1764 |
return KErrNone; |
|
1765 |
} |
|
1766 |
||
1767 |
// |
|
1768 |
// DRMDStepping::ModifyBreaksForStep |
|
1769 |
// |
|
1770 |
// Set a temporary breakpoint at the next instruction to be executed after the one at the current PC |
|
1771 |
// Disable the breakpoint at the current PC if one exists |
|
1772 |
// |
|
1773 |
TInt DRMDStepping::ModifyBreaksForStep(DThread *aThread, TUint32 aRangeStart, TUint32 aRangeEnd, /*TBool aStepInto,*/ TBool aResumeOnceOutOfRange, TBool aCheckForStubs, const TUint32 aNumSteps) |
|
1774 |
{ |
|
1775 |
LOG_MSG2("DRMDStepping::ModifyBreaksForStep() Numsteps 0x%d",aNumSteps); |
|
1776 |
||
1777 |
// Validate arguments |
|
1778 |
if (!aThread) |
|
1779 |
{ |
|
1780 |
LOG_MSG("DRMDStepping::ModifyBreaksForStep() - No aThread specified to step"); |
|
1781 |
return KErrArgument; |
|
1782 |
} |
|
1783 |
||
1784 |
// Current PC |
|
1785 |
TUint32 currentPC; |
|
1786 |
||
1787 |
ReturnIfError(CurrentPC(aThread,currentPC)); |
|
1788 |
LOG_MSG2("Current PC: 0x%x", currentPC); |
|
1789 |
||
1790 |
// disable breakpoint at the current PC if necessary |
|
1791 |
ReturnIfError(iChannel->iBreakManager->DisableBreakAtAddress(currentPC)); |
|
1792 |
||
1793 |
// Current CPSR |
|
1794 |
TUint32 statusRegister; |
|
1795 |
||
1796 |
ReturnIfError(CurrentCPSR(aThread,statusRegister)); |
|
1797 |
LOG_MSG2("Current CPSR: %x", statusRegister); |
|
1798 |
||
1799 |
TBool thumbMode = (statusRegister & ECpuThumb); |
|
1800 |
if (thumbMode) |
|
1801 |
LOG_MSG("Thumb Mode"); |
|
1802 |
||
1803 |
TInt instSize = thumbMode ? 2 : 4; |
|
1804 |
||
1805 |
TBool changingModes = EFalse; |
|
1806 |
||
1807 |
TUint32 breakAddress = 0; |
|
1808 |
||
1809 |
TUint32 newRangeEnd = aRangeEnd; |
|
1810 |
||
1811 |
breakAddress = PCAfterInstructionExecutes(aThread, currentPC, statusRegister, instSize, /* aStepInto, */ newRangeEnd, changingModes); |
|
1812 |
||
1813 |
/* |
|
1814 |
If there is already a user breakpoint at this address, we do not need to set a temp breakpoint. The program |
|
1815 |
should simply stop at that address. |
|
1816 |
*/ |
|
1817 |
TBreakEntry* breakEntry = NULL; |
|
1818 |
do |
|
1819 |
{ |
|
1820 |
breakEntry = iChannel->iBreakManager->GetNextBreak(breakEntry); |
|
1821 |
if(breakEntry && !iChannel->iBreakManager->IsTemporaryBreak(*breakEntry)) |
|
1822 |
{ |
|
1823 |
if ((breakEntry->iAddress == breakAddress) && ((breakEntry->iThreadSpecific && breakEntry->iId == aThread->iId) || (!breakEntry->iThreadSpecific && breakEntry->iId == aThread->iOwningProcess->iId))) |
|
1824 |
{ |
|
1825 |
LOG_MSG("DRMDStepping::ModifyBreaksForStep - Breakpoint already exists at the step target address\n"); |
|
1826 |
||
1827 |
// note also that if this is the case, we will not keep stepping if we hit a real breakpoint, so may as well set |
|
1828 |
// the step count = 0. |
|
1829 |
breakEntry->iNumSteps = 0; |
|
1830 |
||
1831 |
return KErrNone; |
|
1832 |
} |
|
1833 |
} |
|
1834 |
} while(breakEntry); |
|
1835 |
||
1836 |
breakEntry = NULL; |
|
1837 |
do |
|
1838 |
{ |
|
1839 |
breakEntry = iChannel->iBreakManager->GetNextBreak(breakEntry); |
|
1840 |
if(breakEntry && iChannel->iBreakManager->IsTemporaryBreak(*breakEntry)) |
|
1841 |
{ |
|
1842 |
if (breakEntry->iAddress == 0) |
|
1843 |
{ |
|
1844 |
breakEntry->iId = aThread->iId; |
|
1845 |
breakEntry->iAddress = breakAddress; |
|
1846 |
breakEntry->iThreadSpecific = ETrue; |
|
1847 |
||
1848 |
TBool realThumbMode = (thumbMode && !changingModes) || (!thumbMode && changingModes); |
|
1849 |
||
1850 |
// Need to set the correct type of breakpoint for the mode we are in |
|
1851 |
// and the the one we are changing into |
|
1852 |
if(realThumbMode) |
|
1853 |
{ |
|
1854 |
// We are remaining in Thumb mode |
|
1855 |
breakEntry->iMode = EThumbMode; |
|
1856 |
} |
|
1857 |
else |
|
1858 |
{ |
|
1859 |
// We are switching to ARM mode |
|
1860 |
breakEntry->iMode = EArmMode; |
|
1861 |
} |
|
1862 |
||
1863 |
breakEntry->iResumeOnceOutOfRange = aResumeOnceOutOfRange; |
|
1864 |
breakEntry->iSteppingInto = ETrue /* aStepInto */; |
|
1865 |
breakEntry->iRangeStart = 0; // no longer used |
|
1866 |
breakEntry->iRangeEnd = 0; // no longer used |
|
1867 |
||
1868 |
LOG_MSG2("Adding temp breakpoint with id: %d", breakEntry->iBreakId); |
|
1869 |
LOG_MSG2("Adding temp breakpoint with thread id: %d", aThread->iId); |
|
1870 |
||
1871 |
// Record how many more steps to go after we hit this one |
|
1872 |
breakEntry->iNumSteps = aNumSteps; |
|
1873 |
||
1874 |
LOG_MSG3("Setting temp breakpoint id %d with %d steps to go\n", breakEntry->iBreakId, aNumSteps); |
|
1875 |
||
1876 |
return iChannel->iBreakManager->DoEnableBreak(*breakEntry, ETrue); |
|
1877 |
} |
|
1878 |
} |
|
1879 |
} while(breakEntry); |
|
1880 |
LOG_MSG("ModifyBreaksForStep : Failed to set suitable breakpoint for stepping"); |
|
1881 |
return KErrNoMemory; // should never get here |
|
1882 |
} |
|
1883 |
||
1884 |
// End of file - d-rmd-stepping.cpp |